JP4275582B2 - Board inspection equipment - Google Patents

Description

  The present invention relates to a board inspection apparatus for inspecting the formation state of pads, wiring patterns and the like formed on a printed board.

  In general, a printed circuit board is provided with pads, wiring patterns, resists, silk prints, and the like on the surface, and these pads and wiring patterns are inspected by being attached to a substrate inspection apparatus. Various types of substrate inspection apparatuses for inspecting pads and wiring patterns on the printed circuit board have been proposed. For example, there are apparatuses described in Patent Documents 1 and 2 below.

  The substrate inspection apparatus described in Patent Document 1 is an inspection that performs a defect detection process on each pattern region, and a region identification unit that identifies a pattern region on the printed circuit board with respect to a captured image of the printed circuit board. It comprises an inspection unit having a processing unit, and after creating region information based on different colors for each pattern region in the region dividing unit, application of different design rules for each pattern region in the inspection processing unit, By comparing with a regular reference image, defect detection for each pattern area can be performed. With this configuration, strict inspection standards are applied to pattern areas where fine defects are also a problem, and gradual inspection is applied to pattern areas where relatively large defects are allowed. By applying inspection standards, defect detection can be performed efficiently.

In addition, the wiring pattern inspection method described in Patent Document 2 compares a critical area pattern indicating an indispensable area corresponding to the center portion of the wiring pattern with an inspection pattern obtained from the wiring pattern on the inspection object. Thus, the defect is detected by the mismatch between the two patterns. In particular, in Patent Document 2, as shown in FIG. 14 of Patent Document 2, if there is a chip that violates the fatal area pattern P2, it is determined as a defect, and conversely, the fatal area pattern P2 is determined as a defect area pattern P2. When there is a small chip that does not invade, it is determined not to be a defect.
JP 11-337498 A JP 2000-241130 A

  By the way, pads and wiring patterns (hereinafter referred to as “pattern regions”) formed on a printed circuit board cause scratches and unevenness on the surface during the generation process, and also cause chipping or protruding portions in the contour portion. There are many cases. Of these, the chipping or protruding portion generated in the contour portion may cause a short circuit with an adjacent pad or wiring pattern, and thus needs to be inspected more closely. If there is no problem in quality even if there are scratches, there is a case where it is desired to handle this as a good product. On the other hand, in the conventional method for inspecting a printed circuit board, the pattern area is inspected only as a whole, so that the inner part and the outer part of the pattern area cannot be inspected separately.

  In addition, the inspection method in Patent Document 2 detects whether or not there is a chip that violates the fatal area pattern, and does not independently inspect only the outer area of the wiring pattern. For this reason, in the inspection method in Patent Document 2, when there is a projection or the like that may cause a short circuit in the outer region of the pad or the wiring pattern, the critical region pattern is not affected by this projection. Since it was not, it could not be determined as a defect.

  Accordingly, the present invention has been made paying attention to the above problems, and an object thereof is to provide a substrate inspection apparatus capable of inspecting a pattern region formed on the surface of a substrate more precisely and efficiently. .

That is, in order to solve the above-mentioned problem, the present invention generates an inner region obtained by reducing the pattern region to be inspected in a substrate inspection apparatus that inspects the formation state of the pattern region formed on the substrate , Inner area data generating means for generating inspection data of the area, and inspection data of the outer area that is an area between the enlarged area and the reduced area after the pattern area to be inspected is enlarged An outer region data generating means for generating the inner region , and an inner determination for determining the quality of the inner region by comparing the inspection data of the inner region generated by the inner region data generating unit with preset inner reference inspection data means and a preset outside the reference test and the test data generated outer region by said outer region data generating means It is obtained so as to provide a outer judging means for judging the quality of the outer region by comparing the data.

  With this configuration, for example, a gentle inspection standard is applied to the inner part of a pad or wiring pattern where a relatively large defect is allowed, and the outer part of a dot or wiring pattern in which a fine defect is also a problem. For example, by applying stricter inspection standards, it becomes possible to detect defects on the substrate more precisely and efficiently.

Further, in such an invention, the outside determination means generates inspection data of the outside area based on the luminance change along the normal direction of the contour of the pattern area, and the inspection data and a preset outside reference inspection are generated. The quality of the outer region is determined by comparing with the data.
Further, in the case of determination by the outside determination means, an inflection point of the position-luminance graph along the normal direction of the contour of the pattern area is extracted, and the position of the inflection point and the inflection of the preset outer area are extracted. The quality of the outer region is determined by comparing the position of the point .

The present invention relates to a substrate inspection apparatus for inspecting a formation state of a pattern region formed on a substrate , generating an inner region obtained by reducing a pattern region to be inspected, and generating inspection data for the inner region. Data generating means, and outer area data generating means for enlarging a pattern area to be inspected and generating inspection data for an outer area that is an area between the enlarged area and the reduced area. The inner area determination means for determining the quality of the inner area by comparing the inspection data of the inner area generated by the inner area data generation means and the preset reference inspection data of the inner area; and the outer area data generation means outer by comparing the reference inspection data outside that a preset inspection data of the generated outer region by Since so provided outside determining means for determining the quality of a region, for example, by applying a gradual inspection reference for the inner area of the pattern area a relatively large defect is acceptable, It is also a problem minute defects By applying a strict inspection standard for the outer region of the pattern region, it becomes possible to detect defects on the substrate more precisely and efficiently.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a block diagram of the substrate inspection apparatus 1 in the present embodiment, and FIG. 2 shows details of the block diagram of the inner area data generation means 7. 3 shows the relationship between the pattern area formed on the printed circuit board 2 and the inspection area, and FIG. 3A shows the reference printed circuit board (hereinafter referred to as “reference printed circuit board”) 2a and the inner area. It is a figure which shows the positional relationship of an outer side area | region. FIG. 3B is a diagram showing the relationship between the printed circuit board 2b to be inspected and the inner and outer regions. Furthermore, FIG. 4 is a diagram illustrating a histogram used when determining the formation state of the inner region. FIG. 5 shows a position-luminance graph in the outer region, and calculates the position of the contour portion of the pattern region in this coordinate system. 6 and 7 are flowcharts showing the operation of the substrate inspection apparatus 1.

  The board inspection apparatus 1 in this embodiment acquires an image of the pattern area 20 (see FIG. 3) of the printed board 2 using an imaging means 3 such as a camera, and the inspection standard for the inside and the outside of the pattern area 20 is different. Inspected at In FIG. 3, the thick solid line and the inside thereof indicate the pattern region 20 formed on the printed circuit board 2. Hereinafter, the structure of the board | substrate inspection apparatus 1 in this Embodiment is demonstrated in detail.

  In FIG. 1, an image pickup means 3 picks up an image of the surface of a printed circuit board 2 to be inspected or a reference printed circuit board 2a. In this embodiment, the image of the surface is expressed by 256 gray scales. To get.

  The preprocessing means 4 performs processing such as A / D conversion on the image of the printed circuit board 2 picked up by the CCD camera, and temporarily stores the processed data in the image memory 5.

  The contour extraction unit 6 extracts the contour 20a of the pattern region 20 from the image data processed by the preprocessing unit 4, and binarizes the obtained 256-gradation grayscale image using a predetermined threshold value. For the binarized image, the portion that changes from black to white or from white to black is taken as the contour 20a portion, and data relating to the position is generated.

  The inner area data generation means 7 reduces the extracted outline 20a portion inward, and obtains data relating to the luminance in the inner area 21b (shaded portion in the lower right direction) of the inner broken line portion in FIG. Generate. Specifically, a histogram for the reduced inner region 21b is generated, and data for comparison with two reference values set in advance on the bright side and the dark side of the histogram is generated. FIG. 2 shows a detailed block diagram of the inner area data generation means 7. The inner area data generation means 7 includes a first counting means 70, a histogram correction means 71, and a second counting means 72.

  Among these, the first counting means 70 extracts, for example, pixels having luminances 150 to 250 from the image of the printed circuit board 2 stored in the image memory 5 and counts them, and the histogram of the reference printed circuit board 2a. Then, a histogram of the printed circuit board 2b to be inspected is generated. FIGS. 4A, 4B, and 4C show the histograms. 4A, 4B, and 4C, the thin solid line indicates the histogram of the reference printed circuit board 2a, and the thick solid line indicates the histogram of the printed circuit board 2b to be inspected. The histogram of the reference printed circuit board 2a is stored in the storage means 8, while the histogram of the printed circuit board 2b to be inspected is checked by the following histogram correction means 71 for the color of the substrate, the color of the resist, and the surface of the pad. Correction processing is performed based on the presence or absence of scratches.

  The histogram correcting means 71 calculates a reference average brightness Ave0 of the histogram for the reference printed circuit board 2a, calculates an average brightness Ave1 of the histogram of the printed circuit board 2b to be inspected, and matches the average brightness Ave1 to Ave0. Then, the number of pixels of each luminance of the printed circuit board 2b to be inspected is corrected. This will be described based on the histograms shown by the thick solid lines in FIGS. 4B and 4C. First, δ = Ave0−Ave1 is calculated, and the luminance of each pixel of the printed circuit board 2b to be inspected is shifted by δ. Thus, the histogram of the thick solid line is shifted to a histogram as shown by the thick broken line. Then, based on this corrected histogram, data for indicating how bright the side is shifted compared to the histogram of the reference printed circuit board 2a, or data for indicating how much is shifted to the dark side. To generate inner reference data.

  Specifically, the second counting means 72 first generates inner reference data for indicating an allowable range of histogram shift. Specifically, as shown in FIG. 4A, the number of pixels of the first luminance P1 set in advance on the dark side with respect to the histogram of the reference printed circuit board 2a is counted, and the number of pixels from the luminance 150 is counted. A value S1 (rectangular area portion in FIG. 4) multiplied by the luminance width up to P1 is calculated, the number of pixels for the second luminance P2 is counted, and the number of pixels is multiplied by the luminance width from luminance P2 to 250. The calculated value S2 (also rectangular area portion) is calculated. Then, this is stored in the storage means 8 as inner reference data. For the printed circuit board 2b to be inspected, the corrected histogram is used to count and add the number of pixels having each luminance lower than the first luminance P1, and this is added to the storage means 8 as S1 '. While storing, the number of pixels of each luminance brighter than the second luminance P2 is counted and added, and this is defined as S2 ′. Then, the quality of the formation state of the inner region 21b can be determined using S1 ', S1 and S2', S2.

  The inside determination means 9 has the number of pixels S1 and S2 which are the inside reference data of the reference printed circuit board 2a counted by the second counting means 72 and the number of pixels S1 which is the inside inspection data of the printed circuit board 2b to be inspected. Compare “· S2”. When S1 ′ is larger than the number of pixels S1, the fact that it is a defective product is output via the output means 12, and when S2 ′ is larger than the number of pixels S2, it is similarly defective. Is output via the output means.

  Next, the configuration of the outer area data generation means 10 will be described. The outer region data generation means 10 generates data for determining the formation state of the outline 20a portion of the pattern region 20, and serves as a reference outer region data (hereinafter referred to as “outer reference data”) and an inspection. The outside inspection data of the target printed circuit board 2b is generated. The outline of the processing of the outer area data generation means 10 will be described with reference to FIG.

The outer area data generation means 10 first performs an enlargement process of the outline 20a to the outside as shown by the outer broken line portion in FIG. 3A in order to generate outer reference data, and is extracted by the outline extraction means 6. A spline 20b is generated for the contour 20a portion, and the luminance in the region (hereinafter referred to as “ring-shaped region”) 22b between the inner region 21b and the enlarged contour 22a in the normal direction 20c of the spline 20b is generated. Generate a graph. FIG. 5 shows a graph relating to the position-luminance. In FIG. 5, the origin is set to the outline 20a portion of the inner region 21b, and the direction of the outer region is set to the plus side. Usually, the brightness is high because the inside of the pattern region 20 is made of metal, and conversely, the brightness is low because the outside of the pattern region 20 is made of resist or the like. The inflection point of this graph is the outline 20a portion of the pattern area 20. The outer area data generation means 10 detects inflection points in all coordinate systems shifted by several pixels in the spline 20b direction, and stores them in the storage means 8 as outer reference data.

  Next, the outside area data generation means 10 generates outside inspection data of the printed circuit board 2b to be inspected. Specifically, as shown in FIG. 3B, the ring-shaped region 22b is superimposed on the pattern region 20 to be inspected, and as shown in FIG. 5, a graph relating to the luminance in the normal direction 20c of the spline 20b. Is generated. Then, the inflection point x of the graph, that is, the position of the contour 20a in the coordinate system of the pattern region 20 to be inspected is detected, and the inflection point x in each coordinate system shifted by several pixels in the spline 20b direction. The outside inspection data is generated by detecting the position of.

  The outside determination means 11 compares the outside reference data thus generated and the outside inspection data, and the distance | x−x0 | between the inflection points x0 and x in each normal direction 20c is determined in advance. It is determined whether it is within the reference value δ0. If | x−x0 |> δ0, it is output via the output means 12 that the chip 20 has a chipped portion or a protruding portion, indicating that the product is defective, and | x−x0 | ≦ If it is δ0, it is output via the output means 12 that it is a non-defective product assuming that there is no chipping or protruding portion in the contour 20a.

Next, a processing flow of the substrate inspection apparatus 1 configured as described above will be described with reference to FIGS. First, FIG. 6 shows a flow for generating reference data necessary for inspecting the printed circuit board 2b to be inspected, and FIG. 7 shows a flow for inspecting the printed circuit board 2b to be inspected.
<Generation flow of inner reference data and outer reference data>

  First, when generating the inner reference data, the reference printed circuit board 2a is attached to a predetermined position of the substrate inspection apparatus 1 using a reference mark (not shown) formed on the surface thereof, and the reference print is performed using the imaging means 3. An image of the surface of the substrate 2a is acquired (step S1). Then, the acquired image is A / D converted by the preprocessing means 4 (step S2), and the converted image information is written in the image memory 5. Then, the image acquired in this manner is binarized using a predetermined luminance value, and a portion that changes from black to white or from white to black is stored in the storage means 8 as a contour 20a portion (step S3).

  Next, reduction processing is performed on the outline 20a portion (step S4), and the number of pixels of luminance 150 to 250 in 256 gray scales is counted for the reduced inner region 21b. A histogram as shown in (a) is generated (step S5). Next, first, a reference average luminance Ave0 is obtained from the generated histogram (step S6). Then, for the first luminance P1 and the second luminance P2 set in advance, the number of pixels of the first luminance P1 and the second luminance P2 is counted, and the luminance is calculated as the number of pixels of the first luminance P1. The number of pixels S1 obtained by multiplying the luminance width from 150 to P1 and the number of pixels S2 obtained by multiplying the number of pixels of the second luminance P2 by the luminance width from luminance P2 to 250 are calculated (step S7). The numbers S1 and S2 are stored in the storage means 8 as inner reference data (step S8).

  Next, when generating the outside reference data, first, an enlargement process is performed on the outline 20a (step S9), and information relating to the pixels in the outer ring-shaped region 22b is collected from the reduced region. Then, as shown in FIG. 5, a position-luminance graph for the normal direction 20c of the spline 20b of the contour 20a is generated (step S10), and the inflection point at which the differential value of luminance in the graph changes most greatly. The position x0 is calculated. Then, information regarding the position of the inflection point in each coordinate system obtained by shifting this by several pixels in the direction of the spline 20b is stored in the storage unit 8 as outer reference data (step S11).

Then, the reference printed board 2a is removed from the board inspection apparatus 1 so that the printed board 2b to be inspected can be inspected.
<Inspection process of printed circuit board 2 to be inspected>

  Next, when inspecting the formation state of the printed circuit board 2b to be inspected, similarly, first, using a reference mark, it is attached to a predetermined position of the circuit board inspection apparatus 1, and an image of the surface of the printed circuit board 2b is obtained. (Step T1). The acquired image is A / D converted by the preprocessing means 4 (step T2), and the information is written in the image memory 5.

  Then, the positional information of the inner area 21b of the reference printed circuit board 2a already stored in the storage means 8 is read out and superimposed on the pattern area 20 of the printed circuit board 2b to be inspected (step T3), Collect information about pixels. Similarly, for this region, the number of pixels with luminance from 150 to 250 is counted with a gray scale of 256 gradations, and a histogram as shown by the thick solid lines in FIGS. 4B and 4C is generated. (Step T4), the average luminance Ave1 is calculated from the generated histogram (Step T5). Next, a difference δ between the calculated average luminance Ave1 and the reference average luminance Ave0 of the reference printed circuit board 2a is calculated, and correction processing is performed by shifting each luminance of the histogram generated in step T3 by this δ. (Step T6). Then, based on the corrected histogram, the number of pixels S1 ′ having a luminance lower than the preset first luminance P1 is counted, and the number of pixels S2 ′ having a luminance brighter than the second luminance P2 is counted. Is counted (step T7), and based on the determination with the inside reference data S1 and S2 (step T8), an output indicating that the printed circuit board 2b is defective is output (step T9). Similarly, when the number of pixels S2 ′ of the printed circuit board 2b to be inspected is larger than the number of pixels S2 of the reference printed circuit board 2a (step T7), an output indicating that the printed circuit board 2b is defective is output (step T7). Step T9). That is, when S1 ′ is larger than the first reference pixel number S1, there is a high possibility that a defect has occurred beyond the scratches due to polishing, so this is determined to be a defective product. If S2 ′ is larger than the second reference pixel number S2, there is a high possibility that a protrusion or the like is present on the pad, so this is determined as a defective product. On the other hand, if S1 ′ ≦ S1 and S2 ′ ≦ S2 (step T8), it is determined that the printed circuit board 2b is a non-defective product, and a message to that effect is output (step T10).

  Next, in order to inspect the formation state of the outline 20a portion, information on the pixels in the ring-shaped region 22b obtained by superimposing the ring-shaped region 22b of the reference printed board 2a on the pattern region 20b to be inspected is collected (step T11). . Then, a position-luminance graph relating to the luminance in the normal direction 20c of the spline 20b of the reference printed board 2a is generated for the ring-shaped region 22b (step T12), and an inflection point in the graph is detected (step T13). The same processing is performed while shifting by several pixels in the spline 20b direction, and a comparison is made between the detected inflection point position x and the distance δ0 between the inflection point position x0 already stored in the storage means 8. A determination is made (step T14), and if this distance exceeds a predetermined threshold value δ0, an output indicating that the product is defective is output (step T15), while the position of the detected inflection point is already stored. If the distance from the inflection point stored in the means 8 is within the predetermined threshold value δ0, an output indicating that the product is non-defective is performed (step T16).

As described above, according to the embodiment, in the board inspection apparatus for inspecting the formation state of the pattern area 20 such as the pad and the wiring pattern formed on the printed circuit board 2b, the inside of the pattern area 20 to be inspected is reduced. The area 21b is generated, the inner area data generation means 7 for generating the inspection data of the inner area 21b, and the pattern area 20 to be inspected are enlarged, and from the enlarged area to the reduced area Outer region data generation means 10 for generating inspection data for the outer region, which is an area between the inner region , inspection data for the inner region generated by the inner region data generation means 7, and preset reference inspection data for the inner region. an inner determination means 9 determines the quality of the inner region by comparison, by said outer region data generating means 10 Since so provided outside determination unit 11 determines the quality of the outer region by comparing the inspection data of the outer region has been made a preset outside the reference inspection data, a relatively large defect is allowed A gentle inspection standard is applied to the inner region 21b of the pattern region 20, and a strict inspection standard is applied to the ring-shaped region 22b of the pattern region 20 where fine defects are also a problem. Defect detection can be performed accurately and efficiently.

  Note that the present invention is not limited to the above embodiment, and can be implemented in various forms.

  For example, in the above-described embodiment, the inspection of the printed circuit board 2 has been described as an example. However, the present invention is not limited to this, and the present invention can also be applied to the case of inspecting the pattern of a glass substrate.

  In the above embodiment, the inner region data is the data indicating the shift of the histogram, and the outer region data is the data indicating the position of the contour 20a of the pattern region 20. However, the present invention is not limited to this. Any method may be adopted as long as it is a method for inspecting an area using different reference values.

The block diagram of the board | substrate inspection apparatus in one embodiment of this invention Detailed block diagram of inner region data generation means in the same form The figure which shows the relationship between the pattern area | region and inspection area | region in the same form The figure which shows the histogram of the inner side area | region in the same form The figure which shows the position-luminance graph of the outer area | region in the same form Flow chart for generating reference data in the same form Flow chart when inspecting printed circuit board in the same form

DESCRIPTION OF SYMBOLS 1 ... Board inspection apparatus 2a, 2b ... Printed circuit board (2a: Reference printed circuit board, 2b: Printed circuit board to be inspected)
7 ... Inner area data generation means 9 ... Inner determination means 10 ... Outer area data generation means 11 ... Outer determination means 20 ... Pattern area 21a ... Inner area outline 21b ... Inner region 22a ... Outer region outline 22b ... Ring-shaped region

Claims (3)

In a substrate inspection apparatus for inspecting the formation state of a pattern region formed on a substrate,
An inner area data generation unit that generates an inner area obtained by reducing the pattern area to be inspected, generates inspection data for the inner area, and enlarges the pattern area to be inspected. Outer region data generating means for generating inspection data for the outer region that is the region up to the reduced region, the inner region inspection data generated by the inner region data generating unit, and a preset inner data The inner determination means for determining the quality of the inner area by comparing with the reference inspection data, and the outer area inspection data generated by the outer area data generation means and the preset outer reference inspection data are compared. The board | substrate inspection apparatus characterized by including the outer side determination means which determines the quality of an outer area | region by this.   The outside determination means generates inspection data for the outer region based on a luminance change along the normal direction of the contour of the pattern region, and compares the inspection data with preset reference inspection data on the outside. The substrate inspection apparatus according to claim 1, wherein the quality of the outer region is determined.   The outside determination means extracts an inflection point of the position-luminance graph along the normal direction of the contour of the pattern area, and determines the position of the inflection point and the position of the inflection point of the outer area set in advance. The substrate inspection apparatus according to claim 1, wherein the quality of the outer region is determined by comparison.

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