JP4268480B2 - Electronic component sealing substrate and electronic device using the same - Google Patents

Electronic component sealing substrate and electronic device using the same Download PDF

Info

Publication number
JP4268480B2
JP4268480B2 JP2003302417A JP2003302417A JP4268480B2 JP 4268480 B2 JP4268480 B2 JP 4268480B2 JP 2003302417 A JP2003302417 A JP 2003302417A JP 2003302417 A JP2003302417 A JP 2003302417A JP 4268480 B2 JP4268480 B2 JP 4268480B2
Authority
JP
Japan
Prior art keywords
main surface
electronic component
insulating substrate
substrate
wiring conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2003302417A
Other languages
Japanese (ja)
Other versions
JP2005072419A (en
Inventor
格 石井
克亨 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2003302417A priority Critical patent/JP4268480B2/en
Publication of JP2005072419A publication Critical patent/JP2005072419A/en
Application granted granted Critical
Publication of JP4268480B2 publication Critical patent/JP4268480B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/94Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Micromachines (AREA)
  • Wire Bonding (AREA)

Description

本発明は、半導体基板と該半導体基板の主面に形成される微小電子機械機構と該微小電子機械機構に電気的に接続される電極とを有する電子部品の微小電子機械機構を気密封止するための電子部品封止用基板、およびそれを用いて電子部品の微小電子機械機構を封止することにより形成される電子装置に関するものである。  The present invention hermetically seals a micro electro mechanical mechanism of an electronic component having a semiconductor substrate, a micro electro mechanical mechanism formed on a main surface of the semiconductor substrate, and an electrode electrically connected to the micro electro mechanical mechanism. The present invention relates to an electronic component sealing substrate and an electronic device formed by sealing a microelectromechanical mechanism of an electronic component using the same.

近年、シリコンウェハ等の半導体基板の主面に、半導体集積回路素子等の微細配線を形成する加工技術を応用して、極めて微小な電子機械機構、いわゆるMEMS(Micro Electromechanical System)を形成した電子部品が注目され、実用化に向けて開発が進められている。   2. Description of the Related Art In recent years, an electronic component in which a very small electromechanical mechanism, so-called MEMS (Micro Electromechanical System), is formed by applying a processing technique for forming fine wiring such as a semiconductor integrated circuit element on the main surface of a semiconductor substrate such as a silicon wafer. Has been attracting attention, and is being developed for practical use.

このような微小電子機械機構としては、加速度計,圧力センサ,アクチュエータ等のセンサや、微細な鏡面体を可動式に形成したマイクロミラーデバイス、光デバイス、あるいはマイクロポンプ等を組み込んだマイクロ化学システム等、非常に広い分野にわたるものが試作、開発されている。   Such micro-electromechanical mechanisms include sensors such as accelerometers, pressure sensors, actuators, micro-mirror devices with movable micro-mirrors, optical devices, micro-chemical systems incorporating micro-pumps, etc. Prototypes have been developed and developed over a very wide field.

そのような微小電子機械機構を形成した電子部品を用いて電子装置を構成するための従来の電子部品封止用基板およびそれを用いて成る電子装置の一例を図4に断面図で示す。図4に示す例では、微小電子機械機構22が形成された半導体基板21の主面には、微小電子機械機構22に電力を供給したり、微小電子機械機構22から外部の電気回路に電気信号を送り出したりするための電極23が微小電子機械機構22と電気的に接続されて形成されており、これら半導体基板21,微小電子機械機構22および電極23により、1つの電子部品24が構成される。   FIG. 4 is a cross-sectional view of an example of a conventional electronic component sealing substrate for configuring an electronic device using an electronic component having such a micro-electromechanical mechanism and an electronic device using the same. In the example shown in FIG. 4, power is supplied to the main surface of the semiconductor substrate 21 on which the micro electro mechanical mechanism 22 is formed, or an electric signal is transmitted from the micro electro mechanical mechanism 22 to an external electric circuit. Is formed by being electrically connected to the micro electro mechanical mechanism 22, and the semiconductor substrate 21, the micro electro mechanical mechanism 22, and the electrode 23 constitute one electronic component 24. .

なお、このような電子部品24は、通常、後述するように、半導体基板21の主面に多数個が縦横に配列形成された多数個取りの形態で形成した後、個々の半導体基板21に切断することにより製作されるので、この切断の際に切削粉等の異物が微小電子機械機構22に付着して作動の妨げになることを防止するために、ガラス板25等で覆われて保護されている。   Such electronic components 24 are usually formed in a multi-cavity form in which a large number are arranged on the main surface of the semiconductor substrate 21 in vertical and horizontal directions, as will be described later, and then cut into individual semiconductor substrates 21. In order to prevent foreign matter such as cutting powder from adhering to the microelectromechanical mechanism 22 and hindering operation during this cutting, it is covered and protected by a glass plate 25 or the like. ing.

そして、この電子部品24を、電子部品収納用の凹部Aを有するパッケージ31の凹部A内に収納するとともに、電子部品24の電極23をパッケージ31の電極パッド32にボンディングワイヤ33等の導電性接続材を介して接続した後、パッケージ31の凹部Aを蓋体34で覆って電子部品24を凹部A内に気密封止することにより、電子装置として完成する。この場合、電子部品24は、微小電子機械機構22の動作を妨げないようにするため、中空状態で気密封止する必要がある。   The electronic component 24 is accommodated in the recess A of the package 31 having the recess A for storing the electronic component, and the electrode 23 of the electronic component 24 is electrically connected to the electrode pad 32 of the package 31 such as a bonding wire 33. After the connection via the material, the recess A of the package 31 is covered with the lid 34 and the electronic component 24 is hermetically sealed in the recess A, thereby completing the electronic device. In this case, the electronic component 24 needs to be hermetically sealed in a hollow state so as not to hinder the operation of the microelectromechanical mechanism 22.

この電子装置について、あらかじめパッケージ31の電極パッド32から外表面に導出するようにして形成しておいた配線導体35の導出部分を外部電気回路に接続することにより、気密封止された微小電子機械機構22が、電極23,ボンディングワイヤ33,電極パッド32および配線導体35を介して外部の電気回路と電気的に接続される。   With respect to this electronic device, a lead-out portion of the wiring conductor 35 formed so as to lead out from the electrode pad 32 of the package 31 to the outer surface in advance is connected to an external electric circuit, so that the microelectronic machine is hermetically sealed. The mechanism 22 is electrically connected to an external electric circuit through the electrode 23, the bonding wire 33, the electrode pad 32, and the wiring conductor 35.

また、このような電子部品24は、通常、広面積の半導体基板の主面に多数個を縦横に配列形成させることにより製作されており、この場合の電子装置の製造方法は、従来、以下のようなものであった。すなわち、半導体基板の主面に、微小電子機械機構22およびこれに電気的に接続された電極23が形成されて成る電子部品領域を多数個、縦横に配列形成した電子部品を準備する工程1と、各電子部品の微小電子機械機構22を、その周囲が中空状態となるようにして、ガラス板25等で覆って封止する工程2と、半導体基板にダイシング加工等の切断加工を施して、個々の電子部品24に分割する工程3と、個々の電子部品24を、電子部品収納用パッケージ31内に気密封止する工程4とにより製作される。   In addition, such an electronic component 24 is usually manufactured by arranging a large number of elements vertically and horizontally on the main surface of a large-area semiconductor substrate. In this case, a method for manufacturing an electronic device is conventionally as follows. It was something like that. That is, a step 1 of preparing an electronic component in which a large number of electronic component regions formed by forming a micro-electromechanical mechanism 22 and an electrode 23 electrically connected to the micro-electromechanical mechanism 22 on a main surface of a semiconductor substrate are arranged vertically and horizontally; The step 2 for sealing the microelectromechanical mechanism 22 of each electronic component with a glass plate 25 or the like so that the periphery thereof is in a hollow state, and performing a cutting process such as a dicing process on the semiconductor substrate, It is manufactured by the step 3 of dividing into individual electronic components 24 and the step 4 of hermetically sealing the individual electronic components 24 in the electronic component storage package 31.

このような従来の製造方法においては、半導体基板の主面に配列形成された多数の電子部品領域の1個ずつをガラス板25等で封止して保護しておく必要があること、また、一旦ガラス板25で封止した電子部品を、個片の電子部品24に分割した後、改めてパッケージ31内に気密封止するとともに、その電極23をパッケージ31の電極パッド32等に接続して外部接続させる必要があること等のため、生産性が悪く、実用化が難しいという問題があった。   In such a conventional manufacturing method, it is necessary to seal and protect each one of a large number of electronic component regions arranged on the main surface of the semiconductor substrate with a glass plate 25 or the like, The electronic component once sealed with the glass plate 25 is divided into individual electronic components 24 and then hermetically sealed in the package 31 and the electrode 23 is connected to the electrode pad 32 of the package 31 and the like. Due to the necessity of connection, there was a problem that productivity was poor and practical application was difficult.

この問題に対し、半導体基板の主面に配列形成された多数個の機構微小電子機械を一括して覆い、封止するような基板が提案されている。   In order to solve this problem, there has been proposed a substrate that collectively covers and seals a large number of mechanical microelectronic machines arrayed on the main surface of a semiconductor substrate.

このような封止用の基板としては、半導体基板を材料とするものや導電性の金属板等を材料にするもの等が知られている。   As such a sealing substrate, a substrate made of a semiconductor substrate, a substrate made of a conductive metal plate, or the like is known.

半導体基板を材料とする場合は、例えば、主面に多数個の電子部品領域が配列形成された第1の半導体基板とは別に、この電子部品領域の配列に対応させて多数の凹部を配列形成した封止用の第2の半導体基板を準備し、第1の半導体基板の主面上に第2の半導体基板を、第2の半導体基板の凹部が第1の半導体基板の電子部品領域を覆うようにして接合し、第2の半導体基板に内側に第1の半導体基板の電子部品領域(特に微小電子機械機構)を封止するようにした技術が提案されている(例えば、特許文献1参照)。   In the case of using a semiconductor substrate as a material, for example, apart from the first semiconductor substrate in which a large number of electronic component regions are arranged on the main surface, a large number of recesses are formed corresponding to the arrangement of the electronic component regions. The second semiconductor substrate for sealing is prepared, the second semiconductor substrate is covered on the main surface of the first semiconductor substrate, and the concave portion of the second semiconductor substrate covers the electronic component region of the first semiconductor substrate. Thus, a technique has been proposed in which the electronic component region (particularly, the microelectromechanical mechanism) of the first semiconductor substrate is sealed inside the second semiconductor substrate (see, for example, Patent Document 1). ).

また、導電性を有する基板を材料とする場合には、導電性を有するカバー用の基板にパターン溝を形成するとともに、このパターン溝をガラスやセラミック材料で充填して平坦化させた後、その上にボンディングパターン(電極パッド等)を形成し、このボンディングパターンに電子部品の電極を接続するとともに導電性のカバー用基板を半導体基板の主面に接合し、その後、電子部品領域をセラミックやガラス等で封着するとともに、ボンディングパターンを外部に導出するための外部配線用電極パターンを形成するようにした技術が提案されている(例えば、特許文献2参照)。   When a conductive substrate is used as a material, a pattern groove is formed on the conductive cover substrate, and the pattern groove is filled with glass or a ceramic material and planarized. A bonding pattern (electrode pad, etc.) is formed on the electrode, and an electrode of an electronic component is connected to the bonding pattern, and a conductive cover substrate is bonded to the main surface of the semiconductor substrate. For example, a technique has been proposed in which an electrode pattern for external wiring for leading a bonding pattern to the outside is formed (for example, see Patent Document 2).

また、微小電子機械機構、いわゆるMEMS(Micro Electromechanical System)を形成した電子部品においては、近年、低電圧駆動かつ高速化が行われるようになってきており、電子部品の外部から侵入する高調波ノイズの影響を受けやすく、配線導体を伝わり外部より伝播してきた高周波ノイズにより電気特性の変化やMEMS領域の破壊などが起こると同時に、配線導体を伝播する信号に含まれる高調波ノイズが電子部品の外部に放出され易いものとなってきている。さらにこの問題点を解決するために、チップインダクタをMEMSの近傍に実装する手法が取られており、実装面積が大きくなっている。
特開2001−144117号公報 特開2002−43463号公報
In recent years, electronic components that form a micro-electromechanical mechanism, so-called MEMS (Micro Electromechanical System), have been driven at low voltage and increased in speed, and harmonic noise that enters from outside the electronic component. The high-frequency noise that propagates through the wiring conductor and propagates from outside causes changes in electrical characteristics and destruction of the MEMS region, and at the same time, harmonic noise contained in the signal propagating through the wiring conductor is external to the electronic component. It has become easy to be released. Furthermore, in order to solve this problem, a technique of mounting a chip inductor in the vicinity of the MEMS is taken, and the mounting area is increased.
JP 2001-144117 A JP 2002-43463 A

しかしながら、このような従来の封止用基板を用いて半導体基板の主面の電子部品領域を封止する場合は、多数個の電子部品領域を一括して封止することはできるものの、例えば、半導体基板を材料とした封止用基板の場合であれば、半導体基板の内部に3次元的に配線導体を形成することができないため、封止用基板としての第2の半導体基板の、電子部品領域が配列形成された第1の半導体基板に接合される主面から対向する他方主面にかけて配線導体を導出することができず、電子部品の電極は、第1の半導体基板の主面に形成された電極の一部を封止部の外側に延出させるとともに、この延出部をボンディングワイヤを介して電子部品収納用パッケージの電極パッドや外部の電気回路に接続する必要があり、実装工程(電子部品領域の封止から電子装置として完成させて外部電気回路に接続するまでの工程)が長く、また、個々の電子装置のサイズが大きくなってしまうという問題があった。また、電子装置を組み込んだ電子システムの小型化に有利な表面実装ができないという問題もあった。   However, when the electronic component region on the main surface of the semiconductor substrate is sealed using such a conventional sealing substrate, a large number of electronic component regions can be collectively sealed, for example, In the case of a sealing substrate using a semiconductor substrate as a material, wiring conductors cannot be formed three-dimensionally inside the semiconductor substrate. The wiring conductor cannot be led out from the main surface joined to the first semiconductor substrate in which the regions are arranged to the opposite main surface, and the electrodes of the electronic component are formed on the main surface of the first semiconductor substrate. It is necessary to extend a part of the formed electrode to the outside of the sealing portion, and to connect the extended portion to an electrode pad of an electronic component storage package or an external electric circuit via a bonding wire. (Electronic component area Up step) is long to connect to an external electric circuit to complete the electronic device from the sealing, also has a problem that the size of individual electronic devices increases. There is also a problem that surface mounting that is advantageous for downsizing an electronic system incorporating an electronic device cannot be performed.

また、導電性の金属板等から成る封止用基板の場合であれば、金属板に電極パッド等の導体パターンを形成することができるように、一旦ガラスやセラミックスで金属板の表面に形成したパターン溝等を埋めて絶縁部を形成したり、その絶縁部の表面に、実装工程の途中で導体部を形成したりする必要があるため、この場合も、電子部品の実装工程を短くすることが困難であるという問題があった。   In the case of a sealing substrate made of a conductive metal plate or the like, it is once formed on the surface of the metal plate with glass or ceramic so that a conductor pattern such as an electrode pad can be formed on the metal plate. Since it is necessary to fill the pattern groove etc. to form an insulating part, or to form a conductor part on the surface of the insulating part in the middle of the mounting process, also in this case, shorten the mounting process of the electronic component. There was a problem that was difficult.

さらに、微小電子機械機構(MEMS)を形成した電子部品においては、近年、低電圧駆動かつ高速化が行われるようになってきており、電子部品の外部から侵入する高調波ノイズの影響を受けやすく、配線導体を伝わり外部より伝播してきた高周波ノイズにより電気特性の変化やMEMS領域の破壊などが起こる。また同時に、配線導体を伝播する信号に含まれる高調波ノイズが電子部品の外部に放出され易いものとなってきていることから、電子部品の外部の近接位置にノイズ発生源があると絶縁基板に被着形成された配線導体を伝播する信号に電磁波ノイズが入り込み、微小電子機械機構に伝播されて誤動作させてしまったり、また電子部品の駆動部を破壊してしまったり、あるいは電子部品の外部の近傍位置に電磁波ノイズに対して影響を受け易い電子機器等があると電子部品より放出された電磁波ノイズがこの電子機器等に悪影響を及ぼしてしまったりするという問題があった。また、高周波ノイズの影響を低減するために、チップインダクタをMEMSの近傍に実装したり、プリント板に導体パターンを用いて作製するなどの手法が取られており、その結果実装面積が大きくなるという問題点があった。   Further, in recent years, electronic components formed with micro-electromechanical mechanisms (MEMS) have been driven at low voltage and increased in speed, and are easily affected by harmonic noise that enters from outside the electronic components. The high-frequency noise transmitted from the outside through the wiring conductor causes a change in electrical characteristics or destruction of the MEMS region. At the same time, harmonic noise contained in the signal propagating through the wiring conductor has become easy to be emitted to the outside of the electronic component. Therefore, if there is a noise source near the outside of the electronic component, the insulating substrate Electromagnetic noise enters the signal propagating through the deposited wiring conductor and propagates to the micro-electromechanical mechanism, causing malfunctions, or destroying the drive part of the electronic component, or external to the electronic component. If there is an electronic device or the like that is easily affected by electromagnetic noise at a nearby position, there is a problem that the electromagnetic noise emitted from the electronic component may adversely affect the electronic device or the like. In addition, in order to reduce the influence of high-frequency noise, techniques such as mounting a chip inductor near the MEMS or using a conductive pattern on a printed board are taken, resulting in an increase in mounting area. There was a problem.

本発明は上記従来の技術における諸問題に鑑みて完成されたものであり、その目的は、半導体基板の主面に形成された微小電子機械機構を容易かつ確実に封止することができるとともに、微小電子機械機構に接続された半導体基板の主面に形成されている電極を容易かつ確実に、例えば表面実装が可能な形態で外部接続させることができ、かつ前記微小電子機械機構を形成した電子部品の外部から侵入する高調波ノイズの影響を受けにくいと同時に、配線導体を伝播する信号に含まれる高調波ノイズが電子部品の外部に放出されにくい電子部品封止用基板を提供することにある。   The present invention has been completed in view of the above-described problems in the prior art, and its purpose is to easily and reliably seal the microelectromechanical mechanism formed on the main surface of the semiconductor substrate, Electrodes formed on the main surface of the semiconductor substrate connected to the microelectromechanical mechanism can be easily and reliably externally connected in a form that can be surface-mounted, for example, and the electron that forms the microelectromechanical mechanism To provide an electronic component sealing substrate that is not easily affected by harmonic noise entering from the outside of the component, and at the same time, the harmonic noise contained in the signal propagating through the wiring conductor is not easily emitted to the outside of the electronic component. .

本発明の電子部品封止用基板は、半導体基板と該半導体基板の主面に形成される微小電子機械機構と該微小電子機械機構に電気的に接続される電極とを有する電子部品の前記の微小電子機械機構を気密封止するための電子部品封止用基板であって、一方主面が前記の半導体基板の前記の主面に接合される絶縁基板と、前記の絶縁基板の前記の一方主面上に設けられ、前記の微小電子機械機構を取り囲んで前記の微小機械機構を気密封止するための導電性枠状封止体と、前記の絶縁基板の内部に形成され、前記の電極に電気的に接続される第1配線導体と、前記の絶縁基板の内部に形成され、前記の導電性枠状封止体に電気的に接続される第2配線導体と、前記の絶縁基板の内部に形成されるとともに前記の第1配線導体に電気的に接続される、インダクタとして作用する第3配線導体とを備え、前記の第1配線導体は、一端が前記の絶縁基板の前記の一方主面に導出され、他端が前記の絶縁基板の他方主面または側面に導出され、前記の第2配線導体は、一端が前記の絶縁基板の前記の一方主面に導出されて前記の導電性枠状封止体に電気的に接続されるとともに、他端が前記の絶縁基板の他方主面または側面に導出されるThe electronic component sealing substrate according to the present invention is the electronic component having the semiconductor substrate, the microelectromechanical mechanism formed on the main surface of the semiconductor substrate, and the electrode electrically connected to the microelectromechanical mechanism. An electronic component sealing substrate for hermetically sealing a microelectromechanical mechanism, wherein one main surface is bonded to the main surface of the semiconductor substrate, and the one of the insulating substrates A conductive frame-shaped sealing body which is provided on a main surface and surrounds the microelectromechanical mechanism and hermetically seals the micromechanical mechanism; and the electrode formed on the insulating substrate. A first wiring conductor that is electrically connected to the first wiring conductor, a second wiring conductor that is formed inside the insulating substrate and is electrically connected to the conductive frame-shaped sealing body, and the insulating substrate Formed inside and electrically connected to the first wiring conductor A third wiring conductor acting as an inductor, wherein the first wiring conductor has one end led out to the one main surface of the insulating substrate and the other end to the other main surface or side surface of the insulating substrate. One end of the second wiring conductor is led out to the one main surface of the insulating substrate and is electrically connected to the conductive frame-shaped sealing body, and the other end is connected to the second wiring conductor. It leads to the other main surface or side surface of the insulating substrate .

好ましくは、前記の第1配線導体の前記の一端は、前記の導電性枠状封止体の内側に位置している。また、好ましくは、前記の第2配線導体は、前記の絶縁基板の内部に形成された貫通導体を有する。好ましくは、前記の絶縁基板は、複数の絶縁層を積層して成る積層体であり、前記の第2配線導体は、前記の絶縁層を貫通する貫通導体を有する。好ましくは、前記の第2配線導体は、少なくとも一部が前記の第1配線導体に平行に配置されている。Preferably, the one end of the first wiring conductor is located inside the conductive frame-shaped sealing body. Preferably, the second wiring conductor has a through conductor formed inside the insulating substrate. Preferably, the insulating substrate is a laminated body formed by laminating a plurality of insulating layers, and the second wiring conductor has a through conductor penetrating the insulating layer. Preferably, at least a part of the second wiring conductor is arranged in parallel to the first wiring conductor.

好ましくは、前記の絶縁基板は、ガラスセラミックス焼結体からなる。前記の電子部品封止用基板は、好ましくは、前記の絶縁基板の前記の一方主面に形成され、前記の第1配線導体の前記の一端に電気的に接続された接続パッドと、前記の接続パッド上に形成され、前記の電極と電気的に接続された接続端子とを備える。好ましくは、前記の電子部品封止用基板を断面視したときに、前記の導電性枠状封止体は、前記の絶縁基板の端部より内方に位置している。Preferably, the insulating substrate is made of a glass ceramic sintered body. The electronic component sealing substrate is preferably formed on the one main surface of the insulating substrate and electrically connected to the one end of the first wiring conductor; And a connection terminal formed on the connection pad and electrically connected to the electrode. Preferably, when the electronic component sealing substrate is viewed in cross section, the conductive frame-shaped sealing body is positioned inward from an end portion of the insulating substrate.

本発明の電子装置は、半導体基板と該半導体基板の主面に形成される微小電子機械機構と該微小電子機械機構に電気的に接続される電極とを有する電子部品と、一方主面が前記の半導体基板の前記の主面に接合される絶縁基板と、前記の絶縁基板の前記の一方主面上に設けられ、前記の微小電子機械機構を取り囲んで前記の微小機械機構を気密封止するための導電性枠状封止体と、前記の絶縁基板の内部に形成された第1配線導体および第2配線導体と、前記の絶縁基板の内部に形成されるとともに前記の第1配線導体に電気的に接続される、インダクタとして作用する第3配線導体とを備え、前記の第1配線導体は、一端が前記の絶縁基板の前記の一方主面に導出されて前記の電極に電気的に接続されるとともに、他端が前記の絶縁基板の他方主面または側面に導出され、前記の第2配線導体は、一端が前記の絶縁基板の前記の一方主面に導出されて前記の導電性枠状封止体に電気的に接続されるとともに、他端が前記の絶縁基板の他方主面または側面に導出される。好ましくは、前記の電子装置を断面視したときに、前記の半導体基板と前記の絶縁基板は、両端が揃っている。好ましくは、前記の電子装置を断面視したときに、前記の導電性枠状封止体は、前記の半導体基板の断面より内方に位置している。The electronic device of the present invention includes an electronic component having a semiconductor substrate, a microelectromechanical mechanism formed on the main surface of the semiconductor substrate, and an electrode electrically connected to the microelectromechanical mechanism, and one main surface is the above-mentioned An insulating substrate bonded to the main surface of the semiconductor substrate and the one main surface of the insulating substrate, and surrounds the micro electro mechanical mechanism and hermetically seals the micro mechanical mechanism. A conductive frame-shaped sealing body, a first wiring conductor and a second wiring conductor formed inside the insulating substrate, and the first wiring conductor formed inside the insulating substrate. A third wiring conductor that acts as an inductor and is electrically connected. One end of the first wiring conductor is led out to the one main surface of the insulating substrate and electrically connected to the electrode. And the other end of the insulating substrate One end of the second wiring conductor is led out to the one main surface of the insulating substrate and is electrically connected to the conductive frame-shaped sealing body. The other end is led to the other main surface or side surface of the insulating substrate. Preferably, when the electronic device is viewed in cross section, the semiconductor substrate and the insulating substrate are aligned at both ends. Preferably, when the electronic device is viewed in cross section, the conductive frame-shaped sealing body is located inward from the cross section of the semiconductor substrate.

本発明の電子部品封止用基板によれば、導体基板と該半導体基板の主面に形成される微小電子機械機構と該微小電子機械機構に電気的に接続される電極とを有する電子部品の微小電子機械機構を気密封止するための電子部品封止用基板であって、一方主面が半導体基板の主面に接合される絶縁基板と、絶縁基板の一方主面上に設けられ、微小電子機械機構を取り囲んで微小機械機構を気密封止するための導電性枠状封止体と、絶縁基板の内部に形成され、電極に電気的に接続される第1配線導体と、絶縁基板の内部に形成され、導電性枠状封止体に電気的に接続される第2配線導体と、絶縁基板の内部に形成されるとともに第1配線導体に電気的に接続される、インダクタとして作用する第3配線導体とを備え、第1配線導体は、一端が絶縁基板の一方主面に導出され、他端が絶縁基板の他方主面または側面に導出され、第2配線導体は、一端が絶縁基板の一方主面に導出されて導電性枠状封止体に電気的に接続されるとともに、他端が絶縁基板の他方主面または側面に導出されることから、電子部品の微小電子機械機構を、導電性枠状封止体と絶縁基板とにより容易かつ確実に封止することができる。 According to the electronic component sealing substrate of the present invention, an electronic component having a conductor substrate, a microelectromechanical mechanism formed on the main surface of the semiconductor substrate, and an electrode electrically connected to the microelectromechanical mechanism. An electronic component sealing substrate for hermetically sealing a microelectromechanical mechanism, wherein one main surface is bonded to the main surface of the semiconductor substrate, and the one main surface of the insulating substrate is provided on the main surface. A conductive frame-shaped encapsulant for hermetically sealing the micromechanical mechanism surrounding the electronic mechanical mechanism, a first wiring conductor formed inside the insulating substrate and electrically connected to the electrode, and an insulating substrate A second wiring conductor formed inside and electrically connected to the conductive frame-shaped sealing body, and an inductor formed inside the insulating substrate and electrically connected to the first wiring conductor A third wiring conductor, and the first wiring conductor is insulated at one end Leaded to one main surface of the plate, the other end led to the other main surface or side surface of the insulating substrate, and one end of the second wiring conductor was led to one main surface of the insulating substrate to form a conductive frame-shaped sealing body Since it is electrically connected and the other end is led out to the other main surface or side surface of the insulating substrate, the microelectromechanical mechanism of the electronic component can be easily and reliably formed by the conductive frame-shaped sealing body and the insulating substrate. Can be sealed.

また、枠部材の主面の高さが、接続パッド上に形成された接続端子の高さと同じである場合には、枠部材の主面を半導体基板の主面に接合するときに、半導体基板の主面に形成されている電極を接続端子に容易かつ確実に接続することができる。また、この接続端子から接続パッドおよび配線導体を介して、電子部品の電極を外部に導出することもできる。 Further, when the height of the main surface of the frame member is the same as the height of the connection terminal formed on the connection pad, when the main surface of the frame member is joined to the main surface of the semiconductor substrate, the semiconductor substrate The electrode formed on the main surface can be easily and reliably connected to the connection terminal. Moreover, the electrode of an electronic component can also be derived | led-out outside from this connection terminal via a connection pad and a wiring conductor.

さらに、絶縁基板中にインダクタとしての導体パターンを形成したことにより、導体パターンを伝播しMEMSに侵入してくる高周波ノイズを有効に除去することができ、その結果MEMSの動作の信頼性を高めることができ、またMEMSを搭載する外部電子回路基板に対する実装面積を小さくすることができる。   Furthermore, by forming a conductor pattern as an inductor in the insulating substrate, high-frequency noise that propagates through the conductor pattern and enters the MEMS can be effectively removed, and as a result, the reliability of the MEMS operation is improved. In addition, the mounting area for the external electronic circuit board on which the MEMS is mounted can be reduced.

また、本発明の電子部品封止用基板は、例えば、セラミック多層配線基板等の絶縁基板を用いて形成したものとすることにより、配線導体を、接続パッドや枠部材が形成され接合されている一方主面から他方主面や側面にかけて、基板の内部や表面に自由に形成して導出させることができ、この導出された端部に外部接続用の金属バンプを取着させること等により、外部電気回路基板に容易に表面実装することが可能な電子装置として完成させることができる。   Further, the electronic component sealing substrate of the present invention is formed by using an insulating substrate such as a ceramic multilayer wiring substrate, for example, so that the wiring conductor is bonded to the connection pad or the frame member. From one main surface to the other main surface or side surface, it can be freely formed inside and on the surface of the substrate and led out, and by attaching metal bumps for external connection to this led end, etc. An electronic device that can be easily surface-mounted on an electric circuit board can be completed.

また、本発明の電子部品封止用基板において、接続パッドおよび接続端子が内側に形成された枠部材を多数個縦横に配列形成した場合には、半導体基板の主面に多数の電子部品領域が縦横に配列形成されていたとしても、これらを一括して外部接続が可能なようにして封止することができる。   In addition, in the electronic component sealing substrate of the present invention, when a large number of frame members having connection pads and connection terminals formed inside are arranged in the vertical and horizontal directions, a large number of electronic component regions are formed on the main surface of the semiconductor substrate. Even if they are arranged vertically and horizontally, they can be sealed together so that they can be externally connected together.

また本発明の電子装置の製造方法によれば、上記各工程を具備することから、縦横に配列形成された多数個の電子部品領域について、それぞれの電極の外部接続のための接続と微小電子機械機構の封止とを同時に行なうことができるため、互いに接合された電子部品および電子部品封止用基板から成る電子装置を、容易かつ確実に多数個製造することができる。   In addition, according to the method for manufacturing an electronic device of the present invention, since each of the above steps is provided, connection for external connection of each electrode and a microelectronic machine are performed for a large number of electronic component regions arranged vertically and horizontally. Since the mechanism can be sealed at the same time, a large number of electronic devices composed of electronic components and electronic component sealing substrates bonded to each other can be manufactured easily and reliably.

また、互いに接合された電子部品および電子部品封止用基板を電子部品封止領域毎に分割することにより、電子部品封止領域に電子部品領域が接合されて成る個々の電子装置を多数個同時に製造することができる。この分割の際、電子部品領域の微小電子機械機構は封止用基板により封止されているので、ダイシング加工等による分割で発生するシリコン等の半導体基板の切削粉が微小電子機械機構に付着するようなことはなく、分割後の電子装置において微小電子機械機構を確実に作動させることができる。   In addition, by dividing the electronic component and the electronic component sealing substrate bonded to each other into each electronic component sealing region, a large number of individual electronic devices formed by bonding the electronic component region to the electronic component sealing region can be simultaneously performed. Can be manufactured. At the time of the division, the micro electro mechanical mechanism in the electronic component region is sealed by the sealing substrate, so that the cutting powder of the semiconductor substrate such as silicon generated by the dicing process or the like adheres to the micro electro mechanical mechanism. There is no such thing, and the micro electromechanical mechanism can be reliably operated in the divided electronic device.

また、分割して得られた電子装置は、絶縁基板の他方主面や側面に配線導体が導出されているので、この導出された端部に金属バンプ等の端子を取着するだけで、表面実装等により外部電気回路基板に実装することができるものとなり、実装の工程を非常に短く、かつ容易なものとすることができる電子装置となる。   Moreover, since the wiring conductor is led out to the other main surface or side surface of the insulating substrate, the electronic device obtained by dividing the surface can be obtained by simply attaching a terminal such as a metal bump to the lead end. The electronic device can be mounted on the external electric circuit board by mounting or the like, and the mounting process can be made extremely short and easy.

本発明の電子部品封止用基板およびそれを用いた電子装置の製造方法について以下に詳細に説明する。図1は本発明の電子部品封止用基板の実施の形態の一例を示す断面図である。図1において、1は絶縁基板、2は配線導体、3は接続パッド、4は枠部材、5は接続端子である。これら絶縁基板1,配線導体2,接続パッド3,枠部材4および接続端子5により電子部品封止用基板6が基本的に形成される。   The electronic component sealing substrate of the present invention and an electronic device manufacturing method using the same will be described in detail below. FIG. 1 is a sectional view showing an example of an embodiment of an electronic component sealing substrate of the present invention. In FIG. 1, 1 is an insulating substrate, 2 is a wiring conductor, 3 is a connection pad, 4 is a frame member, and 5 is a connection terminal. The insulating substrate 1, the wiring conductor 2, the connection pad 3, the frame member 4 and the connection terminal 5 basically form an electronic component sealing substrate 6.

この電子部品封止用基板6を用いて、半導体基板7の主面(図1の例では下面)に、微小電子機械機構8と電極9とを互いに電気的に接続するようにして形成して成る電子部品10を封止することにより、微小電子機械機構8が外部接続可能な状態で封止されてなる電子装置が形成される。   The electronic component sealing substrate 6 is used to form a microelectromechanical mechanism 8 and an electrode 9 on the main surface (lower surface in the example of FIG. 1) of the semiconductor substrate 7 so as to be electrically connected to each other. By sealing the electronic component 10 formed, an electronic device is formed in which the microelectromechanical mechanism 8 is sealed in a state where it can be externally connected.

本実施の形態による微小電子機械機構8は、例えば電気スイッチ,インダクタ,キャパシタ,共振器,アンテナ,マイクロリレー,光スイッチ,ハードディスク用磁気ヘッド,マイク,バイオセンサー,DNAチップ,マイクロリアクタ,プリントヘッド,加速度センサ,圧力センサなどの各種センサ、ディスプレイデバイスなどの機能を有する電子装置であり、半導体微細加工技術を基本としたいわゆるマイクロマシニング法で作る部品であり、1素子あたり10μm〜数百μm程度の寸法を有する。 The microelectromechanical mechanism 8 according to the present embodiment includes, for example, an electric switch, an inductor, a capacitor, a resonator, an antenna, a microrelay, an optical switch, a magnetic head for a hard disk, a microphone, a biosensor, a DNA chip, a microreactor, a printhead, and an acceleration. It is an electronic device that has the functions of various sensors such as sensors and pressure sensors, display devices, etc., and is a part made by a so-called micromachining method based on semiconductor microfabrication technology, and has a size of about 10 μm to several hundred μm per element. Have

絶縁基板1は、微小電子機械機構8を封止するための蓋体として機能するとともに、配線導体2,接続パッド3,枠部材4および接続端子5を形成するための基体として機能する。この絶縁基板1は、酸化アルミニウム質焼結体や窒化アルミニウム質焼結体,ムライト質焼結体,炭化珪素質焼結体,窒化珪素質焼結体,ガラスセラミックス焼結体等のセラミックス材料や、ポリイミド,ガラスエポキシ樹脂等の有機樹脂材料、セラミックスやガラス等の無機粉末をエポキシ樹脂等の有機樹脂で結合して成る複合材等により形成される。絶縁基板1は、例えば、酸化アルミニウム質焼結体から成る場合、酸化アルミニウムとガラス粉末等の原料粉末をシート上に成形して成るセラミックグリーンシート(以下、グリーンシートともいう)を積層し、焼成することにより形成される。なお、絶縁基板1は、酸化アルミニウム質焼結体で形成するものに限らず、用途や気密封止する電子部品10の特性等に応じて適したものを選択することが好ましい。   The insulating substrate 1 functions as a lid for sealing the microelectromechanical mechanism 8 and also functions as a base for forming the wiring conductor 2, the connection pad 3, the frame member 4, and the connection terminal 5. The insulating substrate 1 includes ceramic materials such as an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body, a silicon carbide sintered body, a silicon nitride sintered body, and a glass ceramic sintered body. It is formed of an organic resin material such as polyimide or glass epoxy resin, or a composite material formed by bonding inorganic powder such as ceramics or glass with an organic resin such as epoxy resin. For example, when the insulating substrate 1 is made of an aluminum oxide sintered body, a ceramic green sheet (hereinafter also referred to as a green sheet) formed by forming aluminum oxide and a raw material powder such as glass powder on the sheet is laminated and fired. It is formed by doing. The insulating substrate 1 is not limited to the one formed of an aluminum oxide sintered body, and it is preferable to select a substrate that is suitable for the application and the characteristics of the electronic component 10 to be hermetically sealed.

例えば、絶縁基板1は、後述するように、枠部材4を介して半導体基板7と機械的に接合されるので、半導体基板7との接合の信頼性、つまり微小電子機械機構8の封止の気密性を高くするためには、ムライト質焼結体から成るか、または、例えばガラス成分の種類や添加量を調整することにより熱膨張係数を半導体基板7に近似させるようにした酸化アルミニウム−ホウ珪酸ガラス系等のガラスセラミックス焼結体等のような半導体基板7との熱膨張係数の差が小さい材料で形成することが好ましい。   For example, since the insulating substrate 1 is mechanically bonded to the semiconductor substrate 7 via the frame member 4 as will be described later, the reliability of bonding with the semiconductor substrate 7, that is, the sealing of the micro electro mechanical mechanism 8 is achieved. In order to increase the airtightness, the aluminum oxide-boron is made of a mullite sintered body, or the thermal expansion coefficient is approximated to that of the semiconductor substrate 7 by adjusting, for example, the kind and addition amount of the glass component. It is preferable to form with a material having a small difference in thermal expansion coefficient from the semiconductor substrate 7 such as a glass ceramic sintered body such as a silicate glass.

また、絶縁基板1は、配線導体2により伝送される電気信号の遅延を防止するような場合には、ポリイミド,ガラスエポキシ樹脂等の有機樹脂材料、セラミックスやガラス等の無機粉末をエポキシ樹脂等の有機樹脂で結合して成る複合材、または、酸化アルミニウム−ホウ珪酸ガラス系や酸化リチウム系等のガラスセラミックス焼結体等のような、比誘電率の小さい材料で形成することが好ましい。   Further, in the case of preventing the delay of the electrical signal transmitted by the wiring conductor 2, the insulating substrate 1 is made of an organic resin material such as polyimide or glass epoxy resin, or an inorganic powder such as ceramic or glass such as epoxy resin. It is preferable to form a composite material formed by bonding with an organic resin, or a material having a low relative dielectric constant, such as an aluminum oxide-borosilicate glass-based or lithium oxide-based glass ceramic sintered body.

また、絶縁基板1は、封止する微小電子機械機構8の発熱量が大きく、この熱の外部への放散性を良好とするような場合には、窒化アルミニウム質焼結体等のような熱伝導率の大きな材料で形成することが好ましい。   Further, the insulating substrate 1 has a large calorific value of the microelectromechanical mechanism 8 to be sealed, and in the case where the heat dissipating property is good, a heat such as an aluminum nitride sintered body is used. It is preferable to form with a material having high conductivity.

また、絶縁基板1の一方主面に、電子部品10の微小電子機械機構8を内側に収めるような凹部1aを形成しておいてもよい。凹部1a内に微小電子機械機構8の一部を収めるようにしておくと、微小電子機械機構8を取り囲むための枠部材4の高さを低く抑えることができ、電子装置の低背化に有利なものとなる。   In addition, a concave portion 1a may be formed on one main surface of the insulating substrate 1 so as to accommodate the microelectromechanical mechanism 8 of the electronic component 10 inside. If a part of the micro electro mechanical mechanism 8 is accommodated in the recess 1a, the height of the frame member 4 surrounding the micro electro mechanical mechanism 8 can be kept low, which is advantageous for reducing the height of the electronic device. It will be something.

絶縁基板1の一方主面(微小電子機械機構8を封止する側の主面)からは、他方主面または側面に配線導体2が導出されている。また、絶縁基板1の一方主面側の枠部材4の内側の部位には、配線導体2に接続された接続パッド3が形成されている。これらの配線導体2および接続パッド3は、接続パッド3上に形成される接続端子5を介して電子部品10の電極9と電気的に接続され、これを絶縁基板1の他方主面や側面に導出する機能を有する。   From one main surface of the insulating substrate 1 (main surface on the side where the micro electro mechanical mechanism 8 is sealed), the wiring conductor 2 is led out to the other main surface or side surface. Further, a connection pad 3 connected to the wiring conductor 2 is formed in a portion inside the frame member 4 on the one main surface side of the insulating substrate 1. The wiring conductor 2 and the connection pad 3 are electrically connected to the electrode 9 of the electronic component 10 through the connection terminal 5 formed on the connection pad 3, and this is connected to the other main surface or side surface of the insulating substrate 1. It has a function to derive.

これらの配線導体2および接続パッド3は、銅,銀,金,パラジウム,タングステン,モリブデン,マンガン等の金属材料により形成される。配線導体2および接続パッド3の形成の手段としては、メタライズ層形成法,めっき法,蒸着法等の金属を薄膜層として被着させる手段を用いることができる。例えば、タングステンのメタライズ層から成る場合であれば、タングステンのペーストを絶縁基板1となるグリーンシートに印刷してこれをグリーンシートとともに焼成することにより形成される。   These wiring conductors 2 and connection pads 3 are formed of a metal material such as copper, silver, gold, palladium, tungsten, molybdenum, and manganese. As a means for forming the wiring conductor 2 and the connection pad 3, a means for depositing a metal as a thin film layer, such as a metallized layer forming method, a plating method, or a vapor deposition method, can be used. For example, in the case of a tungsten metallized layer, it is formed by printing a tungsten paste on a green sheet to be the insulating substrate 1 and firing it together with the green sheet.

接続端子5は、錫−銀系,錫−銀−銅系等の半田、金−錫ろう等の低融点ろう材、銀−ゲルマニウム系等の高融点ろう材、導電性有機樹脂で形成されるか、またはシーム溶接,電子ビーム溶接等の溶接法による接合を可能とするような金属材料等により形成されている。   The connection terminal 5 is formed of a solder such as tin-silver, tin-silver-copper, a low melting point brazing material such as gold-tin brazing, a high melting point brazing material such as silver-germanium, or a conductive organic resin. Alternatively, it is formed of a metal material or the like that enables joining by a welding method such as seam welding or electron beam welding.

この接続端子5を電子部品10の電極9に接合することにより、電子部品10の電極9が、接続端子5,接続パッド3および配線導体2を介して、絶縁基板1の他方主面または側面に導出される。そして、この導出された端部を外部の電気回路に錫−鉛半田等を介して接合することにより、電子部品10の電極9が外部の電気回路と電気的に接続される。   By joining the connection terminal 5 to the electrode 9 of the electronic component 10, the electrode 9 of the electronic component 10 is connected to the other main surface or side surface of the insulating substrate 1 via the connection terminal 5, the connection pad 3 and the wiring conductor 2. Derived. And the electrode 9 of the electronic component 10 is electrically connected with an external electric circuit by joining this derived | led-out edge part to an external electric circuit via tin-lead solder etc. FIG.

また、絶縁基板1の一方主面には、接続パッド3を取り囲むようにして枠部材4が接合されている。枠部材4は、電子部品10の微小電子機械機構8をその内側に気密封止するための側壁として機能する。この枠部材4の主面(図1の例では上面)を電子部品10の主面(図1の例では下面)に接合させることにより、枠部材4の内側に微小電子機械機構8が気密封止される。なお、この場合、半導体基板7が底板となり、絶縁基板1が蓋体となる。   A frame member 4 is joined to one main surface of the insulating substrate 1 so as to surround the connection pad 3. The frame member 4 functions as a side wall for hermetically sealing the microelectromechanical mechanism 8 of the electronic component 10 inside thereof. By joining the main surface (upper surface in the example of FIG. 1) of the frame member 4 to the main surface (lower surface in the example of FIG. 1) of the electronic component 10, the micro electromechanical mechanism 8 is hermetically sealed inside the frame member 4. Stopped. In this case, the semiconductor substrate 7 serves as a bottom plate and the insulating substrate 1 serves as a lid.

枠部材4は、鉄−ニッケル−コバルト合金や鉄−ニッケル合金等の鉄−ニッケル系合金,無酸素銅,アルミニウム,ステンレス鋼,銅−タングステン合金,銅−モリブデン合金等の金属材料や、酸化アルミニウム質焼結体,ガラスセラミックス焼結体等の無機系材料、あるいはPTFE(ポリテトラフルオロエチレン),ガラスエポキシ樹脂等の有機樹脂系材料等により形成される。   The frame member 4 is made of an iron-nickel alloy such as iron-nickel-cobalt alloy or iron-nickel alloy, a metal material such as oxygen-free copper, aluminum, stainless steel, copper-tungsten alloy, copper-molybdenum alloy, or aluminum oxide. It is made of an inorganic material such as a sintered material and a glass ceramic sintered material, or an organic resin material such as PTFE (polytetrafluoroethylene) and glass epoxy resin.

また、枠部材4の主面を電子部品10の半導体基板7の主面に接合する方法としては、錫−銀系等の半田,金−錫ろう等の低融点ろう材,銀−ゲルマニウム系等の高融点ろう材,導電性有機樹脂等の接合材を介して接合する方法、あるいはシーム溶接,電子ビーム溶接等の溶接法を用いることができる。   Further, as a method of joining the main surface of the frame member 4 to the main surface of the semiconductor substrate 7 of the electronic component 10, solder such as tin-silver type, low melting point brazing material such as gold-tin brazing, silver-germanium type, etc. It is possible to use a bonding method such as a high melting point brazing material, a conductive organic resin, or a welding method such as seam welding or electron beam welding.

そして、半導体基板7の主面に微小電子機械機構8およびこれに電気的に接続された電極9が形成されて成る電子部品10について、電極9を接続端子5に接合し、半導体基板7の主面を枠部材4の主面に接合させることによって、枠部材4の内側に電子部品10の微小電子機械機構8が気密封止された電子装置が形成される。   Then, for the electronic component 10 in which the microelectromechanical mechanism 8 and the electrode 9 electrically connected thereto are formed on the main surface of the semiconductor substrate 7, the electrode 9 is joined to the connection terminal 5. By joining the surface to the main surface of the frame member 4, an electronic device in which the microelectromechanical mechanism 8 of the electronic component 10 is hermetically sealed inside the frame member 4 is formed.

そして、この絶縁基板中にはインダクタ12としての導体パターンが形成されている。インダクタ12は高周波信号に対し高いインピーダンスを有するものとなり、MEMSが駆動中に外部より高周波ノイズが伝播してきても、高周波ノイズはインダクタ12によって選択的にカットされ、MEMSに対する悪影響を低減することができる。   A conductor pattern as the inductor 12 is formed in the insulating substrate. The inductor 12 has a high impedance with respect to a high-frequency signal, and even if high-frequency noise propagates from the outside during the driving of the MEMS, the high-frequency noise is selectively cut by the inductor 12 and the adverse effect on the MEMS can be reduced. .

インダクタ12としての導体パターンは、たとえばストリップライン,マイクロストリップライン,コプレナラインなどを用いたスパイラル形状,ミアンダ形状,コの字型などの形状パターンである。また、インダクタ12のインダクタンスは0.5nH〜100nH程度がよく、0.5nHよりも小さくなるとノイズがカットされなくなり、100nHよりも大きくなると小型化の観点から不利になる。   The conductor pattern as the inductor 12 is, for example, a shape pattern such as a spiral shape, a meander shape, or a U shape using a strip line, a microstrip line, a coplanar line, or the like. Further, the inductance of the inductor 12 is preferably about 0.5 nH to 100 nH. When the inductance is smaller than 0.5 nH, noise is not cut, and when the inductance is larger than 100 nH, it is disadvantageous from the viewpoint of miniaturization.

なお、このインダクタ12は配線導体2および接続パッド3と同様にして形成され、インダクタ12は配線導体2に電気的に接続されている。   The inductor 12 is formed in the same manner as the wiring conductor 2 and the connection pad 3, and the inductor 12 is electrically connected to the wiring conductor 2.

本実施の形態による電子装置は、配線導体2の導出部分を半田ボール等の外部端子11を介して外部電気回路に接続することにより、微小電子機械機構8が外部電気回路に電気的に接続される。 In the electronic device according to the present embodiment , the microelectromechanical mechanism 8 is electrically connected to the external electric circuit by connecting the lead-out portion of the wiring conductor 2 to the external electric circuit via the external terminal 11 such as a solder ball. The

なお、図1に示すように、枠部材4が接合される絶縁基板1の主面に、接続パッド3と同様の材料により導体層3aを形成しておき、この導体層3aから絶縁基板1の他方主面にかけて配線導体2の一部を導出させるようにしてもよい。この導体層3aから導出された配線導体2の導出部分は、上述の外部端子11等を介して外部電気回路の接地用端子等に接続することができる。   As shown in FIG. 1, a conductor layer 3a is formed of the same material as that of the connection pad 3 on the main surface of the insulating substrate 1 to which the frame member 4 is bonded, and the insulating substrate 1 is formed from the conductor layer 3a. A part of the wiring conductor 2 may be led out over the other main surface. The lead-out portion of the wiring conductor 2 led out from the conductor layer 3a can be connected to the grounding terminal of the external electric circuit or the like via the external terminal 11 or the like.

この場合、接続端子5と電極9との接合、および枠部材4の主面と半導体基板7の主面との接合を一つの工程で確実かつ容易に行なうことを可能とするために、接続端子5の高さと枠部材4の高さとは同じ高さとしておく必要がある。   In this case, in order to enable the bonding of the connection terminal 5 and the electrode 9 and the bonding of the main surface of the frame member 4 and the main surface of the semiconductor substrate 7 to be performed reliably and easily in one step, the connection terminal The height of 5 and the height of the frame member 4 need to be the same height.

また、本実施の形態による電子部品封止用基板6は、図2に実施の形態の他の例を断面図で示すように、接続パッド3および枠部材4を広面積の母基板の一方主面に縦横に配列形成した、いわゆる多数個取りの形態としておくことが好ましい。なお、図2において、図1と同じ部位には同じ符号を付してある。 In addition, the electronic component sealing substrate 6 according to the present embodiment has a connection pad 3 and a frame member 4 as one main substrate of a large area as shown in a sectional view in FIG. It is preferable to use a so-called multi-cavity form in which the surfaces are arranged vertically and horizontally. In FIG. 2, the same parts as those in FIG.

このような多数個取りとしておくと、通常は、半導体基板7の主面に、微小電子機械機構8およびこれに電気的に接続された電極9が多数個配列形成された、多数個取りの形態で製作される電子部品10を、多数個同時に気密封止することができ、生産性に優れたものとすることができる。   If such a large number is taken, usually, a multi-chip form in which a large number of microelectromechanical mechanisms 8 and electrodes 9 electrically connected thereto are arranged on the main surface of the semiconductor substrate 7. A large number of electronic parts 10 manufactured in the above can be hermetically sealed at the same time, and the productivity can be improved.

また、このように、半導体基板7の主面に、微小電子機械機構8およびこれに電気的に接続された電極9が多数個配列形成された、多数個取りの形態で製作される電子部品10を一括して封止しておくと、この半導体基板7(および電子部品封止用基板6)にダイシング加工等の切断加工を施して、個々の電子部品10(電子装置)に分割する際に、切断に伴って発生する切削粉等が微小電子機械機構8に付着してその作動を妨害するという不具合の発生を効果的に防止することができる。   In addition, in this way, an electronic component 10 manufactured in a multi-cavity form in which a large number of microelectromechanical mechanisms 8 and electrodes 9 electrically connected thereto are arranged on the main surface of the semiconductor substrate 7. Are collectively sealed, the semiconductor substrate 7 (and the electronic component sealing substrate 6) is subjected to a cutting process such as a dicing process and divided into individual electronic components 10 (electronic devices). Further, it is possible to effectively prevent the occurrence of a problem that cutting powder or the like generated along with the cutting adheres to the microelectromechanical mechanism 8 and interferes with its operation.

次に、このような電子部品封止用基板6を用いた電子装置の製造方法について、図3(a)〜(e)に基づいて説明する。図3は本発明の電子装置の製造方法の実施の形態の一例をそれぞれ工程順に示した断面図であり、図3において図1および図2と同じ部位には同じ符号を付してある。   Next, a method for manufacturing an electronic device using such an electronic component sealing substrate 6 will be described with reference to FIGS. FIG. 3 is a sectional view showing an example of an embodiment of an electronic device manufacturing method according to the present invention in the order of steps. In FIG. 3, the same parts as those in FIGS. 1 and 2 are denoted by the same reference numerals.

まず、図3(a)に示すように、半導体基板7の主面に、微小電子機械機構8およびこれに電気的に接続された電極9が形成されて成る電子部品領域10aを多数個縦横に配列形成した多数個取りの電子部品10bを準備する。   First, as shown in FIG. 3A, a large number of electronic component regions 10a each having a microelectromechanical mechanism 8 and electrodes 9 electrically connected to the main surface of a semiconductor substrate 7 are formed vertically and horizontally. A multi-piece electronic component 10b having an array formed is prepared.

半導体基板7は、例えば単結晶や多結晶等のシリコン基板から成る。このシリコン基板の表面に酸化シリコン層を形成するとともに、フォトリソグラフィ等の微細配線加工技術を応用して、微小な振動体等の微小電子機械機構8および円形状パターン等の導体から成る電極9が形成された電子部品領域10aを多数個配列形成することにより多数個取りの電子部品10bが形成される。なお、この例においては、微小電子機械機構8と電極9とは、それぞれ半導体基板7の主面に形成された微細配線(図示せず)を介して電気的に接続されている。   The semiconductor substrate 7 is made of a silicon substrate such as a single crystal or polycrystal. A silicon oxide layer is formed on the surface of the silicon substrate, and by applying a fine wiring processing technique such as photolithography, a micro electromechanical mechanism 8 such as a minute vibrating body and an electrode 9 made of a conductor such as a circular pattern are provided. A multi-piece electronic component 10b is formed by arranging a large number of the formed electronic component regions 10a. In this example, the microelectromechanical mechanism 8 and the electrode 9 are electrically connected via fine wiring (not shown) formed on the main surface of the semiconductor substrate 7, respectively.

次に、図3(b)に示すように、一方主面から他方主面または側面に導出された配線導体2が形成された絶縁基板1と、絶縁基板1の一方主面に形成された、配線導体2と電気的に接続された接続パッド3と、絶縁基板1の一方主面に接続パッド3を取り囲むようにして接合された枠部材4と、接続パッド3上に形成された、枠部材4と同じ高さの接続端子5とから成る電子部品封止領域6aを多数個電子部品の電子部品領域10aに対応させて配列形成した多数個取りの電子部品封止用基板6bを準備する。   Next, as shown in FIG. 3B, the insulating substrate 1 on which the wiring conductor 2 led out from the one main surface to the other main surface or the side surface is formed, and the one main surface of the insulating substrate 1 is formed. A connection pad 3 electrically connected to the wiring conductor 2, a frame member 4 joined so as to surround the connection pad 3 on one main surface of the insulating substrate 1, and a frame member formed on the connection pad 3 A plurality of electronic component sealing substrates 6b are prepared in which electronic component sealing regions 6a composed of connection terminals 5 having the same height as 4 are arranged so as to correspond to the electronic component regions 10a of the multiple electronic components.

一方主面から他方主面または側面に導出された配線導体2が形成された絶縁基板1は、例えば、絶縁基板1が酸化アルミニウム質焼結体から成り、配線導体2がタングステンのメタライズ層から成る場合であれば、酸化アルミニウム,酸化珪素,酸化カルシウム等の原料粉末を、有機樹脂バインダとともに混練してスラリーを得て、このスラリーをドクターブレード法やリップコータ法等によりシート状に成形して複数のグリーンシートを形成し、このグリーンシートの表面および必要に応じてグリーンシートに予め形成しておいた貫通孔内に、タングステンのメタライズペーストを印刷塗布して充填し、その後、これらのグリーンシートを積層して焼成することにより形成することができる。   Insulating substrate 1 on which wiring conductor 2 led out from one main surface to the other main surface or side surface is formed, for example, insulating substrate 1 is made of an aluminum oxide sintered body, and wiring conductor 2 is made of a metallized layer of tungsten. In some cases, raw powders such as aluminum oxide, silicon oxide, and calcium oxide are kneaded together with an organic resin binder to obtain a slurry, and this slurry is formed into a sheet shape by a doctor blade method, a lip coater method, or the like. Form a green sheet, fill and fill the surface of the green sheet and, if necessary, through the pre-formed through holes in the green sheet with tungsten metallized paste, and then stack these green sheets Then, it can be formed by firing.

なお、これらのグリーンシートのうち、一部のものに打ち抜き加工を施して四角形状等の開口部を形成しておき、これを一方主面側の最表層に配置し、または最表層から内部に向かって数層積層するようにして、焼成後の絶縁基板1の一方主面に、電子部品領域10aの配列に対応する凹部1aが配列形成されるようにしておいてもよい。このように凹部1aを形成しておくと、この凹部1aの内側に微小電子機械機構8を収めることができるので、微小電子機械機構8を取り囲むための枠部材4の高さを低く抑えることができ、電子装置の低背化に有利なものとなる。   Of these green sheets, some of them are punched to form square-shaped openings, etc., which are arranged on the outermost layer on one main surface side, or from the outermost layer to the inside. A plurality of layers may be laminated so that the recesses 1a corresponding to the arrangement of the electronic component regions 10a may be formed on one main surface of the fired insulating substrate 1 in an array. If the concave portion 1a is formed in this manner, the micro electro mechanical mechanism 8 can be accommodated inside the concave portion 1a, so that the height of the frame member 4 surrounding the micro electro mechanical mechanism 8 can be kept low. This is advantageous for reducing the height of the electronic device.

また、接続パッド3は、通常、配線導体2と同様の材料から成り、例えば、タングステンのペーストを絶縁基板1となるグリーンシートのうち最表面に、配線導体2となる印刷されたタングステンペーストと接続されるようにして、かつ多数個が縦横に配列形成されるようにして、スクリーン印刷法等により印刷しておくことにより形成される。   The connection pad 3 is usually made of the same material as that of the wiring conductor 2. For example, a tungsten paste is connected to the printed tungsten paste to be the wiring conductor 2 on the outermost surface of the green sheet to be the insulating substrate 1. In this manner, a large number are arranged in rows and columns and printed by screen printing or the like.

また、枠部材4は、例えば、鉄−ニッケル−コバルト合金から成る場合であれば、鉄−ニッケル−コバルト合金の金属板に圧延加工や金型による打ち抜き加工またはエッチング加工を行ない、枠状に成形することにより製作される。   Further, if the frame member 4 is made of, for example, an iron-nickel-cobalt alloy, the metal plate of the iron-nickel-cobalt alloy is subjected to a rolling process, a punching process using a mold, or an etching process to form a frame shape. It is manufactured by doing.

枠部材4と絶縁基板1との接合は、錫−銀系等の半田,金−錫ろう等の低融点ろう材や銀−ゲルマニウム系等の高融点ろう材,導電性有機樹脂等の接合材を介して接合する方法、あるいはシーム溶接,電子ビーム溶接等の溶接法により行なうことができる。   The frame member 4 and the insulating substrate 1 are joined by a solder such as a tin-silver solder, a low-melting solder such as gold-tin solder, a high-melting solder such as a silver-germanium, or a conductive organic resin. It can be carried out by a method of joining via a welding method or a welding method such as seam welding or electron beam welding.

この枠部材4と同じ高さとなるようにして、接続端子5が接続パッド3上に形成される。接続端子5は、例えば、錫−銀系等の半田から成る場合であれば、この半田のボールを接続パッド3上に位置決めして加熱溶融し接合させることにより形成される。   Connection terminals 5 are formed on the connection pads 3 so as to have the same height as the frame member 4. If the connection terminal 5 is made of, for example, tin-silver solder, the connection terminal 5 is formed by positioning the solder ball on the connection pad 3, heating and melting it.

接続端子5の高さを枠部材4の高さと同じとする方法としては、例えば、接続端子5となる錫−銀半田を溶融させて接続パッド3上に取着形成する際に、その上面を枠部材4と同じ高さとなるようにしてセラミックス製の治具等で押さえておく等の方法を用いることができる。   As a method of making the height of the connection terminal 5 the same as the height of the frame member 4, for example, when the tin-silver solder used as the connection terminal 5 is melted and formed on the connection pad 3, the upper surface thereof is changed. It is possible to use a method such as pressing with a ceramic jig or the like so as to be the same height as the frame member 4.

次に、図3(c)に示すように、電子部品10bを電子部品封止用基板6bに対し各電子部品領域10aと各電子部品封止領域6aとを対応させて重ね合わせ、電極9を接続端子5に接合するとともに、微小電子機械機構8の周囲の半導体基板7の主面を枠部材4の主面に接合して、微小電子機械機構8を枠部材4の内側に気密封止する。   Next, as shown in FIG. 3C, the electronic component 10b is superimposed on the electronic component sealing substrate 6b so that each electronic component region 10a and each electronic component sealing region 6a correspond to each other. In addition to bonding to the connection terminal 5, the main surface of the semiconductor substrate 7 around the micro electro mechanical mechanism 8 is bonded to the main surface of the frame member 4, and the micro electro mechanical mechanism 8 is hermetically sealed inside the frame member 4. .

ここで、電極9と接続端子5との接合は、例えば、接続端子5が錫−銀系半田から成る場合であれば、電極9上に接続端子5を位置合わせして載せ、これらを約250℃〜300℃程度の温度のリフロー炉中で熱処理すること等により行なわれる。   Here, when the electrode 9 and the connection terminal 5 are joined, for example, when the connection terminal 5 is made of tin-silver solder, the connection terminal 5 is aligned and placed on the electrode 9, and these are placed at about 250. For example, the heat treatment is performed in a reflow furnace at a temperature of about from ℃ to 300 ℃.

また、微小電子機械機構8の周囲の半導体基板7の主面と枠部材4の主面との接合は、例えば、この接合面に、接続端子5と同様の錫−銀系の半田を挟んでおき、上述の電極9と接続端子5との接合と同時にリフロー炉中で熱処理することにより行なうことができる。   In addition, the main surface of the semiconductor substrate 7 around the micro electro mechanical mechanism 8 and the main surface of the frame member 4 are joined, for example, with a tin-silver solder similar to the connection terminal 5 sandwiched between the joint surfaces. In addition, the heat treatment can be performed in the reflow furnace simultaneously with the joining of the electrode 9 and the connection terminal 5 described above.

この場合、接続端子5の高さを枠部材4の高さと同じとしていることから、電極9と接続端子5との接合と、枠部材4の主面と半導体基板7の主面との接合とを容易かつ確実に同時に行なうことができる。   In this case, since the height of the connection terminal 5 is the same as the height of the frame member 4, the bonding between the electrode 9 and the connection terminal 5 and the bonding between the main surface of the frame member 4 and the main surface of the semiconductor substrate 7 are performed. Can be easily and reliably performed simultaneously.

このように、本実施の形態による電子装置の製造方法によれば、電子部品領域10aの電極9の外部導出のための接合と、微小電子機械機構8の気密封止のための接合とを同時に行なうことができるため、数時間程度を要する半田(ろう)付け等の接合の工程を、従来の製造方法に比べて、確実に少なくとも1工程減らすことができるので、電子装置の生産性を非常に高めることができる。 As described above, according to the method for manufacturing the electronic device according to the present embodiment, the bonding for leading out the electrode 9 in the electronic component region 10a and the bonding for hermetic sealing of the microelectromechanical mechanism 8 are performed simultaneously. Since it can be performed, it is possible to reliably reduce at least one step of joining such as soldering (brazing), which takes about several hours, as compared with the conventional manufacturing method. Can be increased.

そして、図3(d)に示すように、互いに接合された多数個取りの形態の電子部品10bおよび電子部品封止用基板6bを電子部品封止領域6a毎に分割して、電子部品封止領域6aが分割された電子部品封止用基板6に電子部品領域10aが分割された電子部品10が接合されて成る個々の電子装置を得る。   Then, as shown in FIG. 3D, the electronic component 10b and the electronic component sealing substrate 6b joined together are divided into the electronic component sealing regions 6a, and the electronic component sealing is performed. Individual electronic devices are obtained in which the electronic component sealing substrate 6 in which the region 6a is divided is joined to the electronic component 10 in which the electronic component region 10a is divided.

互いに接合された、それぞれ多数個取りの形態の電子部品10bおよび電子部品封止用基板6bの接合体の切断は、この接合体に対して、ダイシング加工等の切断加工を施すことにより行なうことができる。   Cutting the joined body of the electronic component 10b and the electronic component sealing substrate 6b, which are joined together, in a multi-cavity form, can be performed by subjecting the joined body to a cutting process such as dicing. it can.

本実施の形態による電子装置の製造方法においては、このダイシング加工等の切断加工の際に、各微小電子機械機構8は枠部材4の内側で枠部材4と半導体基板7と絶縁基板1とにより気密封止されているので、半導体基板7や絶縁基板1等の切断に伴って発生するシリコンやセラミックス等の切削粉等が微小電子機械機構8に付着することはなく、完成した電子装置において、微小電子機械機構8を確実に正常に作動させることができる。 In the manufacturing method of the electronic device according to the present embodiment , each microelectromechanical mechanism 8 is formed by the frame member 4, the semiconductor substrate 7, and the insulating substrate 1 inside the frame member 4 during the cutting process such as dicing. Since it is hermetically sealed, cutting powder such as silicon or ceramics generated by cutting the semiconductor substrate 7 or the insulating substrate 1 does not adhere to the microelectromechanical mechanism 8, and in the completed electronic device, The microelectromechanical mechanism 8 can be reliably operated normally.

このように、本実施の形態による電子装置の製造方法によれば、従来のように、半導体基板7の主面に多数個を縦横に配列形成した電子部品領域10aを切断する際に微小電子機械機構8をガラス板等で覆って保護するような工程を別途追加する必要はなく、微小電子機械機構8の保護のためだけの工程を確実に削除することができるので、電子装置の生産性を非常に高いものとすることができる。 As described above, according to the manufacturing method of the electronic device according to the present embodiment, when the electronic component region 10a in which a large number are arranged in the main surface of the semiconductor substrate 7 in the vertical and horizontal directions is cut as in the prior art, the microelectronic machine is cut. It is not necessary to separately add a process for protecting the mechanism 8 by covering it with a glass plate or the like, and the process only for protecting the micro-electromechanical mechanism 8 can be reliably deleted. It can be very expensive.

また、このようにして製造された電子装置は、すでに気密封止されているとともに、その電極9が配線導体2を介して外部に導出された状態であるので、これを別途パッケージ内に実装するような工程を追加する必要はなく、配線導体2の導出された部分を外部電気回路に半田ボール等の外部端子11を介して接続するだけで、外部電気回路基板に実装して使用することができる。   Further, the electronic device manufactured in this way is already hermetically sealed, and the electrode 9 is in a state of being led out to the outside through the wiring conductor 2, so that this is separately mounted in a package. There is no need to add such a process, and it is possible to mount and use it on an external electric circuit board simply by connecting the portion from which the wiring conductor 2 is led to an external electric circuit via an external terminal 11 such as a solder ball. it can.

また、配線導体2は絶縁基体1の他方主面または側面に導出されているので、外部電気回路に表面実装の形態で接続することができ、高密度に実装することができるとともに外部電気回路基板を効果的に小型化することができる。   Further, since the wiring conductor 2 is led out to the other main surface or side surface of the insulating base 1, it can be connected to the external electric circuit in the form of surface mounting, can be mounted at a high density, and the external electric circuit board. Can be effectively downsized.

なお、本発明は上述の実施の形態の例に限定されるものではなく、本発明の要旨の範囲内であれば種々の変形は可能である。例えば、上述の実施の形態の例では一つの電子装置内に一つの微小電子機械機構を気密封止したが、一つの電子装置内に複数の微小電子機械機構を気密封止してもよい。また、図1の例では、配線導体2は絶縁基板1の他方主面側に導出しているが、これを側面に導出したり側面および他方主面の両方に導出したりしてもよい。また、配線導体2の導出された部分の外部電気回路への電気的な接続は、外部端子として半田ボールを介して行なうものに限らず、リード端子や導電性接着剤等を介して行なってもよい。   The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope of the gist of the present invention. For example, in the example of the above-described embodiment, one microelectromechanical mechanism is hermetically sealed in one electronic device, but a plurality of microelectromechanical mechanisms may be hermetically sealed in one electronic device. In the example of FIG. 1, the wiring conductor 2 is led out to the other main surface side of the insulating substrate 1, but it may be led out to the side surface or to both the side surface and the other main surface. Further, the electrical connection of the portion where the wiring conductor 2 is led out to the external electric circuit is not limited to being made via a solder ball as an external terminal, but may be made via a lead terminal or a conductive adhesive. Good.

また、インダクタ12は高周波ノイズの低減のみに用いられるものではなく、その他インピーダンスのマッチング、位相調整などにも用いられてもよい。   The inductor 12 is not only used for reducing high-frequency noise, but may also be used for impedance matching and phase adjustment.

本発明の電子部品封止用基板の実施の形態の一例を示す断面図である。It is sectional drawing which shows an example of embodiment of the board | substrate for electronic component sealing of this invention. 本発明の電子部品封止用基板の実施の形態の他の例を示す断面図である。It is sectional drawing which shows the other example of embodiment of the board | substrate for electronic component sealing of this invention. (a)〜(d)は、本発明の電子装置の製造方法の実施の形態の一例をそれぞれ工程順に示した断面図である。(A)-(d) is sectional drawing which showed an example of embodiment of the manufacturing method of the electronic device of this invention in order of the process, respectively. 従来の電子部品封止用基板を用いた電子装置の一例を示す断面図である。It is sectional drawing which shows an example of the electronic device using the conventional board | substrate for electronic component sealing.

符号の説明Explanation of symbols

1:絶縁基板
2:配線導体
3:接続パッド
4:枠部材
5:接続端子
6:電子部品封止用基板
6a:電子部品封止領域
6b:電子部品封止用基板
7:半導体基板
8:微小電子機械機構
9:電極
10:電子部品
10a:電子部品領域
10b:電子部品
12:インダクタ
1: insulating substrate 2: wiring conductor 3: connection pad 4: frame member 5: connection terminal 6: electronic component sealing substrate 6a: electronic component sealing region 6b: electronic component sealing substrate 7: semiconductor substrate 8: minute Electronic mechanical mechanism 9: Electrode 10: Electronic component 10a: Electronic component region 10b: Electronic component 12: Inductor

Claims (11)

半導体基板と該半導体基板の主面に形成される微小電子機械機構と該微小電子機械機構に電気的に接続される電極とを有する電子部品の前記微小電子機械機構を気密封止するための電子部品封止用基板であって、
一方主面が前記半導体基板の前記主面に接合される絶縁基板と、
前記絶縁基板の前記一方主面上に設けられ、前記微小電子機械機構を取り囲んで前記微小機械機構を気密封止するための導電性枠状封止体と、
前記絶縁基板の内部に形成され、前記電極に電気的に接続される第1配線導体と、
前記絶縁基板の内部に形成され、前記導電性枠状封止体に電気的に接続される第2配線導体と、
前記絶縁基板の内部に形成されるとともに前記第1配線導体に電気的に接続される、インダクタとして作用する第3配線導体と
を備え、
前記第1配線導体は、一端が前記絶縁基板の前記一方主面に導出され、他端が前記絶縁基板の他方主面または側面に導出され、
前記第2配線導体は、一端が前記絶縁基板の前記一方主面に導出されて前記導電性枠状封止体に電気的に接続されるとともに、他端が前記絶縁基板の他方主面または側面に導出されることを特徴とする電子部品封止用基板。
Electrons for hermetically sealing the microelectromechanical mechanism of an electronic component having a semiconductor substrate, a microelectromechanical mechanism formed on a main surface of the semiconductor substrate, and an electrode electrically connected to the microelectromechanical mechanism A component sealing substrate,
On the other hand, an insulating substrate whose main surface is bonded to the main surface of the semiconductor substrate;
A conductive frame-shaped sealing body that is provided on the one main surface of the insulating substrate and surrounds the microelectromechanical mechanism to hermetically seal the micromechanical mechanism;
A first wiring conductor formed inside the insulating substrate and electrically connected to the electrode;
A second wiring conductor formed inside the insulating substrate and electrically connected to the conductive frame-shaped sealing body;
A third wiring conductor acting as an inductor, formed inside the insulating substrate and electrically connected to the first wiring conductor;
One end of the first wiring conductor is led out to the one main surface of the insulating substrate, and the other end is led to the other main surface or side surface of the insulating substrate,
One end of the second wiring conductor is led out to the one main surface of the insulating substrate and is electrically connected to the conductive frame-shaped sealing body, and the other end is the other main surface or side surface of the insulating substrate. An electronic component sealing substrate characterized by being derived from the above.
前記第1配線導体の前記一端は、前記導電性枠状封止体の内側に位置していることを特徴とする請求項1に記載の電子部品封止用基板。   2. The electronic component sealing substrate according to claim 1, wherein the one end of the first wiring conductor is positioned inside the conductive frame-shaped sealing body. 前記第2配線導体は、前記絶縁基板の内部に形成された貫通導体を有することを特徴とする請求項1又は請求項2に記載の電子部品封止用基板。   The electronic component sealing substrate according to claim 1, wherein the second wiring conductor has a through conductor formed inside the insulating substrate. 前記絶縁基板は、複数の絶縁層を積層して成る積層体であり、
前記第2配線導体は、前記絶縁層を貫通する貫通導体を有することを特徴とする請求項1又は請求項2に記載の電子部品封止用基板。
The insulating substrate is a laminate formed by laminating a plurality of insulating layers,
3. The electronic component sealing substrate according to claim 1, wherein the second wiring conductor has a through conductor penetrating the insulating layer. 4.
前記第2配線導体は、少なくとも一部が前記第1配線導体に平行に配置されていることを特徴とする請求項1から請求項4のいずれか一項に記載の電子部品封止用基板。 The second wiring conductor, an electronic component sealing substrate according to any one of claims 1 to 4, characterized in that disposed in parallel to at least part of the first wiring conductor. 前記絶縁基板は、ガラスセラミックス焼結体からなることを特徴とする請求項1から請求項5のいずれか一項に記載の電子部品封止用基板。 The insulating substrate, the electronic component sealing substrate according to any one of claims 1 to 5, characterized in that it consists of a glass ceramic sintered body. 前記絶縁基板の前記一方主面に形成され、前記第1配線導体の前記一端に電気的に接続された接続パッドと、
前記接続パッド上に形成され、前記電極と電気的に接続される接続端子と
を備えることを特徴とする請求項1から請求項6のいずれか一項に記載の電子部品封止用基板。
A connection pad formed on the one main surface of the insulating substrate and electrically connected to the one end of the first wiring conductor;
The connection is formed on the pad, an electronic component sealing substrate according to any one of claims 1 to 6, characterized in that it comprises a connection terminal connected to said electrode and electrically.
断面視したときに、前記導電性枠状封止体は、前記絶縁基板の端部より内方に位置していることを特徴とする請求項1から請求項7のいずれか一項に記載の電子部品封止用基板。 When viewed in cross section, the conductive frame-like sealing body, as claimed in any one of claims 1 to 7, characterized in that it is located inwardly from the end portion of the insulating substrate Electronic component sealing substrate. 半導体基板と該半導体基板の主面に形成される微小電子機械機構と該微小電子機械機構に電気的に接続される電極とを有する電子部品と、
一方主面が前記半導体基板の前記主面に接合される絶縁基板と、
前記絶縁基板の前記一方主面上に設けられ、前記微小電子機械機構を取り囲んで前記微小機械機構を気密封止するための導電性枠状封止体と、
前記絶縁基板の内部に形成された第1配線導体および第2配線導体と、
前記絶縁基板の内部に形成されるとともに前記第1配線導体に電気的に接続される、インダクタとして作用する第3配線導体と
を備え、
前記第1配線導体は、一端が前記絶縁基板の前記一方主面に導出されて前記電極に電気的に接続されるとともに、他端が前記絶縁基板の他方主面または側面に導出され、
前記第2配線導体は、一端が前記絶縁基板の前記一方主面に導出されて前記導電性枠状封止体に電気的に接続されるとともに、他端が前記絶縁基板の他方主面または側面に導出されることを特徴とする電子装置。
An electronic component having a semiconductor substrate, a microelectromechanical mechanism formed on a main surface of the semiconductor substrate, and an electrode electrically connected to the microelectromechanical mechanism;
On the other hand, an insulating substrate whose main surface is bonded to the main surface of the semiconductor substrate;
A conductive frame-shaped sealing body that is provided on the one main surface of the insulating substrate and surrounds the microelectromechanical mechanism to hermetically seal the micromechanical mechanism;
A first wiring conductor and a second wiring conductor formed inside the insulating substrate;
A third wiring conductor acting as an inductor, formed inside the insulating substrate and electrically connected to the first wiring conductor;
The first wiring conductor has one end led out to the one main surface of the insulating substrate and electrically connected to the electrode, and the other end led to the other main surface or side surface of the insulating substrate,
One end of the second wiring conductor is led out to the one main surface of the insulating substrate and is electrically connected to the conductive frame-shaped sealing body, and the other end is the other main surface or side surface of the insulating substrate. An electronic device characterized in that the electronic device is derived.
断面視したときに、前記半導体基板と前記絶縁基板は、両端が揃っていることを特徴とする請求項9に記載の電子装置。   The electronic device according to claim 9, wherein both ends of the semiconductor substrate and the insulating substrate are aligned when viewed in cross section. 断面視したときに、前記導電性枠状封止体は、前記半導体基板の断面より内方に位置していることを特徴とする請求項9又は10に記載の電子装置。   11. The electronic device according to claim 9, wherein the conductive frame-shaped sealing body is positioned inward from a cross section of the semiconductor substrate when viewed in cross section.
JP2003302417A 2003-08-27 2003-08-27 Electronic component sealing substrate and electronic device using the same Expired - Fee Related JP4268480B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003302417A JP4268480B2 (en) 2003-08-27 2003-08-27 Electronic component sealing substrate and electronic device using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003302417A JP4268480B2 (en) 2003-08-27 2003-08-27 Electronic component sealing substrate and electronic device using the same

Publications (2)

Publication Number Publication Date
JP2005072419A JP2005072419A (en) 2005-03-17
JP4268480B2 true JP4268480B2 (en) 2009-05-27

Family

ID=34406687

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003302417A Expired - Fee Related JP4268480B2 (en) 2003-08-27 2003-08-27 Electronic component sealing substrate and electronic device using the same

Country Status (1)

Country Link
JP (1) JP4268480B2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4311376B2 (en) 2005-06-08 2009-08-12 セイコーエプソン株式会社 Semiconductor device, semiconductor device manufacturing method, electronic component, circuit board, and electronic apparatus
JP4731291B2 (en) * 2005-11-25 2011-07-20 京セラ株式会社 Electronic component sealing substrate, electronic device using the same, and method of manufacturing electronic device
WO2007058280A1 (en) * 2005-11-16 2007-05-24 Kyocera Corporation Electronic part sealing board, electronic part sealing board in multiple part form, electronic device using electronic part sealing board, and electronic device fabricating method
JP4675973B2 (en) 2005-12-26 2011-04-27 京セラ株式会社 Microelectromechanical device, method for manufacturing the same, and wiring board
JP2008211806A (en) * 2008-03-06 2008-09-11 Seiko Epson Corp Semiconductor device, method of manufacturing same, electronic component, circuit board, and electronic device
JP5569473B2 (en) * 2011-06-09 2014-08-13 セイコーエプソン株式会社 Electronic components, circuit boards and electronic equipment
JP5516511B2 (en) * 2011-06-09 2014-06-11 セイコーエプソン株式会社 Electronic components, circuit boards and electronic equipment
US8698258B2 (en) * 2011-09-30 2014-04-15 General Electric Company 3D integrated electronic device structure including increased thermal dissipation capabilities
JP6863215B2 (en) * 2017-10-11 2021-04-21 株式会社大真空 MEMS oscillator
JP6919502B2 (en) * 2017-10-31 2021-08-18 株式会社大真空 MEMS oscillator

Also Published As

Publication number Publication date
JP2005072419A (en) 2005-03-17

Similar Documents

Publication Publication Date Title
EP1961696B1 (en) Electronic device using electronic part sealing board and method of fabricating same
EP2121511B1 (en) Method of packaging an electronic or micromechanical component
US8159059B2 (en) Microelectromechanical device and method for manufacturing the same
JP4741621B2 (en) Electronic component sealing substrate, electronic device using the same, and electronic device manufacturing method
WO2007074846A1 (en) Microelectronic machine and method for manufacturing same
JP5013824B2 (en) Electronic component sealing substrate, plural-shaped electronic component sealing substrate, electronic device using electronic component sealing substrate, and method of manufacturing electronic device
WO2008066087A1 (en) Fine structure device, method for manufacturing the fine structure device and substrate for sealing
JP4268480B2 (en) Electronic component sealing substrate and electronic device using the same
JP4761713B2 (en) Electronic component sealing substrate, multi-component electronic component sealing substrate, and method of manufacturing electronic device
JP2005262382A (en) Electronic device and its manufacturing method
JP4126459B2 (en) Electronic component sealing substrate, electronic device using the same, and electronic device manufacturing method
JP3842751B2 (en) Electronic component sealing substrate and electronic device manufacturing method using the same
JP4903540B2 (en) Substrate for encapsulating microelectromechanical components, substrate for encapsulating microelectromechanical components in plural shapes, microelectromechanical device, and manufacturing method of microelectronic mechanical device
JP4439291B2 (en) Piezoelectric vibrator storage package and piezoelectric device
JP2020120195A (en) MEMS oscillator
JP4116954B2 (en) Electronic component sealing substrate and electronic device using the same
JP2005212016A (en) Electronic part sealing substrate, electronic part sealing substrate for installing a large number and method of manufacturing electronic device
JP4781098B2 (en) Electronic equipment
JP4731291B2 (en) Electronic component sealing substrate, electronic device using the same, and method of manufacturing electronic device
JP4434870B2 (en) Multi-cavity electronic component sealing substrate, electronic device, and method of manufacturing electronic device
JP4404647B2 (en) Electronic device and electronic component sealing substrate
JP2005153067A (en) Substrate for sealing of electronic part and manufacturing method of electronic device using it
JP2006295213A (en) Board for sealing electronic component, board of multi-patterned form for sealing electronic component, and electronic apparatus
JP2006185968A (en) Electronic device
JP2017212256A (en) Electronic device package and electronic device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060822

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20070222

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070807

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20071005

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20081104

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20081225

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20090127

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090220

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120227

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120227

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130227

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140227

Year of fee payment: 5

LAPS Cancellation because of no payment of annual fees