JP3458590B2 - Insulated gate bipolar transistor - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a large-capacity capacitor used as a switching element for industrial or vehicle electric railway
The present invention relates to an insulated gate bipolar transistor for high breakdown voltage.

[0002]

2. Description of the Related Art Conventionally, GTO thyristors have been used as switching elements for industrial and vehicle electric railways, but in recent years, large capacity, high breakdown voltage insulated gate bipolar transistors have been used as semiconductor elements having superior switching characteristics to GTO thyristors. Application of (hereinafter referred to as IGBT) has started. Above all, non-punch through (NPT) type IGB
T is considered to be suitable for a high breakdown voltage element, and is actively researched and developed.

FIG. 4 is a partial cross-sectional view of a conventional vertical IGBT. In the following, layers, regions and the like bearing n and p mean layers and regions in which electrons and holes are the majority carriers, respectively. In the figure, a p base region 2 is selectively formed in a surface layer on one side of an n base layer 1 made of a silicon substrate.
An n emitter region 3 is selectively formed on the surface layer of the. A gate electrode 5 made of, for example, polycrystalline silicon is provided on the surface of the p base region 2 sandwiched between the exposed surface of the n base layer 1 and the n emitter region 3 with a gate insulating film 4 interposed therebetween. . An emitter electrode 10 of Al alloy is provided in common contact with the surfaces of p base region 2 and n emitter region 3. A p collector layer 8 is formed on the surface layer opposite to the n base layer 1, and a collector electrode 11 is provided in contact with the surface of the p collector layer 8.

When the IGBT as shown in FIG. 4 is used as a switching element, the emitter electrode 10 is grounded,
A positive voltage is applied to collector electrode 11. Then, by controlling the voltage applied to the gate electrode 5, the collector electrode 1
1. A state in which a current flows between the emitter electrode 10 (on state) and a state in which no current flows (off state) are created. I
In the off state of the GBT, the collector electrode 11 and the emitter electrode 1
When a voltage is applied between 0, the space charge region 20 expands from the boundary between the n base layer 1 and the p base region 2. The edge of the space charge region is indicated by a dotted line. n base layer 1 is thick,
When the applied voltage is the maximum rated voltage, the space charge region 20 is n
Those that do not spread over the entire base layer 1 are called non-punch through (NPT) type.

The non-punch through (N
In addition to the PT) type, there is a so-called punch through (PT) type. The difference from the non-punch through (NPT) type is that a buffer region having the same conductivity type as that of the n base layer 1 and a large amount of impurities is provided between the n base layer 1 and the p collector layer 8. When the maximum rated voltage is applied between the emitters (often about half the maximum rated voltage), the space charge region is designed to extend over the entire n base layer. In this structure, the buffer region functions to prevent the space charge region from expanding, so that the thickness of the n-base layer can be reduced, but there is a drawback that it is particularly difficult to manufacture a high withstand voltage.

According to the present invention, the space charge region which has no buffer region and spreads in the base layer in the off state does not spread in the entire base layer even when the maximum rated voltage is applied between the collector and the emitter. NPT type I designed for
It is related to GBT. In the case of a general high breakdown voltage IGBT, the amount of impurities in the n base layer 1 is extremely smaller than that in the p base region 2. Therefore, NPT type IGBT
When a voltage is applied between the collector and the emitter in the off state, the space charge region 20 extending from the boundary portion between the n base region 1 and the p base region 2 is almost always the n base layer 1.
The spread x in the depth direction is expressed by the following equation.

[0007]

[Equation 1] Here, x is the spread of the space charge region 20 in the depth direction, ε
_Si is the relative permittivity of silicon, ε _O is the vacuum permittivity, V is the collector-emitter voltage, q is the electron charge, and N _D is the impurity concentration of the n base layer 1.

The electron-hole pairs thermally generated in the space charge region 20 are not recombined due to the electric field formed by the space charge region 20, and the holes are not recombined with each other. Then, the electrons move to the end portion on the collector electrode 11 side by drift, and move in the p base region 2 and the n base layer 1 by diffusion, respectively. At this time, the electrons flowing through the n-base layer 1 work as a base current of the IGBT, so that the IGBT operates as a transistor even though it is in an off state, and a slight current (leakage current) flows.

The current amplification factor of the IGBT at this time is expressed by the following equation.

[0010]

[Equation 2] Here, h _FE is the current amplification factor when the emitter is grounded, α _PNP is the current amplification factor α _T when the base is grounded, _T is the transport efficiency, W is the thickness of the base region, and L is the minority carrier lifetime. These equations suggest that h _FE dramatically increases as the collector-emitter voltage V increases, and the actual device behaves in this way.

[0011]

DISCLOSURE OF THE INVENTION The conventional NP described above
In the T-type IGBT, the current (leakage current) flowing between the collector and the emitter in the off state increases dramatically when the voltage applied between the collector and the emitter increases, and is determined by (voltage) × (current). Loss cannot be ignored (especially when the element is hot). Therefore, conventionally, the thickness W of the n base layer 1 is increased, and the portion where the space charge region remains unexpanded is made thicker than the diffusion length of minority carriers. However, in that case, the on-voltage increases, and the trade-off between the on-voltage and turn-off loss of the IGBT deteriorates.
The loss generated in the switching element as a whole becomes large.

In view of the above problems, the object of the present invention is to reduce the on-voltage and to reduce the thickness of the first conductivity type semiconductor layer of the NPT type IGBT, and to greatly reduce the leakage current in the off state. It is intended to provide an NPT type IGBT.

[0013]

To solve the above problems, the present invention is directed to a second conductivity type collector region from a pn junction between a first conductivity type semiconductor layer and a second conductivity type base region when a rated voltage is applied. In a non-punch through (NPT) type insulated gate bipolar transistor in which a space charge region extending into the first conductivity type semiconductor layer does not fill the entire first conductivity type semiconductor layer, The minority carrier lifetime is shorter than that of the first-conductivity-type semiconductor layer and higher than that of the first-conductivity-type semiconductor layer in a portion near the second-conductivity-type collector region and not reached by the space charge region. A short-life region composed of a heavily doped semiconductor region of the first conductivity type is formed.

By providing a region where the minority carrier has a short lifetime (short lifetime region), the above equation can be modified as follows.

[0015]

[Equation 3] Where x ₇ >> L _m7 or L _m > L _m7 where α _T 'is the transport efficiency of the n base layer excluding the short life region, α _T7 is the transport efficiency in the short life region, x ₇ is the width of the short life region , L _m7 is the life of minority carriers in the short life region.

By reducing the minority carrier lifetime L _m in the short lifetime region, the x dependency of α _PNP can be reduced, and the current (leakage current) is increased in voltage applied between the collector and the emitter. However, it does not increase dramatically. Due to this effect, the leakage current in the off state of the NPT type IGBT can be significantly reduced. Especially short life
The region is of the first conductivity type and has a higher concentration than the semiconductor layer of the first conductivity type.
Shall be doped.

The second conductivity type collector region is
Form of the second conductivity type base region of the first conductivity type semiconductor layer
Is formed on the surface opposite to the formed surface, and has the short life region.
Shall extend over the entire surface . By doing so, a so-called vertical element can be obtained, and a large-capacity element with high utilization efficiency of the area of the semiconductor substrate can be obtained.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION The insulated gate bipolar transistor of the present invention is applied to a so-called NPT type IGBT, and carriers positioned in the region near the collector region side in the base region and minor carriers in the base region. Is characterized by having a seventh region, which is a region having a shorter life than that of the base region.

The results of applying the present invention will be shown below together with examples. All the implemented devices were N with rated voltage 2500V.
It is a PT type IGBT. [Embodiment 1] FIG. 1 is a vertical IG according to a first embodiment of the present invention.
It is a fragmentary sectional view of BT. Shown in FIG. 1 is the active portion that turns the current on and off. There are other parts such as a guard ring structure that bears the breakdown voltage mainly in the peripheral part, but they are omitted because they are not related to the essence of the present invention. In the figure, a p-channel region 2 is selectively formed in a surface layer on one side of an n base layer 1 made of a silicon substrate,
Further, an n emitter region 3 is selectively formed on the surface layer of the p channel region 2. And the n base layer 1
A gate electrode 5 made of, for example, polycrystalline silicon is provided on the surface of p base region 2 sandwiched between the exposed surface portion of n and n emitter region 3 with gate oxide film 4 interposed. p
An emitter electrode 10 of Al alloy is provided in common contact with the surfaces of base region 2 and n emitter region 3.
Further, a p collector layer 8 is formed on the surface layer on the opposite side of the n base layer 1, and the collector electrode 11 is brought into contact with the surface of the p collector layer 8.
Is provided. The difference from the conventional IGBT of FIG. 4 is that
The point is that the short life region 7 is formed in a portion of the n base layer 1 near the p collector layer 8.

The silicon substrate has a specific resistance of about 150 Ω · c.
m, thickness 400 μm, short life region 7 is
Before the p collector layer 8 was formed, it was formed by ion implantation of phosphorus and subsequent high temperature (1100 ° C.) heat treatment. Phosphorus ion acceleration voltage is 150 keV and dose is 5 to 8 × 10.
^{It was 14} cm ^-2 . At this time, the surface impurity concentration is 1 × 10 ¹⁹
cm ⁻³ , the diffusion depth is about 1.5 μm. The p collector layer 8 is formed by ion implantation of boron and subsequent high temperature (100
It was formed by heat treatment (0 ° C.). The acceleration voltage of boron ions was 45 keV, and the dose amount was 1 × 10 ¹⁵ cm ^-2 . p
The diffusion depth of the collector layer 8 is about 0.5 μm. After the junction structure is formed in this way, a window is opened for electrode formation in the same manner as in a conventional IGBT, and a metal film is vapor-deposited to form an electrode to form an IGBT. However, electron beam irradiation for carrier lifetime control that is usually performed is not performed.

The buffer area of the PT type IGBT is
Usually, the impurity concentration is 10 ¹⁷ cm ⁻³ and the thickness is 5 to 10 μm. Since the purpose is different, the short life region 7 of this embodiment has a high concentration and a thin thickness. It is considered that the carrier lifetime in the short lifetime region 7 is 0.1 μs or less, whereas the lifetime in the n base layer 1 is about 10 μs.

FIG. 2A shows a withstand voltage waveform at a high temperature (125 ° C.) of an IGBT in which the short-life region 7 having a higher concentration than the n-base layer 1 is formed. The short-life region 7 is not formed as a comparative example. It is shown with that of a conventional device. The horizontal axis represents the emitter-collector voltage, and the vertical axis represents the standardized leakage current value. Comparison was made for devices having an on-voltage (current density 50 A · cm ⁻² ) of about 4V. Although the thickness (W) of the base region of the element is the same in both the element of the example and the element of the comparative example, the value of the high temperature leakage current at the rated voltage of 2500 V is lower in the element of the example, It can be seen that the characteristics are improved.

This is because, as described above, the lifespan of minority carriers in the short-lived region can be shortened to reduce the x (space charge region thickness) dependence of α _PNP . The leakage current can be greatly reduced. In FIG. 2B, the high temperature of the IGBT of Example 1 (125
The on-voltage-turn-off loss curve at (C) is shown together with that of the device of the comparative example. The horizontal axis represents the on-voltage and the vertical axis represents the standardized turn-off loss. In the device of the comparative example, the heat treatment temperature at the time of forming the p collector region was changed in the range of 600 to 700 ° C. to change the ON voltage. However, FIG. 2 (b)
In the device of Example 1, the thickness of the n base layer 1 of the device was adjusted so that the leakage current at 125 ° C. was the same. Therefore, the element of Example 1 has a thickness of about 15%, which is smaller than that of the element of Comparative Example.

[0024] The on-voltage across the direction of the device of Example 1 is small, presumably because boron in p-type collector layer 8 is sufficiently ionized. In the device of Example 1, the larger the phosphorus ion dose, the larger the on-voltage and the smaller the turn-off loss. From the figure, it can be seen that the device of Example 1 has improved on-voltage-turn-off loss trade-off characteristics.

[Embodiment 2] In Embodiment 2, a recombination center is formed as a short-lived region by the introduction of crystal defects. After the p collector layer 8 was formed by implanting boron ions and heat treatment (700 ° C.), helium ions were implanted from the p collector layer 8 side to introduce crystal defects, and annealing was performed at about 320 to 380 ° C. . Accelerating voltage is 10 MeV and dose is 1 × 10
^{It was set to 12} cm ^-2 . At this time, an Al mask was used to cause crystal defects to occur in the layer from the surface to a depth of about 50 μm. The range of occurrence of crystal defects was determined by the spread resistance method. The element of the comparative example having no short life region was manufactured in the same manner as in Example 1.

FIG. 3A shows an IG according to the second embodiment of the present invention.
A breakdown voltage waveform of BT at high temperature (125 ° C.) is shown together with that of the element of the comparative example. The vertical axis and the horizontal axis are the same as above. In this case as well, the measured values were obtained with the elements having substantially the same on-voltage, but it can be seen that the element of Example 2 has a lower high-temperature leakage current value at the rated voltage of 2500 V and the withstand voltage characteristic is improved.

FIG. 3B shows an on-voltage-turn-off loss curve at high temperature (125 ° C.) of the IGBT of Example 2.
It is shown together with that of the device of the comparative example. The vertical axis and the horizontal axis are the same as above. However, in the element of Example 2 in FIG. 3B, the n base layer 1 is about 5% thinner than the element of Comparative Example because the same consideration as in Example 1 was taken into consideration. In the device of Example 2, the lower the annealing temperature after the defects were introduced, the higher the on-voltage and the smaller the turn-off loss. Also in this figure, it can be seen that the trade-off characteristics of the on-voltage and turn-off loss of the device of the example are improved.

In the above-described embodiments, the p base region 2 and p
Although a so-called vertical type IGBT in which the collector layer 8 and the n-base layer 1 are formed on both surfaces has been mentioned, the present invention is not limited to the vertical type and can be applied to a horizontal type IGBT.

[0029]

As described above, according to the present invention, the NPT
In the IGBT of the first type, by providing a region having a short life of minority carriers such as a high concentration region and a crystal defect region in a portion of the first conductivity type base layer close to the second conductivity type collector region, leakage current is reduced, The voltage-turn-off loss trade-off characteristic can be improved.

As a result, the IG as a switching element
It greatly contributes to the reduction of the BT loss and the improvement of the efficiency of the power conversion device using the IGBT.

[Brief description of drawings]

FIG. 1 is a partial sectional view of an IGBT according to an embodiment of the present invention.

FIG. 2A is a comparison diagram of breakdown voltage characteristics of Example 1 of the present invention and a comparative example, and FIG. 2B is a comparison chart of trade-off characteristics of ON voltage-turn-off loss.

3A is a comparison diagram of breakdown voltage characteristics of Example 2 of the present invention and a comparative example, and FIG. 3B is a comparison diagram of trade-off characteristics of ON voltage-turn-off loss.

FIG. 4 is a partial sectional view of a conventional IGBT.

[Explanation of symbols]

1 n base layer 2p base region 3 n emitter region 4 Gate oxide film 5 Gate electrode 6 insulating film 7 Short life span 8p collector layer 10 Emitter electrode 11 Collector electrode 20 Space charge region

Claims (2)

(57) [Claims] 1. A first conductivity type semiconductor layer in a pn junction between a first conductivity type semiconductor layer having a high specific resistance and a second conductivity type base region toward a second conductivity type collector region when a rated voltage is applied. in the space in non-punch-through (NPT) insulated gate bipolar transistor charge region does not meet the entire said first conductivity type semiconductor layer, a portion close to the second conductive type collector region of the first conductivity type semiconductor layer extending In the portion where the space charge region does not reach, the minority carrier lifetime is shorter than that of the first conductivity type semiconductor layer, and the first conductivity type doped at a higher concentration than the first conductivity type semiconductor layer. An insulated gate bipolar transistor, characterized in that a short-life region composed of a semiconductor region is formed. 2. The second conductivity type collector region is the first conductivity type collector region.
Forming the second conductivity type base region of the conductivity type semiconductor layer;
Is formed on the side of the surface opposite to the surface where the short life region is formed.
2. It spreads over the entire surface of the surface side of the.
Insulated gate bipolar transistor according to.