JP3348681B2 - Terminal structure of integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a terminal structure for an integrated circuit, wherein an annular protrusion higher than the top periphery of a bump is formed from an annular molding which in patterned annular in shape on an insulation film surface below the pad periphery. SOLUTION: An annular molding 20 is formed on the surface of an insulation film 11 on a semiconductor substrate 10 located at the periphery of a bump 50, a pad 30 and a passivation film 40 are formed on its top surface, the central portion of the bump 50 is formed on a lamination layer of the semiconductor substrate 10/insulation film 11/pad 30, and the periphery of the bump 50 is formed by plating on a lamination layer of the semiconductor substrate 10/insulation film 11/annular molding 20/pad 30/passivation film 40, thereby forming an annular protrusion. This lessens poor contacts due to sliding of a needle in a wafer test.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a terminal structure of an integrated circuit, and more particularly, to a method of forming a ring-shaped projection on a bump upper surface of a semiconductor substrate of an integrated circuit so that a needle slides during a wafer test. The present invention relates to a terminal structure of an integrated circuit that can prevent a contact failure due to the above.

[0002]

2. Description of the Related Art A conventional terminal structure of an integrated circuit will be described with reference to the drawings. 4A and 4B are schematic schematic enlarged views of a conventional terminal structure. FIG. 4A is a plan view and FIG. 4B is a cross-sectional view. In the figure, reference numeral 4 denotes a terminal structure, in which an insulating layer 11 made of an oxide film and having a thickness of about 0.8 μm is formed on a flat surface of the semiconductor substrate 10, and a thickness made of Al or the like is formed on the surface of the insulating layer 11. about to form a 1.5μm top square pads 30, on the upper surface of the peripheral portion upper surface and the insulating layer 11 of the pad 30, approximately thickness made of SiO ₂ 1.2
The structure is such that a passivation film 40 of μm is formed, and a bump 54 of Au or the like having a thickness of about 10 to 20 μm is formed above the pad 30.

[0003] The passivation film 40 formed on the upper surface of the peripheral portion of the pad 30 has an annular convex portion formed on the peripheral portion of the pad 30. Here, the height of the projection is about 1.2 μm in thickness of the passivation film 40, and the width is about 1 to 1.
It is 9 μm. The bump 54 has the same etching shape and the same position as the pad 30, and
Are formed on the upper surface of the passivation film 40 and the upper surface of the central portion of the pad 30 by the plating method. For this reason, the thickness of the passivation film 40 is about 1.2 μm from the central portion of the upper surface of the bump 54 to the peripheral portion of the upper surface.
An annular projection that is higher by an amount is formed.

[0004] The bump 54 thus formed is
In a wafer test of an integrated circuit composed of the semiconductor substrate 10, it is necessary to electrically connect the test circuit to the test connection needle. However, since the height of the annular convex portion formed on the peripheral portion of the upper surface of the bump 54 is low, the tip of the needle slips off the upper surface of the bump 53, causing a problem that a contact failure occurs.

[0005]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problem, and an annular structure is formed below the upper peripheral edge of the bump so that the upper peripheral edge of the bump can be formed. It is an object of the present invention to provide a terminal structure of an integrated circuit that forms an annular convex portion that is higher by the thickness of a formed product.

[0006]

In order to achieve the above object, according to the present invention, there is provided a terminal structure for an integrated circuit, wherein a bump is formed on an upper surface of a pad formed on a surface of an insulating film on a semiconductor substrate. A ring structure formed on at least one of the upper surface and the lower surface of the pad, having an outer peripheral planar shape larger than the upper surface outer shape of the bump, and having an inner peripheral planar shape smaller than the upper surface outer shape of the bump. A wiring layer made of a material;
Is electrically connected to the pad and the bump, and has a configuration in which a peripheral portion of an upper surface of the bump is formed to be higher by the thickness of the annular formation.

In this case, the central portion of the upper surface of the bump is formed on the lamination of the semiconductor substrate / insulating film / pad, whereas the peripheral portion of the upper surface of the bump is formed, for example, of the semiconductor substrate / insulating film / wiring layer. / Formed on the pad stack,
An annular convex portion at the periphery of the upper surface of the bump can be formed higher by the thickness of the wiring layer . Also, this wiring layer
Wiring for configuring integrated circuits is possible using
Design of space-efficient wiring circuits easily
Can be.

[0008]

[0009]

According to a second aspect of the present invention, in the terminal structure for an integrated circuit according to the first aspect , a passivation film for insulation is formed on the insulating film, and the pad of the passivation film is formed on the insulating film. The configuration is such that the planar shape of the hole in the upper surface of the peripheral portion substantially matches the planar shape of the inner peripheral surface of the annular formation. With this configuration, the inclination of the inner peripheral side surface of the annular convex portion at the peripheral portion of the bump upper surface can be made more vertical, so that the tip of the needle can be effectively prevented from slipping off the upper surface of the bump. Can be.

The invention described in claim 3 is claim 1 or claim 1.
Item 3. The terminal structure for an integrated circuit according to Item 2 , wherein the pad is formed in an annular shape having an inner peripheral planar shape smaller than the inner peripheral planar shape of the annular formation. As described above, by forming the pad in an annular shape and forming a recess in the center of the pad, a recess is formed in the center of the upper surface of the bump. And the tip of the needle can be more effectively prevented from slipping off the upper surface of the concave portion of the bump.

[0012] To achieve the above object, the terminal structure of the integrated circuit according to claim 4, wherein in the present invention, the pad top surface formed on the surface of the insulating film on the semiconductor substrate, the terminal structure of an integrated circuit having a bump In the above, the pad has an annular shape having an outer peripheral surface shape larger than the upper surface outer shape of the bump and an inner surface planar shape smaller than the upper surface outer shape of the bump, and a passivation film for insulation is formed on the insulating film.
And forming the passivation film.
The planar shape of the hole on the upper surface of the peripheral edge of the
Smaller than the outer diameter of the upper surface and the inner peripheral planar shape of the pad.
The bumps are formed so that the peripheral edge of the upper surface is formed higher by the thickness of the pad and the passivation film .

With this configuration, the central portion of the upper surface of the bump is formed on the laminate of the semiconductor substrate / insulating film, whereas the peripheral portion of the upper surface is formed on the laminate of the semiconductor substrate / insulating film / pad. The annular convex portion at the peripheral edge of the upper surface of the bump can be formed high. Further, in an integrated circuit that does not need to perform multilayer wiring, the annular convex portion can be formed high without providing a new layer and forming an annular product, so that the production process can be reduced. .

[0014] The invention according to claim 5 is the invention according to claims 1 to 5.
4. The terminal structure for an integrated circuit according to any one of the items 4 , wherein a peripheral portion of an upper surface of the bump is formed to be higher by 2 μm or more. As described above, by setting the height of the convex portion at the peripheral portion of the upper surface of the bump to 2 μm or more, the occurrence of contact failure in which the tip of the needle slips off the upper surface of the bump can be reduced to about half or less.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a terminal structure of an integrated circuit according to a first embodiment of the present invention will be described with reference to the drawings. 1A and 1B are schematic schematic enlarged views of a terminal structure according to a first embodiment of the present invention, wherein FIG. 1A is a plan view and FIG. 1B is a cross-sectional view. In FIG. 1, reference numeral 1 denotes a terminal structure, in which a ring-shaped product 20 / pad 30 / passivation film 40 is laminated on the surface of an insulating film 11 on a semiconductor substrate 10.
Further, the structure is such that the bumps 50 are formed by a plating method. The semiconductor substrate 10 forms an integrated circuit,
Many bumps 50 are formed.

The annular formation 20 is formed as a wiring layer made of Al or the like and having a thickness of about 0.8 μm, and has a square annular shape in conformity with the bump 50 having a square upper surface. Here, the annular formed product 20 has an outer peripheral plane shape that is larger in the outer peripheral direction by about 1 to 5 μm than the outer surface of the bump 50 and an inner peripheral plane shape that is smaller in the inner peripheral direction by about 3 to 8 μm than the outer surface of the bump 50. It is formed. In this way, by forming the annularly formed product 20 with a margin in the outer circumferential direction and the inner circumferential direction with respect to the outer shape of the upper surface of the bump 50, it is possible to absorb a positional shift when the bump 50 is formed.

A large number of ring-shaped formations 20 are formed corresponding to the bumps 50.
It can be formed by being electrically connected to the like. In this case, an electrical signal is connected from the annular formation 20 to the bump 50 via the pad 30. In this way, when multilayer wiring is required, the annular structure 20 can be effectively used, and the pattern circuit can be easily designed. In addition, when there is no need to wire, the annular formation 20 can be formed simply as having a structural function without being electrically connected to another annular formation 20 or the like.

The pad 30 is a wiring layer made of Al or the like having a thickness of about 1.5 μm,
It is formed on the surface of the insulating film 11 inside the inner peripheral plane shape, and has a square shape in conformity with the bump 50 having a square upper surface outer shape. Therefore, the wiring layer made of the annular formation 20 becomes a lower wiring layer with respect to the wiring layer made of the pads 30. Here, the pad 30 is formed such that its outer peripheral plane shape is larger than the outer shape of the upper surface of the bump 50 by about 1 to 4 μm outward. In addition, the outer peripheral edge formed on the upper surface of the annular formation 20 forms an annular protrusion that is higher than the center by the thickness of the annular formation 20.

The pad 30 can be formed, for example, by being electrically connected to another pad 30 or the like. An electric signal is connected from the pad 30 to the bump 50. Here, as described above, the pad 30 is
Can be transmitted to the bumps 50, and a wiring that is electrically connected to another pad 30 or the like can be formed. Therefore, it is possible to design the wiring space to be reduced.

The passivation film 40 is made of SiO ₂ , S
An insulating layer made of i ₃ N ₄ or the like and having a thickness of about 1.2 μm is formed on the upper surface of the convex portion on the outer peripheral edge of the pad 30 and on the surface of the insulating film 11. Here, the passivation film 40 has a structure having a square hole at a position corresponding to the bump 50, and the plane shape of the hole is smaller than the outer shape of the upper surface of the bump 50 by about 3 to 8 μm in the inner circumferential direction. I have.

Here, preferably, when the plane shape of the hole is formed so as to substantially coincide with the inner peripheral plane shape of the annular member 20, the hole is formed by laminating the annular member 20 / pad 30 / passivation film 40. The inner peripheral side surface of the formed annular convex portion can be made closer to the vertical state. By doing so, the inclination of the inner peripheral side surface of the annular convex portion of the upper surface peripheral portion of the bump 50 formed on the upper surface can be made closer to a more vertical state, so that the tip of the needle slides off the upper surface of the bump. This can be prevented more effectively.

The bump 50 is made of Au or the like and has a thickness of about 1 mm.
A bump 50 having a square shape with a top surface of 0 to 20 μm is formed. Here, the bump 50 has a peripheral portion on the laminated upper surface of the semiconductor substrate 10 / insulating film 11 / annular product 20 / pad 30 / passivation film 40 and a central portion of the semiconductor substrate 10 / insulating film 11 / pad 30. An annular projection is formed on the upper surface of the stack by plating, and an annular projection that is higher by the thickness of the annular formation 20 and the passivation film 40 is formed on the peripheral edge of the upper surface.

Here, preferably, in order to effectively reduce the contact failure due to the sliding of the needle, the bump 50 is preferably used.
It is preferable that the height of the protruding portion at the peripheral edge of the upper surface be 2 μm or more. In the terminal structure 1 of the integrated circuit of the first embodiment, specifically, the thickness of the annular formation 20 is about 0.8 μm and the thickness of the passivation film 40 is about 1.2 μm. The height of the annular projection of the bump 50 is about 2 μm.
In this case, even if the tip of the needle slides, it comes into contact with the side surface of the convex portion, and this side surface serves as a stopper. Therefore, the needle is prevented from getting over the convex portion and coming off the bump 50, resulting in poor contact. can do. In a wafer test of an integrated circuit having a multi-output element such as an LCD driver, preventing a contact failure is very effective in improving a production yield.

As described above, the terminal structure 1 of the first embodiment can prevent the needle contact failure in the wafer test of the integrated circuit by forming the annular convex portion on the peripheral edge of the upper surface of the bump 50. . The shape of the upper surface of the bump 50 is not limited to a square, but may be, for example, a rectangle, and the dimensions of the above-described portions may be various according to the specifications of the integrated circuit. Furthermore, each layer does not limit the forming method in its formation, and the material is of course not limited to the above-mentioned materials.

Hereinafter, a second embodiment of the present invention will be described with reference to the drawings. 2A and 2B are schematic schematic enlarged views of a terminal structure according to a second embodiment of the present invention, wherein FIG. 2A is a plan view and FIG. 2B is a cross-sectional view. In the figure,
Reference numeral 2 denotes a terminal structure, which has a structure in which an annular product 20 / pad 32 / passivation film 40 is laminated on the surface of the insulating film 11 on the semiconductor substrate 10, and furthermore, bumps 52 are formed by plating. The semiconductor substrate 10 constitutes an integrated circuit as in the first embodiment, and has a large number of bumps 52 formed thereon.

The pad 32 is a wiring layer made of Al or the like having a thickness of about 1.5 μm,
A bump 52 which is formed on the surface of the insulating film 11 at the inner peripheral portion inside the inner peripheral planar shape and has a square upper surface outer shape.
It has a square ring shape to fit. Here, pad 3
2 is that the outer peripheral plane shape is about 1 to
It is formed large in the outer peripheral direction of 5 μm, and the inner peripheral plane shape is formed smaller in the inner peripheral direction by about 1 to 10 μm than the inner peripheral plane shape of the annular formation 20. In addition, the outer peripheral edge of the pad 32 formed on the upper surface of the annular formation 20 forms an annular protrusion that is higher than the inner peripheral edge by the thickness of the annular formation 20.

The passivation film 40 is made of SiO ₂ , S
An insulating layer made of i ₃ N ₄ or the like and having a thickness of about 1.2 μm is formed on the upper surface of the convex portion on the outer peripheral edge of the pad 32 and the surface of the insulating film 11. Here, the passivation film 40 has a structure in which a square hole is formed on the upper surface of the convex portion at the outer peripheral edge of the pad 32, and the planar shape of the hole is approximately 3 to 8 μm inward from the outer shape of the upper surface of the bump 52. It is formed small in the direction.

Here, preferably, the plane shape of the hole is formed so as to coincide with the plane shape of the inner periphery of the annular member 20, and further, the annular shape of the inner peripheral side surface of the pad 32 and the outer peripheral edge of the pad 32 is formed. It is preferable that the slope formed from the inner peripheral side surface of the protrusion and the hole side surface of the passivation film 40 be close to a vertical state. In this manner, the inclination of the inner peripheral side surface of the annular convex portion at the upper peripheral portion of the bump 52 formed on these inclined surfaces can be made closer to a more vertical state, so that the tip of the needle slides from the upper surface of the bump. Departure can be prevented more effectively.

Further, the terminal structure of the integrated circuit according to the second embodiment is such that the height of the annular convex portion of the bump 52 is defined as the annular formed product 2.
Since the thickness of the pad 32 and the passivation film 40 is utilized, the height of the annular convex portion of the bump 52 is increased by about 1.5 μm as compared with the first embodiment. To about 3.5 μm.
For this reason, the contact failure due to the sliding of the needle could be more effectively reduced. Other structures and operations are the same as in the first embodiment.

As described above, in the terminal structure 2 of the integrated circuit according to the second embodiment, the annular convex portion is formed higher on the peripheral portion of the upper surface of the bump 52 by utilizing the thickness of the pad 32. Needle contact failure in a wafer test of an integrated circuit can be more reliably prevented.

Hereinafter, a third embodiment of the present invention will be described with reference to the drawings. 3A and 3B are schematic schematic enlarged views of a terminal structure according to a third embodiment of the present invention, wherein FIG. 3A is a plan view and FIG. 3B is a cross-sectional view. In the figure,
Reference numeral 3 denotes a terminal structure, in which a pad 33 / passivation film 40 is laminated on the surface of the insulating film 11 on the semiconductor substrate 10,
Further, the structure is such that the bumps 53 are formed by a plating method. The semiconductor substrate 10 forms an integrated circuit as in the first embodiment, and has bumps 53 formed thereon. Here, the terminal structure 3 of the integrated circuit has a structure in which the wiring has a single-layer structure and does not have a ring-shaped structure.

The pad 33 is formed on the surface of the insulating film 11 corresponding to the bump 53 as a wiring layer made of Al or the like and having a thickness of about 1.5 μm. It is a square ring. Here, the outer peripheral planar shape of the pad 33 is formed to be larger in the outer peripheral direction by about 1 to 5 μm than the outer surface of the bump 53, and the inner peripheral planar shape is formed to be smaller in the inner peripheral direction by about 3 to 10 μm than the upper surface of the bump 53. I have.

The passivation film 40 is made of SiO ₂ , S
An insulating layer made of i ₃ N ₄ or the like and having a thickness of about 1.2 μm is formed on the upper surface of the outer peripheral portion of the pad 33 and the surface of the insulating film 11. Here, the passivation film 40 is
3 has a structure having a square hole on the upper surface of the outer peripheral edge portion, and the plane shape of the hole is formed smaller in the inner circumferential direction by about 3 to 8 μm than the outer shape of the upper surface of the bump 53. The inner peripheral plane shape of the passivation film 40 is larger than the inner peripheral plane shape of the pad 33, and this portion is
3 and electrically connected.

The bump 53 is made of Au or the like and has a thickness of about 1 mm.
The outer shape of the upper surface of 0 to 20 μm is formed in a square shape. Here, the bump 53 has a peripheral portion formed on the laminated upper surface of the semiconductor substrate 10 / insulating film 11 / pad 33 / passivation film 40 and a central portion formed on the surface of the insulating film 11 by plating. An annular protrusion that is higher by the thickness of the pad 33 and the passivation film 40 is formed in the portion. Specifically, the terminal structure of the integrated circuit according to the third embodiment includes bumps 53
The thickness of the pad 33 is about 1.5 μ
m and the thickness of the passivation film 40 of about 1.2 μm, the height of the annular convex portion of the bump 53 is set to about 2.
It could be 7 μm.

Thus, the terminal structure 3 of the integrated circuit
Has a single-layer wiring structure, it is possible to use the thicknesses of the pad 33 and the passivation film 40 to form a high annular convex portion at the peripheral edge of the upper surface of the bump 53, so that the tip of the needle is It can be more effectively prevented from slipping off the upper surface of the bump. Other structures and operations are the same as in the first embodiment.

As described above, the terminal structure 3 of the integrated circuit according to the third embodiment makes use of the thickness of the pad 33 effectively.
Since the annular convex portion is formed higher at the periphery of the upper surface of the bump 53, in the terminal structure of the integrated circuit having no multilayer wiring structure, it is possible to more reliably prevent the contact failure of the needle in the wafer test of the integrated circuit. . The terminal structure 3 can of course be effectively applied to a terminal structure of an integrated circuit having a multilayer wiring structure.

In the above-described embodiment, an example in which the present invention is configured under specific conditions has been described. However, the present invention includes various modifications. That is, in the first embodiment and the second embodiment, the material of the annular formation is not limited to Al . In addition, the annular composition can be formed on the upper surface of the pad, and further, can be formed on the upper surface and the lower surface of the pad.

[0038]

As described above, according to the present invention,
In a terminal structure of an integrated circuit, a peripheral portion of a bump formed on a surface of an insulating film on a semiconductor substrate is formed to have a higher annular convex portion by using a ring-shaped product, a pad, or the like. In the wafer test, it is possible to effectively prevent the test connection needle from slipping off the upper surface of the bump and causing a contact failure. By doing so, in the wafer test, the production yield of the integrated circuit is improved.

[Brief description of the drawings]

FIG. 1 is a schematic enlarged view of a terminal structure of an integrated circuit according to a first embodiment of the present invention, wherein FIG. 1 (a) is a plan view and FIG. 1 (b) is a cross-sectional view.

FIGS. 2A and 2B are schematic schematic enlarged views of a terminal structure of an integrated circuit according to a second embodiment of the present invention, wherein FIG. 2A is a plan view and FIG. 2B is a cross-sectional view.

3A and 3B are schematic schematic enlarged views of a terminal structure of an integrated circuit according to a third embodiment of the present invention, wherein FIG. 3A is a plan view and FIG. 3B is a cross-sectional view.

FIG. 4 is a schematic enlarged view of a terminal structure of a conventional integrated circuit. FIG. 4 (a) is a plan view and FIG. 4 (b) is a cross-sectional view.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Terminal structure 2 Terminal structure 3 Terminal structure 4 Terminal structure 10 Semiconductor substrate 11 Insulating film 20 Ring formation 30 Pad 32 Pad 33 Pad 40 Passivation film 50 Bump 52 Bump 53 Bump 54 Bump

Claims (5)

(57) [Claims] 1. A terminal structure of an integrated circuit having a bump on an upper surface of a pad formed on a surface of an insulating film on a semiconductor substrate, wherein the terminal structure is formed on at least one of an upper surface and a lower surface of the pad. A wiring layer formed of an annular formation having a large outer peripheral plane shape and an inner peripheral plane shape smaller than the upper surface outer shape of the bump, wherein the wiring layer is electrically connected to the pad and the bump;
Is, the terminal structure of the integrated circuit, characterized in that said top rim portion of the bump, and the thickness of high formation of the annular formation. 2. The terminal structure for an integrated circuit according to claim 1 , wherein a passivation film for insulation is formed on said insulating film, and a hole is formed in a top surface of a peripheral portion of said pad of said passivation film. A terminal shape of the integrated circuit, the plane shape of which substantially coincides with the plane shape of the inner peripheral surface of the annular formation. 3. The mounting structure of an electronic component according to claim 1 , wherein the pad has an annular shape having an inner peripheral planar shape smaller than an inner peripheral planar shape of the annular formation. Terminal structure of integrated circuit. 4. A semiconductor device formed on a surface of an insulating film on a semiconductor substrate.
To the terminal structure of an integrated circuit with bumps on the pad
The pad may have a flat outer periphery larger than the outer shape of the upper surface of the bump.
Inner circumference that has a surface shape and is smaller than the outer shape of the top surface of this bump
Annular with a planar shape,Forming a passivation film for insulation on the insulation film;
And the periphery of the pad of the passivation film
The planar shape of the hole on the upper surface of the
Smaller and larger than the inner peripheral plane shape of the pad
Forming  The periphery of the upper surface of the bump isAnd passive
MembraneIntegrated circuit characterized by being formed higher by the thickness of
Terminal structure. 5. The claims in the mounting structure of an electronic component according to any one of claims 1 to 4, the terminal structure of the integrated circuit, characterized in that the top rim portion of the bump was formed higher than 2 [mu] m.