JP3217820B2 - Video synthesizing method and external synchronous display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a standard display system for displaying a personal computer (hereinafter, referred to as a personal computer), and in particular, to keying for displaying a moving image from an external video device on at least a part of a personal computer display. The present invention relates to a personal computer display device suitable for performing synthesis.

[0002]

2. Description of the Related Art In recent years, there has been a demand for low-priced small-sized information devices capable of handling multimedia, and it is conceivable to construct such small-sized information devices using inexpensive and small-sized personal computers. However, when configuring a device that handles multimedia using a personal computer, a CG (computer / computer) conventionally handled by the personal computer is displayed on the display screen of the personal computer.
In addition to graphics and characters, a keying synthesis device that superimposes and displays moving images (still images) from outside is required.

A conventional synthesizing apparatus is disclosed in Japanese Patent Laid-Open No. 2-81.
There is a screen synthesizing apparatus described in Japanese Patent Application Laid-Open No. 093, which will be briefly described with reference to FIG.

FIG. 5 is a block diagram showing an example of a conventional synthesizing apparatus.

In FIG. 1, internal digital image data written in a text memory 502 and a graphic memory 503 are read out in synchronization with, for example, a 23 MHz clock from an internal clock source 501, and synthesized by a multiplexer 504. . The synthesized data is written to the line memory 505 in synchronization with a 23 MHz clock from the internal clock source 501.

The external analog image data from the external image source 520 is an interlaced image signal having 525 horizontal scanning lines per two fields, and a PLL circuit 506.
, And supplied to the line memories 505 and 509 as a read clock.
Divided by 1/2 with 1/2 divider 508 and 16.5MHz
Is supplied to the line memory 509 as a write clock. External analog image data from the external image source 520 is converted by an A / D (analog / digital)
D-converted into a digital signal, and the frequency divider 508
Is written to the line memory 509 in synchronization with the write clock of 16.5 MHz from.

The internal digital image data written in the line memory 505 and the external digital data written in the line memory 509 are transmitted from the PLL circuit 506 to the 23
The data is read out in synchronization with the readout clock of MHz, synthesized by the multiplexer 510, D / A converted by the D / A (digital / analog) converter 511, and displayed on the monitor receiver 530 as a synthesized image. Since the data in the line memory 509 is read at twice the writing speed, the number of horizontal scanning lines per field can be doubled to 525.

In this conventional example, the internal image data written in the line memory 505 and the external image data written in the line memory 509 are read in synchronization with the same read clock from the PLL circuit 506. Therefore, the internal image data and the external image data are completely synchronized, and both the read data are combined by the multiplexer 510 in a digital signal state.

Other examples of this type of synthesizing apparatus include those described in JP-A-2-1664995 and JP-A-2-213895.

[0010]

In order to constitute a small information device in which the above-mentioned conventional device is applied to a personal computer, a multi-port RAM and a communication control device for inputting display data from the personal computer besides the above-mentioned conventional device and the personal computer And
An address generation circuit for reading data from the text memory 502 and the graphic memory 503, and reading and reading data to and from the line memory in synchronization with the horizontal synchronization and vertical synchronization of the external image source in order to capture a video from the external image source. A timing generation circuit for performing the operation is required.

In addition, when an external video is synthesized and displayed on a display device of a personal computer as well as the conventional device, the display frequency of the video signal from the external video device and the display frequency of the display output of the personal computer are different. Since a video signal from an external video device is of an interlaced type and a display of a personal computer is of a non-interlaced type, a complicated control circuit is required to perform synthesis.

In particular, except when the vertical display frequency of the personal computer is equal to the display frequency of the external video equipment or the vertical display frequency is an even multiple, the video display timing of the external video equipment and the display timing of the personal computer are shifted. In the memory device that captures and reads the video, the timing of loading and reading the video changes, and frames that are not displayed in the video from the external video device displayed on the personal computer, A frame that is displayed a plurality of times may occur, and the motion of a moving image that is being combined and displayed may lack smoothness. This will be described with reference to FIG. In the figure, reference numeral 800 denotes a horizontal video output from an external video device.
,... Indicate one horizontal line of video. 801
Indicates a horizontal video output of the synthesizing apparatus when synchronization is not performed at an integral multiple of the horizontal and vertical synchronizing signals of the external video device.
It corresponds to Reference numeral 803 denotes a vertical video output from an external video device, and each represents video for one field. Reference numeral 804 denotes a vertical video output of the synthesizing device when synchronization is not performed at an integral multiple of the horizontal and vertical synchronization signals of the external video device.
Corresponds to ~ in 802. As described above, since the horizontal and vertical video read timings and the composite display timing are not synchronized, a shift occurs in the video read and read timings, and the number of horizontal one-line video read operations does not become constant. The field display may change during the display of one frame. For this reason, in the display before and after the field change of the image being displayed, the display position of a moving object or the like of the image may suddenly change or the display position may not change. There is a case where the motion of the image lacks smoothness. Furthermore, in the case of application to multimedia information equipment, skipping of one horizontal line of video and the change of the field during display may be caused by a video image synthesized and displayed in response to a moving image input from an external video device. It is possible that content is lost in the multimedia information device, and there is a drawback in application to multimedia information equipment that often handles important information. Note that reference numerals 802 and 805 in FIG. 8 denote waveforms related to the present invention, which will be described later.

From the above, when the above-described conventional apparatus is applied to a personal computer to perform superimposed display, the apparatus becomes large and expensive, and at the same time, the motion of the moving image image of the composite display lacks smoothness and the image is not smooth. In some cases, a problem such as a lack of information was generated.

SUMMARY OF THE INVENTION In view of the above problems, the present invention enables a simple synthesizing device to superimpose and display CG, characters, and moving images (still images) on one display screen. It is an object of the present invention to provide an image synthesizing method and an external synchronous display device capable of synthesizing an image without causing lack of smoothness or lack of capturing of image information.

[0015]

In order to achieve the above-mentioned object, a video synthesizing method according to the present invention reads a moving image from an external video device into a memory, and displays display data read from the memory with a standard of a personal computer. In a video synthesizing method for synthesizing a moving image from an external video device and display data of a personal computer by switching and outputting display data from a display system, a horizontal and vertical synchronizing signal from the external video device is transmitted to the personal computer. Given in the standard display system, and in the standard display system,
A horizontal synchronization signal having an integer multiple frequency of the horizontal synchronization signal of the external video device is generated, and a vertical synchronization signal having an integer multiple frequency of the vertical synchronization signal of the external video device is generated. The synthesis is performed based on horizontal and vertical synchronization signals.

According to another image synthesizing method of the present invention, a moving image image from an external image device is read into a memory, and display data read from the memory and display data from a standard display system of a personal computer are switched and output. By
In a video synthesizing method for synthesizing a moving image from an external video device and display data of a personal computer, a horizontal and vertical synchronizing signal of a standard display system of the personal computer is converted into a horizontal and vertical signal having a frequency which is a fraction of an integral number thereof. Generating a synchronization signal, applying the generated horizontal and vertical synchronization signals to the external video device, using the horizontal and vertical synchronization signals of the external video device as the horizontal and vertical synchronization signals of the standard display system, This is to synthesize.

Further, the external synchronous display device according to the present invention is a display device for synthesizing display data from a standard display system of a personal computer and a moving image from an external video device. External synchronous oscillating means for setting the frequency to an integral multiple of the horizontal display frequency of the external video equipment, and setting the vertical display frequency of the standard display system to an integral multiple of the vertical display frequency of the external video equipment; A synthesizing means for synthesizing display data of the standard display system and an image of the external video device based on the horizontal display frequency and the vertical display frequency of the standard display system.

[0018]

The horizontal synchronization signal and the vertical synchronization signal of the external video equipment are supplied to the personal computer standard display system, and the frequency of the horizontal and vertical synchronization signals of the personal computer standard display system is forced to be an integral multiple of those of the external video equipment. As a result, it is possible to perform video composition without losing the smoothness of the motion of the moving image video in the composite display and without causing a loss in capturing the video information.

[0019]

FIG. 1 is a block diagram showing one embodiment of an external synchronous display device according to the present invention.

Normally, a personal computer uses a display frequency that is about twice or more than the display frequency (horizontal and vertical display frequencies) of NTSC, which is an external video signal, or more. , Non-interlaced display is performed to suppress flicker of the display. Therefore, when displaying an interlaced video image of an external video device on a personal computer, set the display frequency of the external video device to the same frequency as the display frequency of the personal computer.
At the same time, non-interlacing must be performed. For this purpose, the present embodiment employs the following configuration.

The external synchronous display device shown in FIG.
0, a synthesizing device 120, and a display device 130,
The image of the personal computer 100 and the moving image from the external video device 110 are combined and displayed. PC 100 is C
It can handle G data and character data,
It has a standard display system 101 and an external synchronous oscillator 102.
In this embodiment, the horizontal display frequency in the standard display system 101 in the personal computer 100 is set to an integral multiple of the horizontal display frequency of the external video device 110, and the vertical display frequency is set to the external video device 1
It is assumed to be an integral multiple of 10 vertical display frequencies. Standard display system 10
1 includes an analog and digital video output provided for outputting to the display device 130, a horizontal synchronizing signal output, a vertical synchronizing signal output, and a dot clock output. Here, the dot clock corresponds to the display resolution of the standard display system 101, and one pixel is displayed for each dot clock.

The external synchronous oscillator 102 is connected to the external video equipment 1
10 and horizontal and vertical synchronization from the standard display system 101
The operation clock for synchronizing the horizontal synchronization and the vertical synchronization is supplied to the standard display system 101. In this embodiment, the external synchronous oscillator 102 is the external video device 1
The PLL (P) which synchronizes the horizontal synchronization signal and the vertical synchronization signal of the standard display system 101 at an integer multiple of the horizontal synchronization signal and the integer multiple of the vertical synchronization signal, respectively.
Hase-Locked Loop) oscillation circuit. The configuration and operation will be described later with reference to FIGS.

The external video device 110 is any device that performs video output such as a VTR, an optical disk, a television camera, and a video memory, and its output signal is given in the form of, for example, an NTSC video signal.

The synthesizing device 120 is a computer of the personal computer 100.
G and character data and a moving image (or still image) image from the external video device 110 are superimposed and displayed. The A / D converter 121, the frequency divider 122, the line memory 123, the switcher 124, It has a D / A converter 125.

The frequency divider 122 divides a dot clock having a frequency that is an integral multiple of that of the external video device 110 by 1 / integer to generate a sample clock for capturing moving picture video from the external video device 110. A / D converter 12
1 as a sample clock and a write clock for the line memory 123.

The A / D converter 121 is connected to the external video equipment 11
Analog data such as a moving image (still image) image from 0 is converted into digital data such as RGB in synchronization with a sample clock from the frequency divider 122 and output to the line memory 123.

The line memory 123 stores the external video equipment 11
A memory for converting the display frequency of the moving image from 0 to the display frequency of the standard display system 101 of the personal computer. The digital data of the moving image is read from the A / D converter 121 by the write clock from the frequency divider 122. The display frequency is converted by reading the moving image video to the switcher 124 using the dot clock from the standard display system 101 of the personal computer.

The switcher 124 includes CG data and character data from the standard display system 101 and a line memory 123.
This is a circuit for digitally synthesizing by switching between the video image and the video data from the CG and character data according to the presence / absence of digital output of CG and character data from the standard display system 101 and display data of an arbitrary color.
By switching between digital output of CG and character data from the standard display system 101 and moving image data from the line memory 123, the digital output obtained by synthesizing the moving image on at least a part of the display screen of the personal computer 100 is converted into a D / A signal. Output to converter 125.

The D / A converter 125 includes a switcher 124
Is a circuit for converting digital data such as RGB into analog data, and outputs the data to the display device 130 together with the horizontal synchronization signal and the vertical synchronization signal from the standard display system 101.

The display device 130 is a display device such as a CRT or a flat display. The display device 130 receives analog data from the D / A converter 125 and horizontal and vertical synchronizing signals from the standard display system 101 and receives signals from the standard display system. 101 C
An analog output is displayed by combining the G and character data with the moving image of the external video device 110.

The sample clock of the A / D converter 121 and the write clock of the line memory 123 are obtained from a frequency divider 122 which divides the dot clock from the standard display system 101 by an arbitrary integer. Since the sample clock and the write clock are synchronized with the output of the video signal of the external video device 110 by the external synchronous oscillator 102, the control of the horizontal and vertical display start position adjustment circuit and the complicated timing generation circuit and the like are performed. No circuit is required.

Here, for example, the horizontal and vertical display frequencies of the standard display system 101 are set to twice the horizontal and vertical display frequencies of the video signal of the external video equipment 110, and the frequency is divided by 2 by the frequency divider 122 to obtain the sample clock and the sample clock. When the write clock is generated, the video for one horizontal scan of the video signal of the external video device 110 can be sampled while the standard display system 101 performs horizontal scan for two lines. In this case, the standard horizontal synchronization signal 900, the standard display system dot clock 901, and the signal 90 obtained by dividing the horizontal synchronization signal 900 by two.
2. A clock 90 obtained by dividing the dot clock 901 by two
FIG. 9 shows waveform diagrams of 3, the external video equipment horizontal synchronization signal 904, and the sample clock 905 (same as the clock 903).

As shown by reference numerals 800, 802, 803, and 805 in FIG. 8, the horizontal synchronization signal and the vertical synchronization signal of the standard display system 101 are synchronized with the horizontal synchronization signal and the vertical synchronization signal of the external video equipment 110, respectively, by integral multiples. By doing so, the horizontal and vertical video reading timing and the composite display timing when converting the display frequency using various memories are synchronized, so that there is no shift in the video writing and reading timing, and The skipping of the image for the line and the change of the field during display are prevented. Therefore, the motion of the moving image displayed in the composite display does not lack the smoothness, and the capture of the video information does not lose.

Further, by setting the display frequency of the standard display system 101 to a display frequency that is an integral multiple of that of the external video equipment 110, the frequency divider 122 can be constituted by a simple circuit using a flip-flop or the like. . For example, when an interlaced video signal is input from the external video device 110, by setting the vertical display frequency of the standard display system 101 to twice the vertical display frequency of the external video device 110 by the frequency divider 122, The moving image is read alternately by two line memories, and the frequency conversion is performed by reading the other line memory twice at twice the horizontal frequency while reading the moving image into one line memory.

Next, the external synchronous oscillator 102 of FIG. 1 will be described with reference to FIGS.

In FIG. 6, an external synchronous oscillator 102 is
A horizontal synchronization frequency divider 601, a PLL phase comparator 602,
Synchronization signal separator 603, vertical synchronization frequency divider 604, P
LL phase comparator 605 and PLL phase locked oscillator 606
Consists of

The synchronization signal separator 603 is connected to the external video equipment 1
This is a circuit for separating the output of the sync signal from 10 as a composite signal into a horizontal sync signal and a vertical sync signal. The horizontal synchronization frequency divider 601 is connected to the standard display system 101.
Divides the horizontal synchronizing signal from 1 into an integral number. The PLL phase comparator 602 performs PLL synchronization between the frequency-divided synchronization signal from the horizontal synchronization frequency divider 601 and the horizontal synchronization signal separated from the synchronization signal output of the external video device 110 by the synchronization signal separator 603. Phase comparison is performed. The vertical synchronization frequency divider 604 divides the frequency of the vertical synchronization signal from the standard display system 101 by a fraction. The PLL phase comparator 605 outputs a synchronization signal separator 603 from the divided synchronization signal from the vertical synchronization frequency divider 604 and the synchronization signal output of the external video device 110.
A phase comparison is performed for performing PLL synchronization with the vertical synchronization signal separated by. The PLL synchronization oscillator 606 variably controls the operation clock to the standard display system 101 based on the comparison result of the horizontal and vertical synchronization signals from the PLL phase comparators 602 and 605, and synchronizes with the synchronization signal from the external video device 110. Take.

The operation clock of the standard display system 101 is controlled independently of the operation clock of the processing system of the personal computer.

FIG. 7 shows the output waveforms of the respective parts which perform horizontal synchronization in order to show the operation of the external synchronous oscillator 102. The operation of the external synchronous oscillator 102 of FIG. 6 will be described with reference to FIG. .

Reference numeral 700 denotes a horizontal synchronization signal from the standard display system 101 before external synchronization is performed. Reference numeral 703 denotes a signal obtained by dividing the horizontal synchronization signal from the standard display system 101 before the external synchronization by the horizontal synchronization frequency divider 601. Reference numeral 702 denotes a synchronization signal separator 603 from the synchronization signal of the external video device 110.
Indicates that the horizontal synchronization signal is separated. 704 is
The operation clock of the standard display system 101 is changed by the PLL phase comparator 602 and the PLL synchronous oscillator 606, and the operation clock is synchronized with the horizontal synchronization signal 702 from the external video device 110. Here, in addition to the description of the synchronization signal coincidence, in order to explain that the display frequency can be adjusted by the external synchronous oscillator 102, an adjustment operation when the display frequency is not an integral multiple is also shown.

Reference numeral 705 denotes a horizontal synchronization signal from the standard display system 101 when the synchronization of 704 is obtained. 706
To indicate that the horizontal synchronization signal of the video signal from the external video device 110 overlaps with the horizontal synchronization signal from the external video device 110 once every two times of the horizontal synchronization signal from the standard display system 101. 702 is reproduced.

As described above, the external synchronizing oscillator 102 generates the synchronizing signal obtained by dividing the horizontal and vertical synchronizing signals of the standard display system 101 by an arbitrary integer, the horizontal and vertical synchronizing signals from the external video equipment 110, Is input to the PLL synchronous oscillation circuit 606, and the operation clock of the standard display system 101 is varied so as to synchronize the synchronization signal divided by a factor of 1 with the horizontal and vertical synchronization signals from the external video device 110. The display frequency of the personal computer can be set to a display frequency that is an integral multiple of the video signal from the external video device. That is, as shown in 705 and 706, the standard display system 10
The horizontal synchronization signal and the vertical synchronization signal from the external video device 110 overlap once every integer number of the horizontal synchronization signal and the vertical synchronization signal.

FIG. 2 shows a second embodiment of the external synchronous display device according to the present invention.
FIG. 3 is a block diagram showing an embodiment. The same elements as those shown in FIG. 1 are denoted by the same reference numerals.

The personal computer 200 according to the present embodiment is such that the operation clock of the standard display system 101 can be selected from the fixed oscillator 202 and the external synchronous oscillator 103.

The fixed oscillator 202 supplies an operation clock of the standard display system 101, and oscillates at a fixed frequency without being affected from the outside.

Reference numeral 204 denotes a switch for selecting the operation clock from the external synchronous oscillator 103 and the operation clock from the fixed oscillator 202.
The switch is switched to the fixed oscillator 202 when there is no input of the horizontal and vertical synchronizing signals to the receiver 03 or when there is an instruction from the personal computer 200 not to perform the synthesis. The switch is switched to the external synchronous oscillator 103 when the horizontal and vertical synchronous signals are input to the external synchronous oscillator 103 or when there is an instruction to perform synthesis by the personal computer 200. Thus, the supply of the operation clock to the standard display system 101 is selected.

Reference numeral 230 denotes a display device dedicated to the personal computer 200. A display device to be used as a normal personal computer when not synthesizing video, and a video signal from the standard display system 101, a horizontal synchronization signal,
Display is performed by the vertical synchronization signal.

In this embodiment, an example has been described in which the operation clock is switched to the operation clock of the fixed oscillator 202 when the synchronization signal is not input to the external synchronous oscillator 103.
By stopping the input of the horizontal and vertical synchronizing signals from the standard display system 101 to the standard display system 03, the oscillation frequency of the external synchronous oscillator 103 may be stabilized to obtain the operation clock of the standard display system 101. Further, when a synchronization signal is input to the external synchronous oscillator 103, the operation clock of the fixed oscillator 202 may be switched.

According to this embodiment, the external video synchronous oscillator 10
In the case where the oscillation frequency of the PLL circuit of the external synchronous oscillator 103 fluctuates when the synchronization signal is not input to 3 and affects the operation of the standard display system 101, the operation clock is supplied from the fixed oscillator 202. The operation of the standard display system 101 is ensured, and at the same time, the display frequency can be obtained by accurate oscillation from the fixed oscillator 202. Therefore, the display device 230 does not need to be a multi-scan monitor, and an inexpensive display device dedicated to a personal computer can be used.

FIG. 3 is a block diagram showing a third embodiment of the external synchronous display device according to the present invention. The same elements as those shown in FIG. 1 are denoted by the same reference numerals.

The personal computer 300 in this embodiment has a frequency divider 303 built in the standard display system 301. Further, the standard display system 301 is operated by an operation clock from the external synchronous oscillator 302, and incorporates the frequency divider 122. Along with this, the synthesizing device 320 is the synthesizing device 1 of FIG.
20, the frequency divider 122 is omitted.

The frequency divider 122 of the external synchronous display device of the present invention
Is built in the standard display system 301, and A
/ D converter 321 sample clock, line memory 3
22 and outputs the write clock to the A / D converter 3
21 and the line memory 322 to operate the synthesizing device 320
Can be operated.

Further, by outputting the operation clock and control signals of each unit from the personal computer 300, it is possible to obtain from the personal computer 300 a signal which is considered to be necessary for a synthesizing apparatus of another system.

FIG. 4 is a block diagram showing a fourth embodiment of the external synchronous display device according to the present invention. The same elements as those shown in FIGS. 1 and 2 are denoted by the same reference numerals.

The personal computer 400 according to the present embodiment is configured such that the operation clock of the standard display system 401 is obtained from the fixed oscillator 202, and the external synchronization circuit 403 is built in the standard display system 401. The external synchronization circuit 403 includes a standard display system 401 that performs display at a display frequency that is an arbitrary integral multiple of the display frequency of the video signal from the external video device 410.
By dividing the vertical and horizontal synchronizing signals of the standard display system 401 by an arbitrary integer, the external video equipment 410
And synchronizes the video signal from the external video device 410 with the horizontal and vertical synchronization signals of the standard display system 401. Accordingly, the external video device 410 that performs video output such as a VTR, an optical disk, a television camera, and a video memory has a function of performing output by synchronizing the horizontal and vertical display periods with a synchronization signal from the external synchronization circuit 403. Have.

In this embodiment, the external synchronization circuit 403 applies an external synchronization signal to the external synchronization input terminal of the external video device 410, thereby externally synchronizing the video signal from the external video device 410 from the personal computer 400 and synchronizing the video signal. The synthesized video signal and the display data from the standard display system 410
Synthesize by 0. This provides an external synchronous display device that does not require a control circuit such as a horizontal and vertical display start position adjustment circuit and a complicated timing generation circuit.

In the above embodiment, the horizontal synchronization has been mainly described, but the same operation is performed also in the vertical synchronization.

Further, the line memory 12
3 has been described, but video may be captured using at least one screen's worth of memory. In this case, the memory capacity is equal to the resolution, and the external video equipment 110
When the video signal of the NTSC standard is the NTSC standard, the resolution may be about 640 × 480 dots, and the aspect ratio corresponding to the high definition and the high resolution may be handled.

When a field memory is used in place of the line memory 123, reading of a moving image is alternately performed in two field memories in odd and even fields. Reading is performed alternately for each line from both field memories. In this case, for one field memory, read access and read access conflict, but this problem can be solved by a conventional method such as adoption of a two-port memory and use of a retrace period. Also, 2
It is also possible to use one frame memory instead of one field memory.

Further, the display resolution of the standard display system 101 and the resolution of capturing the video signal of the external video device 110 do not have to be the same. By changing the frequency division ratio of the dot clock from the standard display system 101, the sample resolution can be improved. The resolution of the captured video may be changed by changing the clock, or the size and display position of the video to be synthesized may be changed by changing the clock read out from the line memory 123.

Also, the synchronization signal from the external video equipment 110 is separated by the synchronization signal separator 603. However, if the horizontal and vertical synchronization signals are output from the external video equipment 110, the synchronization signal separator is used. No separation of the synchronization signal by 603 is necessary. Further, the synchronization signal from the standard display system 101 may be synthesized, or external synchronization may be performed using the synthesized synchronization signal.

[0062]

When an external synchronous display device of the present invention is used in a personal computer to configure a device for handling multimedia, an operation clock and a signal required in the synthesizing device are converted from the display output of the personal computer by a simple frequency divider. The conventional synthesizing apparatus does not require an address generation circuit and a complicated timing generation circuit which are necessary for reading data from a memory device. , Characters, and moving images (still images) can be displayed in a superimposed manner. In addition, video synthesis can be performed without losing the smoothness of the motion of the moving image in the composite display or causing a loss in capturing of video information. An external synchronous display device can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of an external synchronous display device according to the present invention;

FIG. 2 is a block diagram showing a second embodiment of the present invention;

FIG. 3 is a block diagram showing a third embodiment of the present invention;

FIG. 4 is a block diagram showing a fourth embodiment of the present invention;

FIG. 5 is a block diagram of a conventional device,

FIG. 6 is a block diagram showing a configuration example of an external synchronous oscillator in each embodiment;

7 is a timing chart for explaining the operation of the external synchronous oscillator of FIG. 6,

FIG. 8 is a timing chart for comparing the operation of the apparatus of the present invention with that of the conventional example,

FIG. 9 is a timing chart for explaining the operation of the external synchronous display device according to the present invention.

[Explanation of symbols]

100 personal computer, 101 standard display system, 102 external synchronous oscillator, 110 external video equipment,
120: synthesis device, 121: A / D converter, 122: frequency divider, 123: line memory, 124: switcher, 1
25: D / A converter, 130: display device, 202: fixed oscillator, 204: switch, 403: external synchronization circuit, 6
01: horizontal synchronous frequency divider; 602, 605: PLL phase comparator; 603: synchronous signal separator; 604: vertical synchronous frequency divider; 606: PLL synchronous oscillator.

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Tomohisa Kohiyama 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Yokohama, Japan Inside Microelectronics Devices Development Laboratory, Hitachi, Ltd. (72) Inventor Hiroyuki Sakai Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa 292 Hitachi Electronics, Ltd.Microelectronics Device Development Laboratory (72) Inventor Masataka Musha 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Hitachi, Ltd.Microelectronics Device Development Laboratory (72) Inventor Junji Nakata Kanagawa 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Hitachi Hitachi, Ltd. Micro-Electronics Equipment Development Laboratory (72) Inventor Masami Yamagishi Micro-Electro, Ltd. 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa, Japan (56) References JP-A-3-228480 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G09G 5/00-5/42 H04N 5/265

Claims (4)

(57) [Claims] A moving image from an external video device is read from a memory by reading a moving image from an external video device into a memory and selectively outputting display data read from the memory and display data from a standard display system of a personal computer. In an image synthesizing method for synthesizing an image and display data of a personal computer, a horizontal and horizontal direction of a standard display system of the personal computer are provided.
It has a frequency that is 1 / integer that of the vertical sync signal
Generating horizontal and vertical synchronizing signals, and transmitting the generated horizontal and vertical synchronizing signals to the external video equipment.
To the horizontal and vertical synchronization signals of the external video equipment.
And use this in the video synthesizing method and performing the synthesis based on the horizontal and vertical synchronizing signals of the standard display system. 2. From a standard display system of a personal computer.
Display data and video images from external video equipment
Display device, the horizontal display frequency of the standard display system of a personal computer
Is a frequency that is an integral multiple of the horizontal display frequency of the external video device.
And the vertical display frequency of the standard display system is
Set the frequency to an integral multiple of the vertical display frequency of the external video device.
External synchronous oscillating means, and the horizontal display frequency and vertical display frequency of the standard display system.
Based on the display data of the standard display system and the external video equipment
Synthesizing means for synthesizing the video with the personal computer.
It has a means for dividing the horizontal and vertical sync signals of the standard display system.
The output of the frequency dividing means and the horizontal and
Operation of the standard display system so that it matches the vertical synchronization signal
External synchronous display device characterized by controlling a clock
Place. 3. A fixed cycle operation clock applied to the standard display system.
A fixed oscillation means for generating a lock, and an output of the fixed oscillation means;
Power and the output of the external synchronous oscillator
Selection means for giving the display system its operating clock.
3. The external synchronization table according to claim 2, wherein the external synchronization table is provided.
Indicating device. 4. The moving picture of the external video device
And a synchronization signal from the standard display system.
And dot clock divided and read into the memory
Divider for generating a timing signal of
Read in synchronization with the sync signal and dot clock from
Data from the standard display system
And a switcher for outputting the output.
Item 3. The external synchronous display device according to item 2.