JP3200978B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, in particular, a MIS.
The present invention relates to a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art At present, MIS type semiconductor devices, particularly MOS type semiconductor devices using silicon as a semiconductor material, have been used for various purposes such as a single semiconductor element and a semiconductor integrated circuit by utilizing the feature of low power consumption. I have. Of these, especially for semiconductor integrated circuits, higher integration, higher speed,
Miniaturization is required.

Further, in order to form elements in a semiconductor integrated circuit with high uniformity, the threshold voltage is controlled by a method of introducing a conductive impurity using an ion implantation method called channel doping.

Conventionally, as a method of channel doping of a MOS type semiconductor device, after forming a gate oxide film, a conductive impurity is introduced by ion implantation to adjust the surface impurity concentration, and a polysilicon electrode is formed. Manufactured by procedures.

[0005]

However, in order to cope with high integration, high speed and miniaturization required for a semiconductor integrated circuit, it is required to make the gate oxide film thin. . As the gate oxide film becomes thinner, the electric field stress applied to the gate oxide film increases, and the characteristics of the gate oxide film become more sensitive to contamination of the gate oxide film. When channel doping is performed according to the conventional procedure, if the photoresist used to separate the ion implantation after the ion implantation is removed with sulfuric acid or the like, the gate oxide film is removed by a heavy metal contained in a small amount in the cleaning solution. Contamination occurs and the withstand voltage of the gate film drops.
In order to prevent this, a method of forming a gate oxide film after channel doping is conceivable. However, if oxidation is performed after channel doping, the impurity profile of the channel dope layer is widened, making it impossible to cope with a fine element.

Accordingly, the present invention provides a method of manufacturing a semiconductor device which does not widen the impurity profile of a channel dope layer and further protects a gate oxide film from contamination in a cleaning step after channel dope ion implantation. Aim.

[0007]

According to the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of forming a gate oxide film and forming a first polysilicon film on the gate oxide film. Forming a channel doped layer by implanting ions through the first polysilicon film; forming a second polysilicon film on the first polysilicon film; An annealing step of recovering the film quality of the gate oxide film damaged by the implantation, and a step of forming a gate electrode by etching the first and second polysilicon films. I do. In addition, the method of manufacturing a semiconductor device according to the present invention includes a step of forming a gate oxide film, a step of forming a polysilicon film on the gate oxide film, and a channel doping by ion-implanting through the polysilicon film. Forming a layer, forming a silicide film on the polysilicon film, annealing the film quality of the gate oxide film damaged by the ion implantation, and forming the polysilicon film and the silicide film. Forming a gate electrode by etching.
Further, in the method of manufacturing a semiconductor device according to the present invention, a step of forming a gate oxide film, a step of forming a first polysilicon film on the gate oxide film, and a step of forming ions through the first polysilicon film Forming a channel doped layer by implantation, forming an oxide film on the surface of the first polysilicon film, forming a second polysilicon film on the oxide film, Introducing an impurity into the polysilicon film, annealing the gate oxide film damaged by the ion implantation, and etching the first and second polysilicon films. Forming a gate electrode. Further, in the method of manufacturing a semiconductor device according to the present invention, the oxide film is an oxide film formed on a surface of the first polysilicon film by performing cleaning using sulfuric acid.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below. In this embodiment, N is used for the element isolation using LOCOS isolation.
A method for manufacturing a channel MOS transistor will be described with reference to FIG.

First, as shown in FIG. 1A, after forming a LOCOS element isolation film 101 on a P-type substrate 100 having an impurity concentration of 5 × 10 <16> cm <SUP> -3 </ SUP>, A gate oxide film 102 is formed to a thickness of 15 nm. Then, a first polysilicon film 103 is formed to a thickness of 100 nm by a CVD method. If the film thickness is too large, care must be taken because the impurity profile of the next channel doping ion implantation becomes broad.

Next, as shown in FIG. 1 (B), the acceleration energy is 120 KeV and the dose is 3.5 × 10 <SUP> 12 </ S
The channel dope layer 104 is formed by ion implantation under the condition of UP> cm <SUP> -2 </ SUP>.

Further, as shown in FIG. 1C, a second polysilicon film 1 is formed on the polysilicon film by a CVD method.
05 was deposited at 400 nm, and phosphorus was diffused by pre-deposition with phosphor glass to obtain a sheet resistance of 15Ω.
/ □.

Finally, as shown in FIG. 1D, the gate electrode is etched to a channel length of 1 μm to form a source / drain diffusion region 106, an insulating film 107 is formed, and then an aluminum wiring 108 is formed. , An N-channel MOS transistor having a threshold voltage of 0.8 V is obtained.

Next, a second embodiment of the present invention will be described below. Also in this embodiment, LOCO is used for element isolation.
A method for manufacturing an N-channel MOS transistor using S isolation will be described with reference to FIG.

First, as shown in FIG. 2A, after forming a LOCOS element isolation film 201 on a P-type substrate 200 having an impurity concentration of 5 × 10 <16> cm <SUP> -3 </ SUP>, A gate oxide film 202 is formed to a thickness of 15 nm. Then, a polysilicon film 203 is formed to a thickness of 300 nm by a CVD method, and phosphorus is diffused by pre-deposition with phosphorus glass to obtain a sheet resistance of 50Ω / □. Care must be taken in the thickness of the polysilicon film as in the first embodiment.

Next, as shown in FIG. 2B, the acceleration energy is 120 KeV, and the dose is 3.5 × 10 <SUP> 12 </ S
The channel dope layer 204 is formed by ion implantation under the condition of UP> cm <SUP> -2 </ SUP>.

Further, as shown in FIG. 2C, a molybdenum silicide film 205 is deposited on the polysilicon film by sputtering to a thickness of 150 nm. The silicide layer does not need to be molybdenum silicide, and the same effect can be obtained by using any low-resistance silicide such as tungsten silicide.

Finally, as shown in FIG. 2D, the gate electrode is etched to a channel length of 1 μm to form a source / drain diffusion region 206, and after forming an insulating film 207,
By providing aluminum wiring 208, an N-channel MOS transistor having a threshold voltage of 0.8 V can be obtained.
According to this method, the number of manufacturing steps does not increase as compared with the conventional method of manufacturing a semiconductor device using a polycide gate.

Finally, a third embodiment of the present invention will be described below. In this embodiment, a method of manufacturing an N-channel MOS transistor using LOCOS isolation for element isolation will be described with reference to FIG.

First, as shown in FIG. 3A, after forming a LOCOS element isolation film 301 on a P-type substrate 300 having an impurity concentration of 5 × 10 <16> cm <SUP> -3 </ SUP>, A gate oxide film 302 is formed to a thickness of 15 nm. Then, the N-type first polysilicon film 303 having a sheet resistance of 100Ω / □ is
It is formed to a thickness of 100 nm by a VD method. As in the above two examples, the first
Care must be taken for the polysilicon film thickness.

Next, as shown in FIG. 3 (B), the acceleration energy is 120 KeV, and the dose is 3.5 × 10 <SUP> 12 </ S
The channel dope layer 304 is formed by ion implantation under the condition of UP> cm <SUP> -2 </ SUP>.

After ion implantation, the wafer is washed with sulfuric acid to form a natural oxide film 305 of 5 nm on the first polysilicon film as shown in FIG.

Further, as shown in FIG. 3D, a polysilicon film 306 is formed on the natural oxide film by CVD.
0 nm is deposited, and phosphorus is diffused by pre-deposition with phosphorus glass to obtain a sheet resistance of 15Ω / □. At this time, since the diffusion of phosphorus is stopped by the natural oxide film, phosphorus is not diffused into the first polysilicon.

Finally, as shown in FIG. 3E, the gate electrode is etched to a channel length of 1 μm to form a source / drain diffusion region 307, and after forming an insulating film 308,
By providing aluminum wiring 309, an N-channel MOS transistor having a threshold voltage of 0.8 V can be obtained.

Although the three embodiments have been described above, in all three examples, damage by ion implantation can be recovered by annealing using a rapid thermal annealing method such as lamp annealing before etching the gate electrode. Further improvement of the film quality can be expected.

In this embodiment, the N-channel MOS
Although only the transistor has been described, it goes without saying that the same effect can be obtained with a P-channel MOS transistor.

[0026]

According to the method of manufacturing a semiconductor device as described above, the cleaning solution does not directly contact the gate oxide film during cleaning after channel doping ion implantation. Even if the gate oxide film becomes thinner in accordance with the demand for higher speed and finer structure, the quality of the gate oxide film is not degraded even if the gate oxide film is thinned. Further, since the ion-implanted permeable film can be made thin, the impurity distribution of channel doping does not become broad.

According to the method of manufacturing a semiconductor device according to the third embodiment of the present invention, even if impurities are introduced into polysilicon by a predeposition method, the first polysilicon layer and the second Since the diffusion of impurities is suppressed by the oxide film between the polysilicon layers, deterioration of the film quality of the gate oxide film is further suppressed.

[Brief description of the drawings]

FIG. 1 is a diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram showing a second embodiment of the present invention.

FIG. 3 is a diagram showing a third embodiment of the present invention.

[Explanation of symbols]

 100. . . P-type substrate 101. . . LOCOS element isolation film 102. . . Gate oxide film 103. . . First polysilicon film 104. . . Channel dope layer 105. . . Second polysilicon film 106. . . Source / drain diffusion region 107. . . Insulating film 108. . . Aluminum wiring layer 200. . . P-type substrate 201. . . LOCOS element isolation film 202. . . Gate oxide film 203. . . Polysilicon film 204. . . Channel dope layer 205. . . Molybdenum silicide film 206. . . Source / drain diffusion region 207. . . Insulating film 208. . . Aluminum wiring layer 300. . . P-type substrate 301. . . LOCOS element isolation film 302. . . Gate oxide film 303. . . First polysilicon film 304. . . Channel dope layer 305. . . Natural oxide film 306. . . Second polysilicon layer 307. . . Source / drain diffusion region 308. . . Insulating film 309. . . Aluminum wiring layer

──────────────────────────────────────────────────続 き Continued on the front page (58) Fields surveyed (Int. Cl. ⁷ , DB name) H01L 29/78 H01L 21/336

Claims (4)

(57) [Claims] A step of forming a gate oxide film; a step of forming a first polysilicon film on the gate oxide film; and a channel dope layer by ion implantation through the first polysilicon film. Forming a second polysilicon film on the first polysilicon film; annealing the gate oxide film damaged by the ion implantation; recovering the film quality of the gate oxide film; Forming a gate electrode by etching the first polysilicon film and the second polysilicon film. 2. a step of forming a gate oxide film, a step of forming a polysilicon film on the gate oxide film, and a step of forming a channel dope layer by ion-implanting through the polysilicon film. Forming a silicide film on the polysilicon film; an annealing step of restoring the film quality of the gate oxide film damaged by the ion implantation; and etching the polysilicon film and the silicide film to form a gate. A method of manufacturing a semiconductor device, comprising: forming an electrode. A step of forming a gate oxide film; a step of forming a first polysilicon film on the gate oxide film; and a channel dope layer by ion-implanting through the first polysilicon film. Forming an oxide film on the surface of the first polysilicon film; forming a second polysilicon film on the oxide film; and adding an impurity to the second polysilicon film. A step of introducing, an annealing step of restoring the film quality of the gate oxide film damaged by the ion implantation, and a step of forming a gate electrode by etching the first and second polysilicon films. A method for manufacturing a semiconductor device, comprising: 4. The method according to claim 3, wherein the oxide film is an oxide film formed on a surface of the first polysilicon film by performing cleaning with sulfuric acid. .