JP3175362B2 - Liquid crystal display - Google Patents

Liquid crystal display

Info

Publication number
JP3175362B2
JP3175362B2 JP33749092A JP33749092A JP3175362B2 JP 3175362 B2 JP3175362 B2 JP 3175362B2 JP 33749092 A JP33749092 A JP 33749092A JP 33749092 A JP33749092 A JP 33749092A JP 3175362 B2 JP3175362 B2 JP 3175362B2
Authority
JP
Japan
Prior art keywords
liquid crystal
substrate
transistor
insulating film
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP33749092A
Other languages
Japanese (ja)
Other versions
JPH06186579A (en
Inventor
清文 北和田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=18309145&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JP3175362(B2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP33749092A priority Critical patent/JP3175362B2/en
Publication of JPH06186579A publication Critical patent/JPH06186579A/en
Application granted granted Critical
Publication of JP3175362B2 publication Critical patent/JP3175362B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal Display Device Control (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、アクティブマトリック
ス型液晶表示装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display device.

【0002】[0002]

【従来の技術】従来の液晶表示装置の一例を図1を用い
て説明する。
2. Description of the Related Art An example of a conventional liquid crystal display device will be described with reference to FIG.

【0003】この図は液晶表示装置の外観図である。FIG. 1 is an external view of a liquid crystal display device.

【0004】ガラス、石英等の基板101上に画素エリ
ア105を図1(a)のように配置し、この画素部の周
辺に薄膜トランジスタの集積回路からなるドライバー回
路103、104を配置している。対向基板102は、
画素エリア105とドライバー回路103、104の間
にその縁が位置するように、紫外線硬化樹脂等のシール
材106により基板101に固定されている。また対向
基板の透明電極の電位は導電性接着剤によって基板側の
パッド107を通してコモン電位に固定されている。
A pixel area 105 is arranged on a substrate 101 made of glass, quartz or the like as shown in FIG. 1A, and driver circuits 103 and 104 each composed of an integrated circuit of a thin film transistor are arranged around the pixel area. The counter substrate 102 is
It is fixed to the substrate 101 by a sealing material 106 such as an ultraviolet curing resin so that the edge is located between the pixel area 105 and the driver circuits 103 and 104. The potential of the transparent electrode on the opposite substrate is fixed at a common potential through a pad 107 on the substrate side by a conductive adhesive.

【0005】これは素子基板101と対向基板102の
間に封入されている液晶に水分等が流入するのをできる
だけ避けるためであり、更にドライバー回路、或いはそ
の周辺には電源と同じ電位持つ配線があるのでそれによ
って液晶に電界をかけないためである。
This is to prevent as much as possible moisture from flowing into the liquid crystal sealed between the element substrate 101 and the counter substrate 102, and furthermore, a driver circuit or a wiring around the driver circuit having the same potential as the power supply is provided. This is because an electric field is not applied to the liquid crystal due to the presence of the liquid crystal.

【0006】この図1のA−A’の部分での構造断面図
を図1(b)に示した。基板101上に多結晶シリコン
等による薄膜トランジスタ113が形成されている。薄
膜トランジスタ、ソース配線、画素電極114は第2層
間絶縁膜120に覆われてはいるが、画素電極114の
上部は開孔されている。このトランジスタのゲート電極
は最終的に終端部116でコンタクトホールを介して配
線117に接続しており、配線117は対向基板端部よ
り外側に形成されたトランジスタの集積回路からなるド
ライバー回路103と接続している。
FIG. 1B is a sectional view of the structure taken along the line AA ′ in FIG. A thin film transistor 113 made of polycrystalline silicon or the like is formed over a substrate 101. Although the thin film transistor, the source wiring, and the pixel electrode 114 are covered with the second interlayer insulating film 120, the upper part of the pixel electrode 114 is opened. The gate electrode of this transistor is finally connected to the wiring 117 via the contact hole at the terminal end 116, and the wiring 117 is connected to the driver circuit 103 formed outside the end of the opposing substrate and composed of an integrated circuit of transistors. are doing.

【0007】対向基板102には透明電極111が全面
に形成されており、紫外線硬化樹脂等のシール材106
により基板に固定されている。基板101、対向基板1
02をポリイミド等の配向膜112で覆っている。
[0007] A transparent electrode 111 is formed on the entire surface of the opposing substrate 102, and a sealing material 106 such as an ultraviolet curable resin is used.
To the substrate. Substrate 101, counter substrate 1
02 is covered with an alignment film 112 such as polyimide.

【0008】また図1のB−B’の部分での構造断面図
を図1(c)に示した。基板101上の第1層間絶縁膜
119の上層に配線306が形成されており、これらは
更に酸化シリコン等の第2層間絶縁膜120で覆われて
いるが、パッド107、画素電極114上部は開孔して
ある。この上にポリイミド等の配向膜112を塗布して
ある。このパッド107はコモン電位になるように配線
されているので、この部分に導電性接着剤118を塗布
し、対向基板102を圧着すると対向基板の対向電極1
11はこれによりコモン電位となる。
FIG. 1C is a structural sectional view taken along the line BB 'of FIG. Wirings 306 are formed above the first interlayer insulating film 119 on the substrate 101, and these are further covered with a second interlayer insulating film 120 such as silicon oxide. There is a hole. An alignment film 112 such as polyimide is applied thereon. Since the pad 107 is wired so as to have a common potential, a conductive adhesive 118 is applied to this portion, and when the opposing substrate 102 is pressed, the opposing electrode 1 of the opposing substrate is pressed.
11 becomes the common potential.

【0009】また図2は(a)は上述の液晶表示装置の
斜視図であるが、このようにシールエリアを横切る配線
の数は画素数の2倍から4倍程度と非常に多い。図2の
(b)は、このシールを横切るソース配線の断面図であ
る。第1層間絶縁膜上に形成されるソース配線は800
0Å程度のアルミニウムであり、1μm以下の酸化シリ
コンによって覆われている。
FIG. 2A is a perspective view of the above-mentioned liquid crystal display device. As described above, the number of wirings crossing the sealing area is as large as about two to four times the number of pixels. FIG. 2B is a cross-sectional view of the source wiring crossing the seal. The source wiring formed on the first interlayer insulating film is 800
Aluminum of about 0 ° is covered with silicon oxide of 1 μm or less.

【0010】[0010]

【発明が解決しようとする課題】しかしながら従来の技
術では、ドライバー回路がシールエリアより外部に配置
されているため、シールエリアを横切る配線の数が画素
数の2倍以上と多く、しかも段差がきつく液晶を劣化さ
せる水分等の流入の可能性があった。
However, in the prior art, since the driver circuit is disposed outside the seal area, the number of wirings crossing the seal area is as large as twice or more the number of pixels, and the step is tight. There is a possibility that water or the like that deteriorates the liquid crystal flows in.

【0011】[0011]

【課題を解決するための手段】本発明は、一対の基板間
のシール部の内側に液晶が狭持されてなリ、 前記一対
の基板の一方の基板の前記シール部の内側にはトランジ
スタと、前記トランジスタ上に絶縁膜を介して配置され
た画素電極とを有し、前記絶縁膜は、前記画素電極を配
置した画素エリアから前記一方の基板上の前記シール部
に対向する領域にかけて、しかもシール部を横切る配線
を覆うように配置されてなり、前記一方の基板の前記シ
ール部の外側には前記トランジスタを駆動する駆動回路
が前記トランジスタと同時に形成されてなり、前記駆動
回路上には前記絶縁膜が配置されているとともに前記画
素電極が取り除かれてなることを特徴とする。
According to the present invention, a liquid crystal is held inside a seal portion between a pair of substrates, and a transistor is provided inside the seal portion of one of the pair of substrates. , and a pixel electrode disposed via an insulating film on the transistor, the insulating film, distribution of the pixel electrode
Over the area facing the location the pixel area on the sealing portion on the one substrate, moreover wires crossing the seal portion
The result is arranged to cover, on the outside of the sealing portion of the one substrate will be formed simultaneously with the driving circuit is the transistor for driving the transistor, the insulating film is disposed on the driving circuit And the pixel electrode is removed.

【0012】[0012]

【実施例】以下実施例に基づいて本発明を詳しく説明す
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to embodiments.

【0013】図3の(a)は本発明による液晶表示装置
の一例の正面外観図である。素子基板301上に対向基
板302が紫外線硬化樹脂等のシール材303によって
固定され、液晶が封入されている。ドライバー回路30
4はシールエリアより外側に配置されている。四隅の電
極305は対向基板の対向電極に電位を与えるための導
通をとるためのもので、その電位は導電性接着剤等を用
いて素子基板の外部接続端子306から与えられるある
電位に固定される。
FIG. 3A is a front external view of an example of the liquid crystal display device according to the present invention. A counter substrate 302 is fixed on an element substrate 301 by a sealing material 303 such as an ultraviolet curable resin, and liquid crystal is sealed. Driver circuit 30
Reference numeral 4 is disposed outside the seal area. The electrodes 305 at the four corners are for conducting to give a potential to the counter electrode of the counter substrate, and the potential is fixed to a certain potential given from the external connection terminal 306 of the element substrate using a conductive adhesive or the like. You.

【0014】図3の(b)は画素エリアからシールエリ
アにかけての構造断面図である。基板301上に画素駆
動用薄膜トランジスタ313が形成されている。シール
エリアの外側にはトランジスタの集積回路からなるドラ
イバー回路304が配置されており、これら素子基板の
画素エリアよりシールエリア下部までをポリイミド等の
透明有機絶縁膜319によって覆っている。この透明有
機絶縁膜の上にITO314等の画素電極が形成されて
おり、画素トランジスタのドレイン電極とコンタクトホ
ール315を介して接続されている。
FIG. 3B is a structural sectional view from the pixel area to the seal area. A pixel driving thin film transistor 313 is formed over a substrate 301. A driver circuit 304 composed of an integrated circuit of transistors is arranged outside the seal area, and the area from the pixel area to the lower part of the seal area of the element substrate is covered with a transparent organic insulating film 319 such as polyimide. A pixel electrode such as ITO 314 is formed on the transparent organic insulating film, and is connected to a drain electrode of the pixel transistor via a contact hole 315.

【0015】図3の(c)は画素エリアからシールエリ
アにかけての構造断面図である。
FIG. 3C is a structural sectional view from the pixel area to the seal area.

【0016】対向基板302の電位は、導電性接着剤3
20を通して透明有機絶縁膜上のITO等の電極305
に接続され、更にこの電極はその下部にあるコモン電位
を持つ配線318に接続され、コモン電位に固定されて
いる。
The potential of the opposing substrate 302 is controlled by the conductive adhesive 3
An electrode 305 such as ITO on a transparent organic insulating film through 20
, And this electrode is connected to a wiring 318 having a common potential thereunder and fixed at a common potential.

【0017】また図にこの液晶表示装置において、シ
ールを横切る配線の断面図を示した。前記有機膜は応力
が少なく酸化シリコンより厚く塗布してもクラックが入
る等の問題もないので、ソース配線を充分に埋め込むこ
とができるため酸化シリコンよりも表面が平滑となる。
FIG. 3 is a cross-sectional view of a wiring crossing a seal in the liquid crystal display device. Since the organic film has less stress and has no problem such as cracking even if it is applied thicker than silicon oxide, the source wiring can be sufficiently buried, so that the surface becomes smoother than silicon oxide.

【0018】[0018]

【発明の効果】本発明の液晶表示装置の構造をとること
により、シールエリア下部の凹凸が少なく封入された液
晶への水分等の流入が減り、長期に渡って液晶の劣化が
少なく信頼性の高い液晶表示装置を提供することができ
る。
By adopting the structure of the liquid crystal display device of the present invention, the unevenness at the lower part of the seal area is reduced, the inflow of moisture and the like into the sealed liquid crystal is reduced, and the deterioration of the liquid crystal is reduced over a long period of time. A high liquid crystal display device can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】従来の技術による液晶表示装置の構造を示す外
観図。
FIG. 1 is an external view showing a structure of a liquid crystal display device according to a conventional technique.

【図2】従来の技術による液晶表示装置の構造を示す斜
視図。
FIG. 2 is a perspective view showing a structure of a liquid crystal display device according to a conventional technique.

【図3】本発明による液晶表示装置の構造を示す断面
図。
FIG. 3 is a cross-sectional view illustrating a structure of a liquid crystal display device according to the present invention.

【符号の説明】[Explanation of symbols]

101、201、301・・・素子基板 102、202、302・・・対向基板 113、207、313・・・画素駆動トランジスタ 116、316、・・・画素駆動トランジスタのゲート
電極、及びゲート配線 106、205、303・・・シールエリア 103、104、203、204、304・・・ドライ
バー回路 117、317・・・配線 105・・・画素エリア 114、314・・・画素電極 111、311・・・対向電極 318・・・コモン電位を持つ配線 107、305・・・コモン電位を持つパッド 110、310・・・ブラックマトリックス 115、315・・・画素電極とのコンタクトホール 118、320・・・導電性接着剤 319・・・透明有機絶縁膜 112、312・・・配向膜 119・・・第1層間絶縁膜 120・・・第2層間絶縁膜 108、206、306・・・外部接続端子
101, 201, 301 ... element substrate 102, 202, 302 ... counter substrate 113, 207, 313 ... pixel drive transistor 116, 316 ... gate electrode and gate wiring 106 of the pixel drive transistor 205, 303: Seal area 103, 104, 203, 204, 304: Driver circuit 117, 317: Wiring 105: Pixel area 114, 314: Pixel electrode 111, 311: Opposite Electrode 318: Wiring having common potential 107, 305: Pad having common potential 110, 310 ... Black matrix 115, 315: Contact hole with pixel electrode 118, 320 ... Conductive bonding Agent 319: Transparent organic insulating film 112, 312: Alignment film 119: First layer Insulating film 120 ... second interlayer insulating film 108,206,306 ... external connection terminal

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) G02F 1/1345 G02F 1/1339 505 G02F 1/1368 G09G 3/36 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) G02F 1/1345 G02F 1/1339 505 G02F 1/1368 G09G 3/36

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 一対の基板間のシール部の内側に液晶
が狭持されてなリ、 前記一対の基板の一方の基板の前記シール部の内側には
トランジスタと、前記トランジスタ上に絶縁膜を介して
配置された画素電極とを有し、前記絶縁膜は、前記画素
電極を配置した画素エリアから前記一方の基板上の前記
シール部に対向する領域にかけて、しかもシール部を横
切る配線を覆うように配置されてなり、前記一方の基板
の前記シール部の外側には前記トランジスタを駆動する
駆動回路が前記トランジスタと同時に形成されてなり、
前記駆動回路上には前記絶縁膜が配置されているととも
に前記画素電極が取り除かれてなることを特徴とする液
晶表示装置。
1. A liquid crystal is held inside a seal between a pair of substrates. A transistor is provided inside the seal of one of the pair of substrates, and an insulating film is formed on the transistor. and a pixel electrode disposed over the insulating film, the pixel
Over the pixel areas arranged electrodes in a region facing the sealing portion on the one substrate, yet the seal portion lateral
A drive circuit for driving the transistor is formed outside the seal portion of the one substrate at the same time as the transistor, and is arranged so as to cover the cut wiring .
The liquid crystal display device, wherein the insulating film is disposed on the drive circuit and the pixel electrode is removed.
JP33749092A 1992-12-17 1992-12-17 Liquid crystal display Expired - Lifetime JP3175362B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33749092A JP3175362B2 (en) 1992-12-17 1992-12-17 Liquid crystal display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33749092A JP3175362B2 (en) 1992-12-17 1992-12-17 Liquid crystal display

Publications (2)

Publication Number Publication Date
JPH06186579A JPH06186579A (en) 1994-07-08
JP3175362B2 true JP3175362B2 (en) 2001-06-11

Family

ID=18309145

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33749092A Expired - Lifetime JP3175362B2 (en) 1992-12-17 1992-12-17 Liquid crystal display

Country Status (1)

Country Link
JP (1) JP3175362B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102198312B1 (en) * 2018-11-30 2021-01-05 주식회사 진일 Tunnel entrance membrane structure to prevent traffic accident

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6980275B1 (en) 1993-09-20 2005-12-27 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
JP3640224B2 (en) * 1996-06-25 2005-04-20 株式会社半導体エネルギー研究所 LCD panel
US7298447B1 (en) 1996-06-25 2007-11-20 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display panel
JP3883641B2 (en) 1997-03-27 2007-02-21 株式会社半導体エネルギー研究所 Contact structure and active matrix display device
JPH10268361A (en) 1997-03-27 1998-10-09 Semiconductor Energy Lab Co Ltd Liquid crystal display device and its manufacture
JP3830115B2 (en) * 1997-10-06 2006-10-04 シャープ株式会社 Liquid crystal display element
KR100315209B1 (en) * 1999-12-17 2001-11-29 구본준, 론 위라하디락사 Liquid Crystal Display Device and Method of Fabricating the Same
KR100315208B1 (en) * 1999-12-17 2001-11-26 구본준, 론 위라하디락사 Liquid Crystal Display Device and Method of Fabricating the Same
JP2006201312A (en) 2005-01-18 2006-08-03 Nec Corp Liquid crystal display panel and liquid crystal display device
JP2017068031A (en) * 2015-09-30 2017-04-06 トッパン・フォームズ株式会社 Information display medium

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102198312B1 (en) * 2018-11-30 2021-01-05 주식회사 진일 Tunnel entrance membrane structure to prevent traffic accident

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