JP3159381B2 - Received signal switching device for satellite broadcast receiving converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reception signal switching device for a satellite broadcast reception converter, and more particularly, to a plurality of intermediate frequencies (Interm) obtained from received satellite broadcast radio waves.
editiFrequency (IF) signal, and one of the plurality of IF signals is selected and output to at least one of a plurality of output terminals. The present invention relates to a reception signal switching device used in the above.

[0002]

2. Description of the Related Art Broadcasting Satellite (B)
When viewing a digital broadcast using S), the broadcast radio wave transmitted from the BS is received by the BS antenna,
It is immediately sent to a satellite broadcast receiving converter (BS converter) for frequency reduction. The BS converter extracts a right-handed circularly polarized wave or a left-handed circularly polarized wave from a received broadcast wave, and converts the circularly polarized wave into a predetermined IF by mixing with a predetermined local frequency signal generated by a local oscillator. , IF signal. The IF signal is appropriately amplified and then sent to a satellite broadcast receiving tuner (BS tuner).

[0003] The BS tuner selects a desired broadcast channel from the IF signals input from the BS converter, demodulates it, and extracts video and audio baseband signals. The extracted baseband signal is sent to a television receiver connected to a BS tuner. In this way, satellite broadcasting of a desired broadcast channel can be viewed.

[0004] As one of the BS converters having such a function, a two-input / two-output BS converter is known in which one unit can output a reception signal to two BS tuners. In this BS converter, both the right-handed circularly polarized wave and the left-handed circularly polarized wave extracted from the digital broadcast radio wave received by the BS antenna are input. These right-handed and left-handed circularly polarized waves are frequency-converted by mixing them with the local frequency signal of the local oscillator to generate first and second IF signals. These two IF signals are then respectively input to two input terminals of a two-input / two-output signal switching circuit.

One of the first and second IF signals input to the signal switching circuit is selected according to a selection signal sent from a BS tuner connected to the BS converter. Then, the selected one intermediate frequency signal is output to both or one of the two output terminals of the signal switching circuit. Whether the selected IF signal is output to both of the two output terminals of the signal switching circuit or only one of them is determined by the selection signal sent from the BS tuner.

In the next stage of the signal switching circuit, two I terminals connected to two output terminals of the signal switching circuit are provided.
An F amplifier is provided. IF signals output from both or one of the output terminals of the signal switching circuit are appropriately amplified by IF amplifiers corresponding to the two output terminals of the signal switching circuit, and then both of the two output terminals of the BS converter are used. Or output from either one. Thus, the IF signal output from the BS converter is sent to the BS tuner.

In the two-input / two-output BS converter having the above configuration, the above-described signal switching circuit and IF amplifier are connected to each other via an inter-stage connection circuit for impedance matching. This interstage connection circuit usually includes first and second inductor elements provided between two output terminals of the signal switching circuit and two corresponding IF amplifiers. This is because the two IFs output from the signal switching circuit using these inductor elements
This is because a peaking phenomenon is caused in each of the signals to maintain a high gain of the two IF signals over a wide frequency band.

The general configuration of a conventional two-input, two-output BS converter is as follows. That is, a semiconductor integrated circuit (Integrated Circuit) incorporating the above signal switching circuit.
t, IC), and I which incorporates the two intermediate frequency amplifiers.
C and the two inductor elements are connected to a printed wiring board (Pr
on the inted Wiring Board (PWB).
Then, the mounted signal switching circuit IC, IF amplifier IC, and inductor element are connected to each other via a predetermined wiring pattern formed on the PWB. In other words, only the signal switching circuit and the two IF amplifiers are integrated into an IC, and the inductor element for interstage connection is mounted externally on the PWB between the two ICs. is there.

It is to be noted that the signal switching circuit and the two IF amplifiers themselves may be individually constructed using individual electronic components such as transistor elements.

[0010] The inductor element is formed of, for example, a planar inductor formed by patterning a conductor in a spiral pattern on a plane. The spiral shape, direction, and size of the spirals of the two inductor elements are all the same, and are arranged at predetermined locations on the PWB.
The inductance value of both inductor elements is, for example, 15n
H.

[0011]

Generally, in the above-described two-input / two-output BS converter, the "isolation" between two signal paths and the output signal of an IF amplifier provided in each of the two signal paths are provided. It is necessary to improve the three characteristics of “gain” and “gain deviation”.

"Isolation" refers to how much an IF signal not selected by the signal switching circuit affects a selected IF signal, in other words, is not selected as an output terminal of the BS converter. It shows how much the IF signal leaks. The less the effect of this non-selection signal, ie, the less leakage, the better the "isolation" characteristics.

"Gain" indicates the gain of the output signal of the IF amplifier (ie, the selected IF signal). In other words, it means the gain of the output signal obtained by amplifying the selected IF signal by the IF amplifier. Needless to say, a larger “gain” is preferable.

"Gain deviation" indicates a difference in gain between output signals of two IF amplifiers. In other words, it means the difference in gain between two output signals obtained by amplifying the selected IF signal with two IF amplifiers. Needless to say, the smaller the “gain deviation”, the better.

However, these three characteristics vary depending not only on the inductance values of the two inductor elements of the interstage connection circuit, but also on the arrangement itself of the inductor elements such as the direction and distance of the inductor elements and their mutual relationship. . In addition, these three characteristics have a relationship that when one of them is improved, the other one or two characteristics are deteriorated. For this reason, "isolation", "gain",
There is a problem that it is difficult to simultaneously improve the three characteristics of "gain deviation".

In consideration of this point, in the conventional BS converter having the above-described configuration, adjustment components are provided on the PWB so that the amplification characteristics of the two IF amplifiers can be finely adjusted after mounting. Then, by appropriately operating the adjusting component during the test of the BS converter, the I
The circuit characteristics of the F-amplifier are finely adjusted so that the three characteristics of "isolation", "gain", and "gain deviation" are improved as much as possible within a predetermined range.

However, the range that can be improved by adjusting the adjustment components after mounting is limited, and it is not easy to improve all three characteristics by that.

[0018] Conventionally, it has been desired to integrate the signal switching circuit, the inductor, and the IF amplifier as a whole from the viewpoints of improving reliability and reducing manufacturing costs. It is difficult to achieve because of

Accordingly, an object of the present invention is to provide a BS converter capable of simultaneously improving the three characteristics of "isolation characteristics" of each signal path and "gain characteristics" of output signals and "gain deviation characteristics" between a plurality of output signals. To provide a reception signal switching device for use in the system.

Another object of the present invention is to provide a reception signal switching device for a BS converter which can omit an adjustment component for finely adjusting circuit characteristics.

Still another object of the present invention is to provide a signal switching circuit, a plurality of IF amplifying circuits for amplifying an IF signal output from the signal switching circuit, the signal switching circuit and the I / O circuits.
An object of the present invention is to provide a reception signal switching device for a BS converter in which a plurality of inductor elements for connecting an F amplifier circuit between stages are formed on one semiconductor substrate.

[0022]

(1) A reception signal switching device for a BS converter according to the present invention includes a plurality of input terminals to which a plurality of intermediate frequency signals generated from received satellite broadcast radio waves are input. Has a plurality of signal paths whose input terminals are respectively connected to the plurality of input terminals, and
One of the plurality of intermediate frequency signals input from the plurality of input terminals is selected, and the selected one intermediate frequency signal is passed through at least one of the plurality of signal paths to a desired signal path. Including a signal switching circuit for outputting to an output terminal of the circuit, and a plurality of interstage connecting inductor elements;
The input terminal of the inductor element corresponds to the signal switching circuit.
Connected to the output end of the signal path
Interstage connection circuit for dance matching and interstage connection
The input terminal is connected to the output terminal of the corresponding inductor element of the circuit.
A plurality of intermediate frequency amplifier circuits connected to each other, and an output terminal of each of the plurality of intermediate frequency amplifier circuits ,
The corresponding output signals of the intermediate frequency amplification circuit are taken out.
A plurality of output terminals, and a plurality of the interstage connection circuits.
The above-mentioned inductor element has a conductor patterned into a predetermined shape.
Each having a planar inductor portion formed by
And all of these inductors are on one plane.
And two adjacent ones on the plane
The inductor section draws a straight line connecting these two inductor sections.
Perpendicular to a straight line bisecting and extending parallel to said plane
Satisfies the mirror image relationship, and
The electromagnetic waves leaking from the
It is characterized in that the vibration phenomenon is suppressed .

(2) The inventor of the present invention has conducted various studies to simultaneously improve the above three characteristics of “isolation”, “gain”, and “gain deviation”.
The inability to improve these three characteristics has been found to be due to electromagnetic waves leaking from the interstage connecting inductor element. That is, the electromagnetic wave leaking from one of the plurality of inter-stage connection inductor elements affects another adjacent inductor element due to the electromagnetic induction phenomenon, while the electromagnetic wave leaking from the affected inductor element has an effect. The other inductor element is affected by the electromagnetic induction phenomenon. As a result, the leakage electromagnetic waves cause a “resonance phenomenon” in the inductor elements, whereby the above three characteristics are greatly fluctuated.
I got the knowledge.

The present invention has been made based on such knowledge, and therefore, the pattern of each of the plurality of inductor elements for interstage connection is different from the pattern of another adjacent inductor element. Specifically, the interstage connection circuit for impedance matching
Multiple inductor elements pattern conductors into predetermined shapes
Each having a planar inductor portion formed by
And all of these inductors are on one plane.
Are located in And two adjacent on the plane
Of the inductor section is the direct connection between the two inductor sections.
Bisects the line vertically into a straight line that extends parallel to the plane
On the other hand, a mirror image relationship is satisfied. By this
Since the electromagnetic waves leaking from the adjacent inductor portions cancel each other, the resonance phenomenon of the leaking electromagnetic waves is suppressed.

For this reason, the unselected IF signal is
Even if it affects the electromagnetic waves leaking from the inductor element, the effects of the unselected IF signals are canceled out and reduced. As a result, the isolation characteristics of each signal path of the signal switching circuit are improved.

Further, since the isolation characteristics of each signal path are improved, the distance between the inductor elements can be reduced, so that the variable range of the inductance value can be expanded. In other words, the design margin for the circuit characteristics of the interstage connection circuit increases. Therefore, by appropriately setting the distance between the inductor elements and the inductance values of the inductor elements, the gain characteristics and gain deviation characteristics of the plurality of IF amplifier circuits can be improved.

Therefore, according to the reception signal switching device for a BS converter of the present invention, three characteristics of "isolation", "gain", and "gain deviation" can be simultaneously improved.

Further, by appropriately setting the inductance values of the inductor elements and the layout of the inductance elements, three characteristics of "isolation", "gain", and "gain deviation" can be simultaneously improved. Adjustment components for adjusting the circuit characteristics of the IF amplifier circuit can be omitted. As a result, the signal switching circuit, the plurality of IF amplifier circuits for amplifying the IF signal output from the signal switching circuit, and the plurality of inter-stage connections between the signal switching circuit and the plurality of IF amplifier circuits. Can be formed on one semiconductor substrate. That is, an IC in which not only a signal switching circuit and an IF amplifier circuit but also an inductor element are integrated on a semiconductor substrate can be realized.

[0029]

[0030]

In a preferred example of the reception signal switching device for a BS converter according to the present invention, the inductor element includes an inductor.
The inductor part is helical, and adjacent inductor parts
The two have the same shape and size but the helix direction is reversed.
I am .

Also in this example, since the electromagnetic waves leaking from the two adjacent inductor elements are effectively canceled, there is an advantage that the effect of the present invention can be remarkably obtained.

In another preferred embodiment of the reception signal switching device for a BS converter according to the present invention, the circuit constant of each of the plurality of inductor elements is set so that one selected IF signal causes peaking. .

In this example, since the peaking phenomenon by the plurality of inductor elements is used, there is an advantage that the gain characteristic of the IF amplifier circuit is further improved.

In still another preferred example of the reception signal switching device for a BS converter according to the present invention, a plurality of the input terminals, the signal switching circuit, a plurality of the IF amplification circuits,
A plurality of the output terminals are formed on the same semiconductor substrate,
It is configured to function as a single semiconductor chip.

In this example, a circuit and a necessary circuit element necessary for the receiving signal switching device for the BS converter are integrated on a semiconductor substrate, so that the reliability of the device and the BS converter itself can be improved, and those devices can be improved. There is an advantage that the manufacturing cost can be reduced.

In still another preferred example of the reception signal switching device for a BS converter according to the present invention, the IF signal generated from the received satellite broadcast radio wave converts the right-handed circularly polarized wave and the left-handed circularly polarized wave into frequency conversions. Then, two input signals, two signal paths, two IF amplifier circuits, and two output terminals are provided corresponding to the two IF signals.

In this example, the present invention is applied to a 2-input / 2-output B
The present invention can be applied to an S converter, and has an advantage that the effects of the present invention can be remarkably obtained.

[0039]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be specifically described below with reference to the accompanying drawings.

FIG. 4 is a functional block diagram of a two-input / two-output BS converter 300 for receiving digital satellite broadcasts, which is configured using the reception signal switching device 100 according to one embodiment of the present invention.

As shown in FIG. 4, this BS converter 3
00 is a reception signal switching device 100 according to an embodiment of the present invention.
And a front end unit 200 arranged at the front stage.

The broadcast wave transmitted from the BS is received by the BS antenna 101. This received radio wave includes a 12-GHz band left-handed circularly polarized wave (L wave) and a right-handed circularly polarized wave (R wave). These two circular polarizations are radio frequency (Radio Frequency, R)
F) BS converter 300 as received signals S1 and S2
Are input to the front end unit 200 from the two input terminals. The front end unit 200 includes an RF reception signal S1,
Amplification of S2 and RF reception signals S1 and S2 of 12 GHz band
Is converted to a 2 GHz band IF.

The front end unit 200 includes two low noise RF amplifiers 102a and 102b and a local oscillator 104
, Two frequency mixers 103a and 103b, two IF buffer amplifiers 105a and 105b, and two band-pass (band-pass) filters 106a and 106b. The low-noise RF amplifier 102a, the frequency mixer 103a, and the IF buffer amplifier 105a constitute an amplification / frequency conversion circuit for the L-wave RF reception signal S1. Low noise RF amplifier 102b and frequency mixer 103b
And the IF relaxation amplifier 105b outputs the RF reception signal S
2 is constituted. Local oscillator 1
04 is a carrier (12 GHz) included in the received radio wave.
Band), a local oscillation signal SL having the same frequency (10.678 GHz) as that of the two frequency mixers 103a, 103a,
Input to 3b.

The two RF input signals S 1 and S 2 input to the front end unit 200 are
a, 102b, respectively, and the RF output signal S3,
Each is output as S4. Low noise RF amplifier 10
2a, two RF output signals S output from 102b
In S3 and S4, only the components in the necessary frequency band are extracted by the band-pass filters 106a and 106b, and are output as RF output signals S3 'and S4', respectively. These RF output signals S3 'and S4' are
a and 103b, respectively, where the local oscillator 1
The signal is mixed with the local oscillation signal SL sent from the receiver 04 and frequency-converted to a predetermined IF (2 GHz band). Thus, the IF output signals S5 from the frequency mixers 103a and 103b
S6 is output.

The IF output signals S5 and S6 output from the frequency mixers 103a and 103b are
The signals are further amplified by 5a and 105b to become IF output signals S7 and S8, respectively. These IF output signals S7, S8
Is input via the two input terminals 5 and 6 of the reception signal switching device 100 at the next stage.

The reception signal switching device 100 outputs one of the two input IF output signals S7 and S8 to the corresponding B signal.
Two BS tuners 4 connected to S converter 300
Switching signals SSa, SSb sent from 00a, 400b
And the selected signal S7 or S8 is supplied to the two output terminals 1 of the reception signal switching device 100.
Output from both or either of 1 and 12.

The reception signal switching device 100 includes a signal switching circuit 1, an IF amplifier 4, and an interstage connection circuit 2 for connecting the signal switching circuit 1 and the IF amplifier 4.

The signal switching circuit 1 includes a front end unit 20
One of the two IF output signals S7 and S8 input from 0 is selected by the switching signal SSa or SSb sent from the BS tuner 400, and the selected one IF output signal S7 or S8 is output to the two IF outputs. Signal S
9. Output as S10. These two IF output signals S9 and S10 pass through the
The output signals are S11 and S12. IF output signal S1
1 and S12 are input to the IF amplification unit 4 and further amplified, and the two output terminals 1
1 and 12 are output as IF output signals S13 and S14, respectively.

The two IF output signals S13 and S14 output from the reception signal switching device 100 in this way
The signals are input to the S tuners 400a and 400b, respectively.
The BS tuner 400a is an IF of the BS converter 300.
From the output signal S13, a desired broadcast channel is selected and demodulated to extract video and audio baseband signals. The extracted baseband signal is transmitted to BS tuner 4
00a is sent to a television receiver (not shown) connected to the receiver. Similarly, the BS tuner 400b selects a desired broadcast channel from the IF output signal S14 of the BS converter 300, and demodulates to extract video and audio baseband signals. The extracted baseband signal is B
It is sent to a television receiver (not shown) connected to S tuner 400b. Thus, one BS converter 30
By using 0, the satellite broadcast of the desired broadcast channel can be viewed simultaneously on two television receivers.

When only one BS tuner 400a or 400b is connected to BS converter 300, IF signal S1 is supplied by switching signal SSa or SSb sent from connected BS tuner 400a or 400b.
Only 3 or S14 is output from the output terminal 11 or 12 of the reception signal switching device 100.

Next, the configuration of the reception signal switching device 100 of the present embodiment will be described in detail with reference to FIG.

As shown in FIG. 1, the reception signal switching device 10
The signal switching circuit 1 arranged at the first stage of 0 has two input terminals 13, 14, two output terminals 7, 8, and four electronic switches SW1, SW2, SW3, SW4. The electronic switch SW1 is provided in a signal path connecting the input terminal 5 and the output terminal 7. Electronic switch SW
2 is provided on a signal path connecting the input terminal 5 and the output terminal 8. The electronic switch SW3 is provided in a signal path connecting the input terminal 6 and the output terminal 7. The electronic switch SW4 is provided in a signal path connecting the input terminal 6 and the output terminal 8.

In the state of FIG. 1, two electronic switches SW
1 and SW2 are closed (ie, in the ON state),
The other two electronic switches SW3 and SW4 are open (that is, in the OFF state). Therefore, in the signal switching circuit 1, the IF signal S8 is cut off, and only the IF signal S7 is selected. The selected IF signal S7 has two I
Two output terminals 7, corresponding as F signals S9 and S10,
8 are output simultaneously.

In the state shown in FIG. 1, the electronic switch SW2
Is opened, that is, turned off, the selected IF signal S7 is output from the output terminal 7 only as the IF signal S9. In the state of FIG. 1, the electronic switch SW1 is further opened.
That is, when turned off, the selected IF signal S7
The signal is output only from the output terminal 8 as the F signal S10.

The IF amplifier 4 arranged at the last stage of the received signal switching device 100 has two IF amplifier circuits 4a and 4b. The input terminal and the output terminal of the IF amplification circuit 4a are connected to one input terminal 9 and one output terminal 15 of the IF amplification unit 4, respectively. The input terminal and the output terminal of the IF amplifier circuit 4b are connected to the other input terminal 1 of the IF amplifier unit 4.
0 and the other output terminal 16 respectively. I
The two output terminals 15 and 16 of the F amplification unit 4 are connected to the two output terminals 11 and 12 of the reception signal switching device 100, respectively.

Inter-stage connection circuit 2 of reception signal switching apparatus 100
Are arranged between the signal switching circuit 1 and the IF amplifier 4. The interstage connection circuit 2 has two rectangular spiral (spiral) inductor elements 3a and 3b. The input terminal of the inductor element 3a is connected to one output terminal 7 of the signal switching circuit 1, and the output terminal of the inductor element 3a is
It is connected to one input terminal 9 of the IF amplifier 4. The input terminal of the inductor element 3b is connected to the other output terminal 8 of the signal switching circuit 1, and the output terminal of the inductor element 3b is connected to the other input terminal 10 of the IF amplifier 4.

The IF output signal S9 sent from one output terminal 7 of the signal switching circuit 1 is impedance-matched to the corresponding IF amplifier 4a by the inductor element 3a, and is input to the IF amplifier 4a as the IF output signal S11. Then, after being amplified by the IF amplifier 4a,
It is output from one output terminal 11 of the reception signal switching device 100 as an IF output signal S13.

The IF output signal S10 sent from the other output terminal 8 of the signal switching circuit 1 is impedance-matched to the corresponding IF amplifier 4b by the inductor element 3b, and is input to the IF amplifier 4b as the IF output signal S12. Then, after being amplified by the IF amplifier 4b, the received signal switching device 100
Is output from the other output terminal 12.

In this embodiment, the reception signal switching device 10
Reference numeral 0 denotes a single IC chip, and the signal switching circuit 1, the inter-stage connection circuit 2, and the IF amplifier 4 are all integrated on a single gallium arsenide (GaAs) substrate (not shown). ing. Therefore, as shown in FIG. 1, the two inductor elements 3a and 3b are both formed in a square spiral (spiral) inductor portion formed on the surface of the GaAs substrate via an appropriate insulating film (not shown). have.

One end of the inductor section at the center of the inductor element 3a is connected to the output terminal 7 of the signal switching circuit 1, and the other end of the inductor section at the end of the inductor element 3a is connected to the IF amplification section. 4 is connected to the input terminal 9. One end of the inductor section at the center of the inductor element 3b is connected to the output terminal 8 of the signal switching circuit 1, and the other end of the inductor section at the end of the inductor element 3b is connected to the input of the IF amplification section 4. Connected to terminal 10.

The square spiral inductor portions of the two inductor elements 3a and 3b have the same size and the same spiral shape, except that the winding directions of the spirals are reversed. In other words, a straight line (not shown) connecting these inductor elements 3a, 3b
Are symmetrical to each other with respect to a straight line 17 that bisects the vertical direction. Alternatively, it can be said that the inductor elements 3a and 3b are mirror images of each other with respect to the straight line 17. The shortest distance between the inductor elements 3a and 3b is D.

The inductance values of the inductor elements 3a and 3b can be reduced to, for example, about 8 nH.

The signal switching circuit 1 can be realized by an arbitrary configuration. An example is shown in FIG. FIG. 2 shows a metal-semiconductor field-effect transistor (Metal-Semiconductor Field-Ef).
fect transistor (MES transistor).

Four n-channel MES transistors M
1, M3, M5, and M7 are input terminals 1 of the signal switching circuit 1.
An electronic switch SW1 for opening and closing a signal path for the IF signal S7 connecting the output terminal 3 and the output terminal 7 is configured. ME
S-transistors M1 and M5 are turned on, off by a control voltage V _C1 applied to their gates via terminal 17.
F. MES transistors M3 and M7 are connected to terminal 18
Are turned on and off by a control voltage V _C2 applied to those gates through the switch. R1, R3, R5, and R7 are resistance elements, and C1 and C3 are capacitance elements.

When the control voltage V _{C1 is set} to the H (High) level and the control voltage V _{C2 is set} to the L (Low) level, the electronic switch SW1 is turned off. When the control voltage V _{C1 is set} to L level and the control voltage V _{C2 is set} to H level, the electronic switch SW1 is turned on.

Four n-channel MES transistors M
1 ', M3', M5 ', and M7' constitute an electronic switch SW2 for opening and closing a signal path for an IF signal S7 connecting the input terminal 13 and the output terminal 8 of the signal switching circuit 1. The MES transistors M1 'and M5' are turned on and off by a control voltage V _C4 applied to their gates via a terminal 19. MES transistors M3 'and M
7 ′ are turned on and off by a control voltage V _C3 applied to their gates via a terminal 20. R1 ', R
3 ′, R5 ′ and R7 ′ are resistance elements, and C1 ′ and C3 ′ are capacitance elements.

The control voltage V _{C3 is set} to the H level and the control voltage V
_{When C4 is set} to L level, the electronic switch SW2 is turned on. When the control voltage V _{C3 is set} to L level and the control voltage V _{C4 is set} to H level, the electronic switch SW2 is turned off.

Four n-channel MES transistors M
2, M4, M6, and M8 are input terminals 1 of the signal switching circuit 1.
An electronic switch SW3 for opening and closing a signal path for the IF signal S8 connecting the output terminal 4 and the output terminal 7 is configured. ME
S-transistors M2 and M6 are turned on, off by a control voltage V _C2 applied to their gates via terminal 18.
F. MES transistors M4 and M8 are connected to terminal 17
Are turned on and off by a control voltage V _C1 applied to those gates through the gate. R2, R4, R6, and R8 are resistance elements, and C2 and C4 are capacitance elements.

The control voltage V _{C1 is set} to the H level, and the control voltage V
_{When C2 is set} to L level, the electronic switch SW3 is turned ON. When the control voltage V _{C1 is set} to L level and the control voltage V _{C2 is set} to H level, the electronic switch SW3 is turned off.

Four n-channel MES transistors M
2 ', M4', M6 ', M8' constitute an electronic switch SW4 for opening and closing a signal path for an IF signal S8 connecting the input terminal 14 and the output terminal 8 of the signal switching circuit 1. The MES transistors M2 'and M6' are turned on and off by the control voltage V _C3 applied to their gates via the terminal 20. MES transistors M4 'and M
8 'are turned on and off by a control voltage V _C4 applied to their gates via a terminal 19. R2 ', R
4 ', R6' and R8 'are resistance elements, and C2' and C4 'are capacitance elements.

The control voltage V _{C3 is set} to H level, and the control voltage V
_{When C4 is set} to L level, the electronic switch SW4 is turned off. _{Set the} control voltage V _C3 to L level and set the control voltage V _C4 to H level.
If the level is set, the electronic switch SW4 is turned ON.

The two IF amplifier circuits 4a and 4b can also be realized by an arbitrary configuration. One example is shown in FIG. FIG.
This uses a differential amplifier composed of MES transistors.

In the IF amplifier circuit 4a of FIG. 3, two n-channel MES transistors M11 and M12 constitute a first-stage differential amplifier, and two n-channel MES transistors M13 and M14 constitute a second-stage differential amplifier. And the two n-channel MES transistors M15 and M16 are connected to the third
A stage differential amplifier is formed, and the two n-channel MES transistors M17 and M18 form a fourth stage differential amplifier.

The gate of the MES transistor M12 has
IF signal S1 via inductor element 3a and input terminal 9
1 is input. On the other hand, a predetermined constant voltage obtained by dividing the power supply voltage V _D1 by the resistance elements R12 and R13 is applied to the gate of the MES transistor M11. As a result, a signal obtained by amplifying the IF signal S11 is obtained at the connection point between the drain of the MES transistor M12 and the source of the MES transistor M11.

The gate of the MES transistor M14 has
A signal obtained by amplifying the IF signal S11 is input. On the other hand, M
A predetermined constant voltage obtained by dividing the power supply voltage V _D1 by the resistance elements R14 and R15 is applied to the gate of the ES transistor M13. Thereby, the MES transistor M1
A signal obtained by amplifying the IF signal S11 by two stages is obtained at the connection point of the drain of the MES transistor M13 and the drain of the MES transistor M13.

The gate of the MES transistor M16 has
A signal obtained by amplifying the IF signal S11 by two stages is input. On the other hand, a predetermined constant voltage obtained by dividing the power supply voltage V _D2 by the resistance elements R16 and R17 is applied to the gate of the MES transistor M15. Thus, a signal obtained by amplifying the IF signal S11 by three stages is obtained at the connection point between the drain of the MES transistor M16 and the source of the MES transistor M15.

The gate of the MES transistor M18 has
A signal obtained by amplifying the IF signal S11 by three stages is input. On the other hand, a predetermined constant voltage obtained by dividing the power supply voltage V _D2 by the resistance elements R18 and R19 is applied to the gate of the MES transistor M17. Thus, a signal obtained by amplifying the IF signal S11 by four stages is obtained at the connection point between the drain of the MES transistor M18 and the source of the MES transistor M17. This signal is output to the output terminal 1 as an IF signal S13.
5 is output.

R11, R20, R21, R22, R2
3, R24, R25 and R26 are resistance elements. C1
1, C12, C13, C14, C15, C16, C1
7, C18, C19, and C20 are capacitive elements. V _B is a bias voltage.

The IF amplifier circuit 4b in FIG. 3 has the same configuration as the IF amplifier circuit 4a. That is, two n-channel M
The ES transistors M11 'and M12' constitute a first stage differential amplifier, and include two n-channel MES transistors M
13 'and M14' constitute a second stage differential amplifier, two n-channel MES transistors M15 'and M16' constitute a third stage differential amplifier, and two n-channel MESs.
Transistors M17 'and M18' constitute a fourth stage differential amplifier.

The IF signal S12 is input to the gate of the MES transistor M12 'via the inductor element 3b and the input terminal 10. On the other hand, the MES transistor M1
A predetermined constant voltage obtained by dividing the power supply voltage V _D1 by the resistance elements R12 ′ and R13 ′ is applied to the gate of 1 ′. Thereby, the connection point between the drain of the MES transistor M12 'and the source of the MES transistor M11'
A signal obtained by amplifying the IF signal S12 is obtained.

The signal obtained by amplifying the IF signal S12 is input to the gate of the MES transistor M14 '. On the other hand, a predetermined constant voltage obtained by dividing the power supply voltage V _D1 by the resistance elements R14 ′ and R15 ′ is applied to the gate of the MES transistor M13 ′. As a result, the drain of the MES transistor M14 'and the MES transistor M1
A signal obtained by amplifying the IF signal S12 by two stages is obtained at the connection point of the 3 ′ source.

A signal obtained by amplifying the IF signal S11 'by two stages is input to the gate of the MES transistor M16'. On the other hand, the gate of the MES transistor M15 '
A predetermined constant voltage obtained by dividing the power supply voltage V _D2 by the resistance elements R16 ′ and R17 ′ is applied. Thereby, ME
A signal obtained by amplifying the IF signal S12 by three stages is obtained at a connection point between the drain of the S transistor M16 'and the source of the MES transistor M15'.

To the gate of the MES transistor M18 '
Is supplied with a signal obtained by amplifying the IF signal S12 by three stages.
On the other hand, the power supply is connected to the gate of the MES transistor M17 '.
Voltage V _D2Is divided by resistors R18 'and R19'.
Is applied. As a result, the MES
Drain of transistor M18 'and MES transistor M
Four-stage amplification of IF signal S12 at 17 'source connection point
The obtained signal is obtained. This signal is referred to as IF signal S14.
Output from the output terminal 16.

R11 ', R20', R21 ', R2
2 ', R23', R24 ', R25', R26 'are resistance elements. C11 ', C12', C13 ', C1
4 ', C15', C16 ', C17', C18 ', C1
9 'and C20' are capacitive elements.

The second embodiment of the present invention having the above configuration
In the input / 2 output BS converter, as described above,
The patterns of the two inductor elements 3a and 3b of the inter-stage connection circuit 2 in the reception signal switching device 100 have a mirror image relation with respect to the vertical bisector 17 arranged at the center thereof. That is, the two inductor elements 3a and 3b have exactly the same shape, size, and layout except that the spiral directions are opposite to each other. With this configuration, each of the inductor elements 3a, 3
The electromagnetic waves leaking from b cancel each other,
The resonance phenomenon of the leaked electromagnetic waves is suppressed, and the influence of the unselected IF signal on the selected IF signal is reduced. As a result, the signal switching circuit 1
And the isolation characteristics of the two signal paths of the IF amplifier 4 are improved.

Further, since the isolation characteristics of each signal path are improved, adjacent inductor elements 3a,
3b, the shortest distance D can be reduced.
It is possible to widen the variable range of the inductance values of the inductor elements 3a and 3b. In other words, the design margin for the circuit characteristics of the interstage connection circuit 2 increases. Therefore, the distance D between the inductor elements 3a and 3b
By appropriately setting the inductance values of the inductor elements 3a and 3b, the two IF amplifier circuits 4
The gain characteristics and gain deviation characteristics of a and 4b can be improved.

Therefore, in the received signal switching device 100 of the present embodiment used for the BS converter 300, three characteristics of "isolation", "gain", and "gain deviation" can be simultaneously improved.

According to the test of the inventor of the present invention, it has been found that the inductance value of the inductor elements 3a and 3b is about 8 nH, which is lower than the conventional value. In this case, the isolation characteristic between the two signal paths is 2G.
The gain characteristics of the output signals S13 and S14 output from the IF amplifier circuits 4a and 4b are not less than 25 dB in Hz.
At 20 GHz or more, the gain deviation characteristics of the output signals S13 and S14 output from the IF amplifier circuits 4a and 4b are as follows:
3 dB or less was realized in the IF band of 900 MHz to 1.5 GHz. Further, the isolation characteristics of the entire BS converter 300 were realized at 20 dB or more.

Further, by appropriately setting the inductance values of the inductor elements 3a and 3b and the layout of the inductance elements 3a and 3b, three characteristics of "isolation", "gain" and "gain deviation" are simultaneously improved. Therefore, it is possible to omit an adjustment component for adjusting the circuit characteristics of the IF amplifier circuits 4a and 4b. As a result, the signal switching circuit 1, the IF amplifier circuits 4a and 4b respectively amplifying the two IF signals S9 and S10 output from the signal switching circuit 1, and the signal switching circuit 1 and the IF amplifier circuits 4a and 4b The inductor elements 3a and 3b for interstage connection can be formed on one GaAs substrate. That is, the signal switching circuit 1 and the IF
In addition to the amplifier circuits 4a and 4b, the inductor elements 2a,
An IC in which 2b is also integrated on a GaAs substrate can be realized.

It is to be noted that the received signal switching device 100 is
When integrated on an aAs substrate, BS converter 300
When manufacturing the device, fine adjustment of the circuit characteristics of the IF amplifier circuits 4a and 4b becomes unnecessary, and the number of external components is greatly reduced, so that the work of mounting the electronic components and the operation of adjusting the circuit characteristics are reduced. There is also an effect that.

In the above embodiment, the two-input / two-output signal switching circuit 1, the IF amplifier circuits 4a and 4b, and the inductor elements 3a and 3b provided therebetween are formed as one IC. However, the present invention is not limited to this. As with the conventional BS converter, the switching circuits IC and I
The F amplifier circuit IC and the individual component (for example, chip type) inductor element may be mounted on the PWB, and the arrangement (layout) of the inductor element may be the same as in the above embodiment.

In the above-described embodiment, the description has been given of the 2-input / 2-output BS converter. However, the present invention is not limited to this. The present invention is also applicable to a BS converter having at least one of an input and an output of three or more.

[0093]

As described above, according to the receiving signal switching device for a BS converter of the present invention, the "isolation characteristic" of each signal path and the "gain characteristic" of an output signal and a plurality of output signals are used. The effect is obtained that the three characteristics of "gain deviation characteristics" can be improved at the same time, and an adjustment component for finely adjusting the circuit characteristics can be omitted.

[0094] Further, the signal switching circuit and a plurality of inductors for connecting between a plurality of IF amplifier circuit for amplifying the IF signal output from the signal switching circuit, the signal switching circuit and the stages and their IF amplifier The effect that an element can be formed on one semiconductor substrate is also obtained.

[Brief description of the drawings]

FIG. 1 is a functional block diagram illustrating a circuit configuration of a reception signal switching device according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a specific configuration example of a signal switching circuit used in the reception signal switching device according to one embodiment of the present invention.

FIG. 3 is a circuit diagram showing a specific configuration example of an IF amplifier circuit used in the reception signal switching device according to one embodiment of the present invention.

FIG. 4 is a diagram illustrating a configuration of the reception signal switching device according to the embodiment of the present invention, in which two inputs and two inputs for digital satellite broadcast reception are provided.
It is a functional block diagram of an output BS converter.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Signal switching circuit 2 Interstage connection circuit 3a, 3b Inductor element 4 IF amplifier 4a, 4b IF amplifier 5, 6 Input terminal of reception signal switching device 7, 8 Output terminal of signal switching circuit 9, 10 IF amplifier Input terminals 11, 12 Output terminals of the reception signal switching device 13, 14 Input terminals of the signal switching circuit 15, 16 Output terminals of the IF amplifier 100 Receiving signal switching device of the BS converter 101 Antennas 102a, 102b Low noise RF amplifiers 103a, 103b Frequency mixer 104 Local oscillator 105a, 105b IF amplifier 106a, 106b Band pass filter 200 Front end part of BS converter 300 BS converter 400a, 400b BS tuner

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04B 1/26 H04B 1/18 H03D ⁷ /00-7/12

Claims (5)

(57) [Claims] 1. Generated from received satellite broadcast radio waves
Multiple input terminals to which multiple intermediate frequency signals are respectively input
With the child,Input end A plurality connected to each of the plurality of input terminals
Signal paths, and input from a plurality of the input terminals.
If you select one of the multiple intermediate frequency signals
In both cases, the selected one intermediate frequency signal is
Through at least one of the signal pathsOut of desired signal path
At the endA signal switching circuit for outputting,Including a plurality of interstage connecting inductor elements,
Before the input end of the inductor element corresponds to the signal switching circuit
Impedance connected to the output end of the signal path.
Inter-stage connection circuit for matching Output of the corresponding inductor element of the interstage connection circuit
Input terminals are connected to each end Multiple intermediate frequency amplification times
And a plurality of said intermediate frequency amplifier circuitsConnected to the output terminals of
And the corresponding output signal of the intermediate frequency amplification circuit is taken.
Get outA plurality of output terminals,The plurality of inductor elements of the interstage connection circuit may have a predetermined shape.
A planar inductor formed by patterning a conductor into a shape
And each inductor section
Are arranged on one plane, The two inductor parts adjacent on the plane are
Divide the straight line connecting the two inductors into two equal parts
Satisfies the mirror image relation for a straight line extending parallel to the plane
At the same time,
The magnetic waves cancel each other and the resonance phenomenon of those electromagnetic waves is suppressed
Is formed as Satellite broadcasting receiver
Receiving signal switching device for inverter. 2. The method according to claim 1, wherein the inductor portion of the inductor element is a screw.
Spiral, two adjacent inductors
The received signal switching device for a satellite broadcast receiving converter according to claim 1 , wherein the spirals have the same shape and size but opposite directions . 3. Each of the plurality of inductor elements
The circuit constant is such that the one selected intermediate frequency signal is peaked.
Claim 1 or set to cause King
3. A reception signal switching device for a satellite broadcast reception converter according to 2 . 4. A plurality of said input terminals and said signal switching circuit.
A road, a frequency amplifying circuit between the plurality of the plurality of the output
The terminals are formed on the same semiconductor substrate and
The reception signal switching device for a satellite broadcast reception converter according to any one of claims 1 to 3, which functions as a conductor chip . 5. Generated from a received satellite broadcast radio wave
The intermediate frequency signal has a right-hand circular polarization and a left-hand circular polarization.
Two intermediate frequency signals obtained by the conversion,
According to the two intermediate frequency signals, the input terminal and
The signal path, the intermediate frequency amplifier circuit, and the output terminal
5. The reception signal switching device for a satellite broadcast reception converter according to claim 1, wherein two reception signal switching devices are provided.