JP2956520B2 - Composite signal inspection equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a composite signal inspection apparatus, and more particularly to a method for separating and extracting analog RGB signals from a composite signal output from a video signal generator.
The present invention relates to a composite signal inspection device that performs pass / fail judgment for each dot by using a unique dot clock.

[0002]

2. Description of the Related Art A conventional composite signal inspection apparatus inputs a pattern designating signal to a video signal generator to be inspected, and outputs a composite signal corresponding to the pattern designating signal from the video signal generator. The operator visually judges whether or not the image displayed on the CRT and the image to be formed by the composite signal generated by the video signal generator according to the pattern designating signal match or not. An image is captured by a two-dimensional camera, subjected to image processing, and whether or not the video signal generator is operating normally is determined based on whether or not the video signal generator matches an expected value.

FIG. 6 is a block diagram showing a conventional color television signal inspection apparatus disclosed in Japanese Patent Application Laid-Open No. 62-239785. This conventional example includes a matrix 210 that converts a composite signal represented by an NTSC signal into an analog RGB signal when input. The analog RGB signals output from the matrix 210 are supplied to two sets of comparators 212 and 214. Comparator 212 receives the minimum voltage as a reference signal and receives analog R
If the voltage of the GB signal is lower than the minimum voltage, a logic 1 is output. Comparator 214 receives the maximum voltage as a reference signal and outputs a logic 1 if the voltage of the analog RGB signal is higher than the minimum voltage. The outputs of the comparators 212 and 214 are supplied to an OR gate 216, and a range error signal is output. Modulator 218 modulates the composite signal in response to the range error signal so that it is visually prominent and displayed on monitor 220. Alternatively, the monitor 220 is provided with a color shutter that modulates the composite signal in a predetermined manner in response to the range error signal, and supplies the range error signal directly to the monitor 220 for display. The operator can use this monitor 22
The quality of the composite signal is determined by watching the video displayed at 0.

[0004]

In this conventional example, it is only necessary to check whether or not an input composite signal can be reproduced as a video signal. If there is a defect in the composite signal, the cause is identified. It is difficult to do. Further, when inspecting a halftone color, the maximum value and the minimum value of the comparator must be reset for each grayscale color, which is not suitable for the halftone color inspection.

In the conventional composite signal inspection apparatus, the composite signal inspection of the video signal generator employs a method of displaying an image on a cathode ray tube and performing a pass / fail judgment visually by an operator, and the inspection quality differs depending on the operator. There was a disadvantage. In particular, minute image defects and gradation failures of multicolor / high-resolution image signals cannot be discerned by human eyes, and even if they are identifiable defects, they are missed in an inspection environment of several hundred units per day. There is a possibility.

In a method of taking an image with a two-dimensional camera, performing image processing, comparing the image with an expected value, and determining whether the image is good or bad,
Inspection of multi-color and high-resolution images requires a high-resolution two-dimensional camera, a high sampling rate, a high-resolution A / D converter, and a high-speed data processing circuit around the A / D converter. The converter has the disadvantage that the inspection is not possible due to the lack of high-speed performance, or that the inspection apparatus becomes very expensive even if the inspection can be realized.

Further, when a defect is detected, it is difficult to determine whether the defect is due to a video signal generator or a CRT.

[0008]

SUMMARY OF THE INVENTION A composite signal inspection apparatus according to the present invention comprises a luminance signal indicating light and dark output from a video signal generator to be inspected, a color signal expressing color, and a synchronization indicating position and timing of a screen. A decoder that separates and converts a composite signal including a signal into an analog RGB signal, a horizontal synchronizing signal, and a vertical synchronizing signal; A first pattern composite signal, a second pattern composite signal having a maximum value and a minimum value alternately for each dot, and
An identification signal for specifying the video signal generator that outputs a composite signal of a third pattern in which gradation is changed for each horizontal line with one horizontal line having the same gradation, and the pattern specifying signal corresponding thereto A pattern storing means for preliminarily storing a pattern specifying value defining the pattern, a register for temporarily storing the pattern specifying value, and a standard value of a pulse width PW of a horizontal synchronizing signal output from the decoder as PW ±. HD% and measurement accuracy of TM1%
And (PW × (HD / 100) × (TM1 / 1
00)) A first sampling clock generation circuit for generating a first sampling clock of ^-1 Hz, and a first sampling clock for sampling the horizontal synchronizing signal and the vertical synchronizing signal into a digital value with the first sampling clock. Sampling means and the pulse width and period of the horizontal synchronizing signal and the vertical synchronizing signal from the input of the sampling result by the first sampling means, from the output of the horizontal and vertical synchronizing signals to the output of the analog RGB signal. A back porch time that is a time, and a synchronization signal check circuit that extracts a front porch time that is a time from the end of output of an analog RGB signal to the output of the synchronization signal and counts the number of pulses of a digital value; Standard value storage means for storing standard values of items measured by the synchronization signal check circuit; A first storage means controlled by a control signal to write and store the measured value of the synchronization signal check circuit with the first sampling clock; and a horizontal synchronization signal controlled by a frequency division designating signal and output by the decoder, and A dot clock generating circuit having a frequency a times the frequency of the horizontal synchronizing signal (a is a natural number) and generating and outputting a dot clock adjusted in phase with the horizontal synchronizing signal; and a variable delay means for delaying the dot clock; A threshold voltage source that outputs a threshold value for a maximum value and a threshold value for a minimum value, an analog comparator that sets the threshold value for the maximum value and the threshold value for the minimum value,
An averaging circuit for inputting the values of a and N (N is a natural number not larger than a) according to the frequency division specifying signal, adding the outputs of the analog comparators a / N, and averaging by a / N; A frequency divider that receives the dot clock, further inputs the values of a and N according to the frequency division designating signal, and outputs a write clock whose frequency has been frequency-divided N / a times, and is controlled by the write / read control signal 2 bits × N for receiving the output of the averaging circuit and performing write storage with the write clock
The data display time of the analog RGB signal during horizontal one-line scanning of the analog RGB signal obtained by decoding the composite signal of the third pattern output from the video signal generator is defined as TD. Assuming that the accuracy is TM2%, (TD × (TM2 / 100)) ⁻¹
And a second sampling clock generating circuit for generating a second sampling clock of Hz, receiving the clock of the second sampling clock generating circuit, and decoding the composite signal of the third pattern output from the video signal generator. Analog RGB signals
An A / D converter that converts the digital output signal into a 2-bit digital output signal, a third storage unit that is controlled by the write / read control signal and takes in the digital output signal of the A / D converter,
Any one of the analog RGB signals is selected by a switching control signal, and the analog comparator and the A / D are selected.
When a test command including the identification signal is input to one of the converters and a test command including the identification signal, a reset signal is output to the synchronization signal check circuit, and a corresponding first pattern designation value is output from the pattern storage means. And outputs the pattern designation signal to the video signal generator, outputs an analog RGB signal obtained by decoding the composite signal of the first pattern, and counts the value counted by the synchronization signal check circuit. If the value is "good" as compared with the value read out from the first storage means and the value read out from the standard value storage means, the frequency dividing designation signal is read out based on the cycle of the horizontal synchronization signal and the vertical synchronization signal. One of the analog RGB signals is output to the dot clock generation circuit to generate the dot clock, and to the switching device. The switching control signal for selecting and selecting the analog comparator side is output, the corresponding second pattern designation value is read out again from the pattern storage means and stored in the register, and the video signal generator sends the pattern designation signal to the video signal generator. And outputting an analog RGB signal obtained by decoding the composite signal of the second pattern for each dot, and writing a measurement result for one screen in the image to the second storage means. And reads the captured pattern from the second
Is determined to be "good" when it matches the analog RGB signal obtained by decoding the composite signal of the pattern No. 3, and in that case, the switching control signal for selecting the A / D converter side is output to the switching unit, and the pattern storage is performed. Reading a corresponding third pattern designation value from the means, storing the read value in the register, outputting a pattern designation signal to the video signal generator, outputting a composite signal of the third pattern, and testing the image corresponding to one screen. After a lapse of time, the gradation value for each horizontal line is read from the third storage means, and when the gradation value is within a predetermined value, it is determined to be "good", and the first storage means, the second storage means and A central processing unit that controls so as to stop the test when the determination becomes “bad” during the determination of the quality of the value stored in the third storage means. The features.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing an NTSC composite signal inspection apparatus as one embodiment of a composite signal inspection apparatus according to the present invention.

The composite signal inspection apparatus of the present embodiment
An NTSC decoder 37 for separating an NTSC composite signal 38 output from the video signal generator 6 into an analog RGB signal 23, a horizontal synchronizing signal 20, and a vertical synchronizing signal 22
When a pattern designating signal 19, which is a digital quantity input from the outside, is input, an NTSC composite signal of a first pattern in which all dots of one screen have the highest white brightness in accordance with the pattern designating signal 19, NTS of the second pattern, which alternates between white maximum luminance and minimum luminance every time
The C composite signal and N of the third pattern in which the gradation is changed for each horizontal line with the same gradation for one horizontal line
A pattern storage means 2 for outputting a TSC composite signal and previously storing a pattern designation value defining the pattern designation signal 19 corresponding to the identification signal of the video signal generator 6 to be inspected; When the standard value of the pulse width PW of the register 4 for temporarily storing the designated value and the pulse width PW of the horizontal synchronization signal 20 output from the video signal generator 6 is PW ± HD% and the measurement accuracy is TM1%, the register is asynchronous (PW × (HD / 100) × (TM1 / 10
0)) A first sampling clock generating circuit 8 for generating a first sampling clock 21 of ^-1 Hz, and the horizontal synchronizing signal 20 and the vertical synchronizing signal 22 are sampled by the first sampling clock 21 to digital values. A first sampling means 9 for inputting a sampling result and a vertical synchronizing signal 22 and a horizontal synchronizing signal 20 having respective periods 100 and 104 (FIG. 2), a pulse width 101,
105 (FIG. 2), a synchronous signal check for extracting back porch times 102 and 106 (FIG. 2) and front porch times 103 and 107 (FIG. 2), which are time differences from the analog RGB signal 23, and counting the number of digital value pulses. Circuit 10
A standard value storage means 3 for storing standard values of a back porch time and a front porch time which are time differences between the vertical synchronizing signal 22 and the horizontal synchronizing signal 20, their respective periods, pulse widths, and analog RGB signals 23; A first storage means 11 controlled by a read control signal 24 to write and store the measured value of the synchronization signal check circuit 10 at a first sampling clock 21 and a frequency dividing designation signal 25 outputted from the central processing unit 1 The horizontal sync signal 20 output from the NTSC decoder 37 is input, and a dot clock 26A having a frequency a times the frequency of the horizontal sync signal 20 (a is a natural number) and having the same phase as the horizontal sync signal 20 is used.
And a dot clock generating circuit 7 for generating and outputting the dot clock 26A and a dot clock 26B for arbitrarily delaying the dot clock 26A.
, An analog comparator 13 receiving the output of the switch 12 and setting a threshold 28 for the maximum value and a threshold 29 for the minimum value, and a, N (N is a natural number not greater than a)
, The number of samples per dot of the analog RGB signal 23 is determined.
An averaging circuit 35 for averaging data per dot;
Receiving the dot clock 26B, and further dividing frequency designation signal 25
A frequency divider 36 for inputting the values of a and N and outputting a write clock 34 whose frequency is divided by N / a times, and a threshold for the maximum value set by the threshold voltage setting signal 30 And a threshold voltage source 5 for outputting a threshold value 29 for the minimum value and a speed conversion circuit comprising an m-stage shift register controlled by the write / read control signal 24 and receiving the output of the averaging circuit 35. A 2-bit × N-layer second storage means 14 for performing serial-parallel conversion of the comparator outputs 31 and 32 with a write clock 34 and performing write storage at a write speed of 1 / m of the write clock frequency, and a video signal generator 6 is an analog RGB signal obtained by decoding an NTSC composite signal in which the gradation is changed for each horizontal line with one horizontal line having the same gradation as that output from the analog RGB signal during one horizontal line scanning. Data display time TD of the RGB signal,
When the measurement accuracy is TM2%, the measurement is asynchronous (TD ×
(TM2 / 100)) A second sampling clock generating circuit 16 for generating a second sampling clock 33 of ^-1 Hz, and one horizontal line output from the pattern storage means 2 having the same gradation as each horizontal line An A / D converter 17 for converting an analog RGB signal whose gradation has been changed to a digital signal by a second sampling clock into a digital signal that is at least two bits higher than the resolution that the inspection target can output, and a write / read control signal 24 The analog RGB signal 23 output from the NTSC decoder 37 is input by the third storage means 18 for taking in the digital signal of the A / D converter 17 and the switching control signal 27, and one of them is selected. A test including a switching unit 12 for outputting to one of the / D converters 17 and an identification signal specifying the video signal generator 6 When the command is input, a reset signal is output to the synchronization signal check circuit 10, and then the corresponding first pattern specification value is read out from the pattern storage means 2 and stored in the register 4 and the video signal generator 6 specifies the pattern. A signal 19 is output to output an NTSC composite signal of a first pattern in which all dots of one screen have the highest white brightness. The value counted by the synchronization signal check circuit 10 is read out from the first storage means 11 to store a standard value. Means 3
If the value is “good” as compared with the value read out from the, the frequency dividing designation signal 25 based on the cycle of the horizontal synchronization signal and the vertical synchronization signal.
To the dot clock generating circuit 7 to generate a dot clock 26A, select one of the analog RGB signals to the switching unit 12, output the switching control signal 27 for selecting the analog comparator 13 side, and again store the pattern storage means. 2 and the corresponding second pattern designation value is stored in the read register 4 and the pattern designation signal 19 is output to the video signal generator 6 so that the analog RGB signal 23
An NTSC composite signal of a second pattern in which each dot alternately has a maximum value and a minimum value for each dot is output, and after a test time corresponding to one screen of an image has passed, the signal is fetched from the second storage means. The pattern is read out, and when it matches the second pattern specification value, it is determined as “good”,
In the case of "good", a switching control signal 27 for selecting the A / D converter 17 side is output to the switching unit 12, and the corresponding third pattern designation value is read out from the pattern storage means 2 and stored in the register 4, and A pattern designating signal 19 is output to the signal generator 6, and an NTSC composite signal of a third pattern in which one horizontal line of the analog RGB signal is changed to the same gray scale for each horizontal line is output. After a test time corresponding to the screen time has elapsed, the gradation value for each horizontal line is read from the third storage means 18, and when the gradation value is within a predetermined value, it is determined to be "good". A central processing unit 1 for stopping the test when it becomes "defective" on the way.

FIG. 2 is a timing chart showing the input / output relationship of the NTSC decoder 37 for separating the NTSC composite signal into a horizontal synchronizing signal, a vertical synchronizing signal, and an analog RGB signal, and a test item measured by the synchronizing signal check circuit 10 with respect to time. It is.

FIG. 3 shows the analog RGB signal and the actual second signal.
3 shows the relationship with the data written in the storage means 14.

FIG. 4 shows the relationship between the analog RGB signals obtained by decoding the third pattern of the NTSC composite signal and the second sampling clock.

The NTS of the present invention shown in FIG.
The operation of the embodiment of the C composite signal inspection device will be described.

When a test command including an identification signal designating the video signal generator 6 to be tested is input from the outside,
The central processing unit 1 outputs a reset signal to the synchronization signal check circuit 10.

The composite video signal 38 output from the video signal generator 6 is separated by an NTSC decoder 37 into an analog RGB signal 23, a horizontal synchronizing signal 20 and a vertical synchronizing signal 22.

The first sampling means 9 has a frequency ΔPW obtained from the first sampling clock generation circuit 8.
Using the first sampling clock 21 of × (HD / 100) × (TM1 / 100)｝ ^-1 Hz, the horizontal synchronizing signal 20 and the vertical synchronizing signal 22 obtained from the NTSC decoder 37 are sampled into digital values. .

The synchronization signal check circuit 10 initialized by the reset signal inputs this sampling result,
As shown in FIG. 2, the periods 100 and 104, the pulse widths 101 and 105, the back porches 102 and 106, and the front porch 103,
107 is extracted and the number of pulses of the digital value is counted.

The count result is written and stored in the first storage means 11 controlled by the write / read control signal 24 with the first sampling clock 21.

After that, the central processing unit 1 reads out the result counted by the synchronization signal check circuit 10 from the first storage means 11 and further refers to the specification value storage means 3 to read out the standard value corresponding to the inputted identification signal. Is read out, and the two are compared and determined. Only when all are “good”, the frequency dividing designation signal 25 corresponding to the identification signal is output to the dot clock generating circuit 7 and the second pattern designation The value is read and stored in the register 4. Then, a pattern designating signal 19 corresponding to the second pattern designating value is output to the video signal generator 6, and the analog RGB signals 23 alternately have the maximum value and the minimum value for each dot in the second pattern NT.
Output SC composite signal. Further switch 1
2 selects one of the analog RGB signals and outputs a switching control signal 27 for inputting the analog RGB signal to the analog comparator 13, and outputs a threshold for the maximum value and a threshold for the minimum value to the threshold voltage source 5. Is output.

The threshold voltage source 5 outputs the maximum value threshold 28 and the minimum value threshold 29 according to the threshold voltage setting signal 30 to the analog comparator 13.

The analog comparator 13 comprises an analog RGB signal obtained from the switch 12 based on a maximum value threshold value 28 and a minimum value threshold value 29 as a maximum value comparator output 31 and a minimum value comparator output 32. Is converted to a 2-bit digital value (FIG. 3).

The dot clock generating circuit 7 is controlled by the frequency dividing designation signal 25, receives the horizontal synchronizing signal 20 output from the video signal generator 6, and has a frequency a times the frequency of the horizontal synchronizing signal 20 and has a horizontal synchronizing signal. 20 generates a dot clock 26A that is phase-synchronized with the
A dot clock 26B having the same phase as the analog RGB signal obtained by decoding the second pattern of the NTSC composite signal is generated.

The frequency divider 36 receives the dot clock 26B, inputs the values of a and N by the frequency division designating signal 25, and outputs a write clock 34 whose frequency is frequency-divided by N / a.

The second storage means 14 controlled by the write / read control signal 24 has a storage capacity of 2 bits × N layers,
The 2-bit digital output data obtained as described later is received from the averaging circuit 35, and the analog comparator output is serial-parallel-converted by a write clock 34 and a speed conversion circuit composed of m-stage shift registers.
The data is written and stored at a writing speed of 1 / m of the frequency of the writing clock.

N is a number such that a dot clock having a frequency N times the frequency of the horizontal synchronization signal 20 can be sampled once for each dot. Therefore, for example, a = 1
000, N = 1000, the NT of the second pattern
The maximum value and the minimum value of the analog RGB signal obtained by decoding the SC composite signal are sampled once each, and the averaging circuit 35 performs the second sampling without averaging.
Is written to the storage means 14. a = 2000, N = 1000
In the case of, the maximum value and the minimum value of the analog RGB signal obtained by decoding the NTSC composite signal of the second pattern are sampled twice, and the averaging circuit 35 decodes the NTSC composite signal of the second pattern. Averaging is performed so that data becomes one for each of the maximum value and the minimum value of the analog RGB signals thus obtained, and then, the data is written to the second storage means 14.

When the A / D conversion of the NTSC composite signal is performed, the chrominance subcarrier frequency of 3.579545 MHz and the
It is necessary to perform sampling at twice or more dot clocks. Therefore, the dot clock frequency at which the NTSC composite signal can be A / D-converted is about 15 MHz or more, and the horizontal synchronizing signal frequency is 15.73264 KHz, so that the possible value of N is 910 or more.

After the output data for one screen of the image is stored in the second storage means 14, the central processing unit 1 reads out the content and compares it with the second pattern designation value. I do. Only when it is determined that all the analog RBG signals are “good” for all colors, a switching control signal 27 for selecting the A / D converter 17 is output to the switching unit 12, and the third pattern designation value is output from the pattern storage unit 2. Is stored in the read register 4 and a pattern designation signal 19 corresponding to the third pattern designation value is output to the video signal generator 6 to change the gradation for each horizontal line with one horizontal line having the same gradation. Then, an NTSC composite signal of the third pattern is output.

The A / D converter 17 has a resolution of 12 bits or more, and has a frequency (TD × (TM2 / 100)) ^-1 Hz obtained from the second sampling clock generation circuit 16.
A / D conversion is performed on the analog RGB signal obtained by separating the composite signal of the third pattern by the decoder using the second sampling clock 33 (FIG. 4).

The third storage means 18 controlled by the write / read control signal 24 receives the digital output of the A / D converter 17 and writes and stores the digital output by the second sampling clock 33.

After storing the output data for one screen of the image in the third storage means 18, the central processing unit 1 reads out the gradation value for each horizontal line, and when the gradation value is within a predetermined value, it is "good".
Is determined.

In the pass / fail judgment performed by the central processing unit 1, if the result is "defective" in the middle, the test is stopped at that point.

FIG. 5 shows another embodiment of the composite signal inspection apparatus of the present invention.

The personal computer 6 to be inspected
When a test instruction including an identification signal designating A is input from the outside, the central processing unit 1 outputs a selection signal 41 for selecting the analog RGB signal 40 output from the personal computer to the selector 12A. Otherwise Figure 1
The operation is exactly the same as that of the embodiment shown in FIG. With such a configuration, not only a video signal generator that outputs a composite signal but also a device that outputs an analog RGB signal represented by a personal computer can be inspected in one way.
It is possible with a table.

[0036]

As described above, according to the present invention, a composite signal output from a video signal generator to be inspected is separated and converted into a horizontal synchronizing signal, a vertical synchronizing signal and an analog RGB signal, and the output timing is measured. By performing a series of separate procedures for the presence / absence of the analog RGB signal for each dot and the gradation test of the analog RGB signal, the effect that the inspection can be performed more inexpensively and with higher accuracy than the conventional inspection apparatus can be obtained. Play.

Further, a dot clock generating circuit which generates a dot clock having a frequency which is a times as high as the clock extracted from the horizontal synchronizing signal and which is phase-synchronized with the horizontal synchronizing signal is independently provided, and the value of a is arbitrarily set. This makes it possible to electrically perform analog RGB signal inspection with the number of dots equal to or greater than the resolution of the composite signal, thereby enabling detailed inspection of the composite signal.

Further, since the function test of the composite signal can be directly performed by the electric test without using the cathode ray tube, the function test of the video signal itself can be performed, and the test quality can be kept constant.

In order to inspect an analog RGB signal obtained by separating and converting an NTSC composite signal for high-resolution television using a conventional NTSC composite signal inspection apparatus,
Although a high-resolution two-dimensional camera and a high sampling rate / multi-resolution A / D converter were required, the composite signal inspection apparatus of the present invention uses a low-cost analog comparator capable of high-speed operation. The signal is converted into a 2-bit digital signal, and the required storage capacity is 2 bits × the number of pixels of one screen, which is smaller than that of the related art, so that the inspection apparatus can be realized at low cost. In order to use an A / D converter with high resolution but relatively low sampling speed in the gradation test, the inspection pattern of the composite signal adopts a pattern in which one scanning line has the same gradation and the gradation is changed for each scanning line. By doing so, the inspection device can be realized at low cost.

The composite signal inspection device of the present invention separates a composite signal into a horizontal synchronizing signal, a vertical synchronizing signal, and an analog RGB signal and inspects the output function of each signal. For this reason, a composite signal used in a television or the like can be synchronized with a composite signal used in a personal computer or the like simply by inserting a switch at the subsequent stage of the decoder and switching according to the video signal format output from the product to be inspected. CR where signal and video signal are separated
The function test of the T (Cathode Ray Tube) interface signal can be performed by one unit.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is a timing chart showing input / output relations of an NTSC decoder and test items whose time is measured by a synchronization signal check circuit 10;

FIG. 3 is a timing chart showing a relationship between an analog RGB signal and data actually written in a second storage unit.

FIG. 4 is a diagram illustrating a relationship between an analog RGB signal obtained by decoding a composite signal of a third pattern and a second sampling clock.

FIG. 5 is a block diagram showing another embodiment of the present invention.

FIG. 6 is a block diagram showing a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Central processing unit 2 Pattern storage means 3 Standard value storage means 4 Register 5 Threshold voltage source 6 Video signal generator 7 Dot clock generation circuit 8 First sampling clock generation circuit 9 First sampling means 10 Synchronization signal check circuit DESCRIPTION OF SYMBOLS 11 1st storage means 12 Switch 13 Analog comparator 14 2nd storage means 15 Variable delay means 16 2nd sampling clock generation circuit 17 A / D converter 18 3rd storage means 35 Averaging circuit 36 Divider 37 NTSC decoder

Claims (3)

(57) [Claims] 1. A composite signal including a luminance signal indicating light and darkness, a color signal expressing colors, a synchronizing signal indicating a screen position and timing output from a video signal generator to be inspected, an analog RGB signal, a horizontal synchronizing signal. And a decoder that separates and converts the signal into a vertical synchronizing signal, and a composite signal of a first pattern in which the entire screen is a white pattern having the highest luminance according to a pattern designation signal that is a digital amount input from the outside. And outputting a composite signal of a second pattern having a maximum value and a minimum value alternately, and a composite signal of a third pattern in which one horizontal line has the same gradation and gradation is changed for each horizontal line. An identification signal designating the video signal generator and a pattern designation value defining the pattern designation signal corresponding to the identification signal are reserved. A pattern storage unit that stores the pattern designation values in association with each other; a register that temporarily stores the pattern designation value; a pulse width PW standard value of a horizontal synchronization signal output from the decoder is PW ± HD%; and a measurement accuracy is TM1%. (PW × (HD / 100) × (TM1 / 100))
^A first sampling clock generating circuit for generating a first sampling clock of ^-1 Hz; a first sampling means for sampling the horizontal synchronizing signal and the vertical synchronizing signal with the first sampling clock to obtain digital values; The pulse width and period of the horizontal synchronization signal and the vertical synchronization signal from the input of the sampling result by the first sampling means, and the time from the output of the horizontal and vertical synchronization signals to the output of the analog RGB signal. A synchronization signal check circuit for extracting a back porch time and a front porch time, which is a time from the end of output of an analog RGB signal to the output of the synchronization signal, and counting the number of pulses of a digital value; A standard value storage means for storing standard values of items measured by the check circuit; A first storage means controlled by a clock signal to write and store the measured value of the synchronization signal check circuit with the first sampling clock; and a horizontal synchronization signal controlled by a frequency division designating signal and output by the decoder as an input. A dot clock generation circuit having a frequency a times the frequency of the synchronization signal (a is a natural number) and generating and outputting a dot clock adjusted in phase with the horizontal synchronization signal; a variable delay means for delaying the dot clock; A threshold voltage source that outputs a threshold value for the value and a threshold value for the minimum value; an analog comparator that sets the threshold value for the maximum value and the threshold value for the minimum value; The values of a and N (N is a natural number not larger than a) are input by the cycle designation signal, and the outputs of the analog comparators are added by a / N at a time and averaged by a / N A frequency divider that receives the dot clock, further receives the values of a and N according to the frequency division designating signal, and outputs a write clock whose frequency has been frequency-divided by N / a times; Receiving the output of the averaging circuit under the control of a read / write control signal, and performing write / store with the write clock 2
A bit × N layer of second storage means, and the data display time of the analog RGB signal during horizontal one-line scanning of the analog RGB signal obtained by decoding the third pattern composite signal output from the video signal generator is represented by TD. And when the measurement accuracy is TM2%,
A second sampling clock generating circuit for generating a second sampling clock of (TD × (TM2 / 100)) ^-1 Hz; receiving a clock of the second sampling clock generating circuit and outputting from the video signal generator Analog RG decoded from the composite signal of the third pattern
An A / D converter for converting the B signal into a digital output signal of at least 12 bits; a third storage means controlled by the write / read control signal to capture the digital output signal of the A / D converter; And selecting one of the analog RGB signals according to the analog comparator and the A / D signal.
A switch for outputting to any one of the converters, and when a test command including the identification signal is input, a reset signal is output to the synchronization signal check circuit, and a corresponding first pattern designation value is output from the pattern storage means. And outputs the pattern designation signal to the video signal generator to decode the composite signal of the first pattern.
A signal is output, the value counted by the synchronization signal check circuit is read from the first storage means, and when the value is "good" as compared with the value read from the standard value storage means,
The frequency dividing designation signal is output to the dot clock generating circuit based on the cycle of the horizontal synchronizing signal and the vertical synchronizing signal to generate the dot clock, and one of the analog RGB signals is selected by the switch. Outputting the switching control signal for selecting the analog comparator side,
Reading the second pattern designation value from the pattern storage means again and storing it in the register and outputting the pattern designation signal to the video signal generator;
After outputting the analog RGB signal obtained by decoding the composite signal of the second pattern for each dot, and writing the measurement result for one screen of the image to the second storage means,
Reading the fetched pattern from the second storage means and determining that the composite signal of the second pattern matches an analog RGB signal decoded as “good”;
In this case, the switching control signal for selecting the A / D converter side is output to the switching device, and the corresponding third pattern designation value is read from the pattern storage means and stored in the register, and the video signal generation is performed. A pattern designating signal is output to the detector, and a composite signal of the third pattern is output. After a test time corresponding to one screen of an image has elapsed, a gradation value for each horizontal line is read out from the third storage means and determined. Is determined to be “good” when the first storage means, the second storage means and the third
And a central processing unit for controlling so as to stop the test when the determination becomes "bad" during the determination of the value stored in the storage means. 2. An analog RGB signal (40) and a decoder (37) among CRT (Cathode Ray Tube) interface signals including a horizontal synchronizing signal, a vertical synchronizing signal and an analog RGB signal output from a personal computer to be inspected. An analog RGB signal (42) to be output is input, and a selection signal (4) output from the central processing unit (1) is input.
In response to 1), a selector (12A) for selecting one of the analog RGB signals (40, 41) and outputting the selected signal as an analog RGB signal (23) to the switch (12) is provided, so that the inspection target can be changed to a television. 2. The composite signal test according to claim 1, wherein the apparatus is switched to a device that outputs a composite signal as typified by the device, or a device that outputs an analog RGB signal in which a synchronization signal and a video signal are separated as typified by a personal computer. apparatus. 3. The method according to claim 1, wherein the composite signal is NTSC (Na
The composite signal inspection apparatus according to claim 1 or 2, wherein the composite signal inspection apparatus is a composite signal.