JP2837036B2 - Method of forming gate electrode - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a gate electrode. In particular, it is used for manufacturing a field effect transistor.

[0002]

2. Description of the Related Art GaAs-based field-effect transistors, especially InGaAs-based HEMTs (High Electron Mobility Trams).
It is extremely important to increase the gate withstand voltage in a power transistor. Factors that may degrade the gate breakdown voltage include the film quality of the Schottky layer and the shapes of the gate, source, and drain electrodes. Other than these, leakage caused by a mesa step at the lead-out portion of the gate electrode has become a problem. (FIG. 3A part). However, 21 is a substrate, 22 is a gate metal, and 23 is a channel portion.

In order to avoid this problem, at present 1)
Isolation between elements by ion implantation to avoid mesa steps (for example, 1989 Int. Symp. GaAs & Related Compounds "
LowTemperature MBE growth of GaAs and AlInAs for h
igh speed devices "), 2) Selectively etch the channel layer which is the cause of gate leakage at the mesa step (for example, 18th Int. Conf. on GaAs & Related Compound)
s "Elimination of Mesa-Sidewall Gate Leakage in In
AlAs / InGaAs HFET's by Selective Sidewall Recessin
g "), 3) The gate is air-bridged at the mesa edge to prevent contact between the mesa step and the gate electrode (eg, IEEE
Electron Device Letters, Vol.9 (1988), No7, "High-Per
formance InAlAs / InGaAs HEMT's and MESFET's ").

[0004]

However, in element isolation by ion implantation, it is extremely difficult to select an implantation condition for forming a thermally stable insulating layer because the insulation resistance may be degraded by heat treatment. , It is difficult to ensure reliability. 2) In the method of selectively etching the channel layer, the channel portion needs to be made of a different material from the other portions, and an etchant for selectively etching only the material is indispensable. Therefore, it cannot be used in an element such as a MESFET in which the material of the channel layer and the other layer are the same, or in an element having no suitable selective etchant even if the material of the channel layer is different. Further, even if the channel layer is different from other materials and the HEMT has an appropriate selective etchant, the n-type InAlAs as the donor layer and the gate electrode are in contact only by shaving the channel layer. Cannot be completely eliminated. Therefore, at present, the method using the air bridge of 3) is considered to be relatively suitable in terms of reliability and reliability.

[0005] As a method of forming an air bridge, a method of using a resist as a sleeper as shown in FIG. 4 is generally considered. After the mesa etching of the substrate 31, a first resist 33 for sleepers is applied (a), and reflow is performed by heat treatment in an oven to round the resist end (b). Then, a first resist 33 serving as a sleeper and a second resist 34 having no intermixing are applied (c), and a gate metal 32 is formed.
And then lift off (d). However, when the mesa etching and the gate air bridge formation are performed in this separate process, the alignment of the air bridge portion of the gate and the mesa step is determined by the overlay accuracy of the exposure apparatus, so that a slight pattern shift should be avoided. Can not. As shown in FIG. 5A, when the air bridge part is displaced inward from the mesa step (toward the upper side of the mesa step), the gate bias cannot effectively act on the air bridge part. As shown, a current flows between the source and the drain, and pinch-off does not occur. However, 41
Is a substrate, and 42 is a gate metal. FIG. 5
As shown in FIG. 5B, when the air bridge part is shifted to the outside (in the direction away from the mesa step), the gate electrode comes into contact with the mesa edge, so that a gate leak current flows as shown by the arrow B in FIG. In the case of a shift in the direction of FIG. 5A, a pinch-off current corresponding to the shift amount / gate width × Idss flows, so that Idss = 50 mA and the gate width is 100 μm.
In this case, even if 0.5 mA is allowed as the pinch-off current, the alignment accuracy needs to be 1 μm or less. Also, the direction of (b) is from the upper surface of the mesa step to the channel,
Since it is about 00 °, the alignment accuracy is required to be equal to or more than that. These precisions are practically extremely difficult considering the alignment precision of the stepper and the pattern shift due to reflow. Therefore, it is necessary to form the air bridge by self-alignment with respect to the mesa step.

As a method of performing the air bridge by self-alignment with respect to the mesa step 51, a method of etching the mesa step area after forming the gate 52 to form an air bridge can be considered (for example, FIG. 6). After vapor deposition of the gate metal by the usual method (a), patterning is performed slightly smaller than the mesa (b), and the mesa etching is performed again (c). However, in general, abnormal etching A often occurs in the vicinity of the Schottky electrode, and as a result of actually studying this method, the vicinity of the gate electrode was considerably etched and the effective gate width was significantly reduced (FIG. 7). ).

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an air bridge can be accurately arranged in a step region of a mesa, and a gate bias effectively acts on a current between a source and a drain. It is an object of the present invention to provide a method for forming a gate electrode which is capable of generating a leak current without generating a leakage current and having an excellent withstand voltage.

[0008]

According to the present invention, a)
A support film for supporting a resist film of a predetermined pattern is formed on the substrate, and the substrate is etched to a predetermined depth by an isotropic etching method using the mask as a mask to form a mesa of the substrate and form a support film. An end region is extended over a step region of the mesa of the substrate over a predetermined width. B) An electron beam resist film is formed thereon, and an electron beam having an energy capable of passing through the electron beam resist film and the supporting film is applied to the entire surface. By irradiating, the electron beam resist film on the overhanging region of the support film forms an area with an exposure amount as small as the amount of reflection from the substrate on the other area, and develops this area. An electron beam resist film having a predetermined thickness is left only on the overhanging region of the support film. C) A pattern of a gate electrode metal film is formed on the region including the electron beam resist film. Method of forming a gate electrode, and forming a gate electrode having an air bridge on the step area of the substrate of the mesa is provided by removing the line resist film.

According to the present invention, a) a supporting film for supporting a resist film having a predetermined pattern is formed on a substrate, and the substrate is etched to a predetermined depth by an isotropic etching method using this as a mask. A mesa of the substrate is formed, and an end region of the support film is extended over a step region of the mesa of the substrate over a predetermined width. The substrate is, for example, I
It can be made of nGaAs, GaAs, InAlAs, or the like.

The supporting film is used for masking a predetermined region of the substrate in a step of etching the substrate by an isotropic etching method and for supporting an electron beam resist film formed thereon. A predetermined pattern is used from silicon, silicon oxide, or the like. The predetermined pattern is formed such that the resist support film exists only in the mesa of the substrate and the step region of the mesa.

In the isotropic etching method, a mesa is formed by etching a substrate to a predetermined depth, and a step region of a mesa is formed by side-etching a substrate below an end region of a support film. . By the side etching, the end region of the support film can be extended over the mesa step of the substrate over a predetermined width. This etchant can be appropriately selected depending on the substrate to be used.
When a GaAs substrate is used, a phosphoric acid-based etchant is preferable.

The predetermined depth of the etching corresponds to the height of the mesa to be formed, and is usually 0.05 to 0.2 μm.
The predetermined width of the end region of the support film that extends over the step region of the mesa (shape of a hat) corresponds to the width of the step region of the mesa to be formed, and is usually 0.05 to 0.2 μm. In the present invention, b) an electron beam resist film is formed thereon, and the entire surface is irradiated with an electron beam having an energy capable of passing through the electron beam resist film and the support film, whereby electrons on the overhanging region of the support film are exposed. In the linear resist film, a region having a light exposure amount as small as the amount of reflection from the substrate on other regions is formed, and by developing this region, an electron having a predetermined thickness is formed only on the region where the support film overhangs. Leave the line resist film.

The electron beam resist film is for forming a cavity under a bridge of a gate electrode having an air bridge, and is patterned so as to remain only in a region corresponding to the cavity after exposure and development. It can be formed using, for example, a known positive electron beam resist. As the positive electron beam resist, for example, PMMA, φMAC and the like are preferable.

[0014] The predetermined thickness is usually 0.1 to 0.
2 μm. In the present invention, c) a pattern of a metal film for a gate electrode is formed on a region including on the electron beam resist film, and thereafter, the supporting film and the electron beam resist film are removed to form a pattern on the step region of the mesa of the substrate. A gate electrode having an air bridge is formed.

The metal film for the gate electrode is, for example, Ti
/ Pt / Au laminated film, Al film, or the like can be used.
The removal of the support film can be appropriately selected depending on the material of the support film to be used. For example, when silicon nitride is used for the support film, the removal can be performed using, for example, buffered hydrofluoric acid or the like. This removal partially forms the cavity of the air bridge.

The removal of the electron beam resist film can be performed using, for example, acetone. This removal completes the cavity of the air bridge. Since the electron beam resist film remains only on the region where the support film overhangs, the cavity is accurately arranged in the step region of the mesa.

[0017]

[Action] As a result of various studies on electron beam exposure, FIG.
(A) As shown in (b), when the support film protrudes into the brim of the hat due to side etching, or (a), the semiconductor layer protrudes into the brim of the hat by selectively etching a laminated structure of different materials. In the case (b), a resist residue considered to be insufficient in exposure amount after electron beam irradiation was observed on the upper electron beam resist.

As shown in FIG. 9, when the electron beam is irradiated, the electron beam for exposing the resist 82 is reflected by the incident electron beam 83 and the substrate 81 which are directly incident, and the reflected electron for exposing the resist 82 again. There are two of the lines 84. When the dose of the electron beam is reduced, the exposure is sufficiently performed only by the incident electron beam at the upper part of the resist, but the incident electron beam required for exposure is absorbed at the lower part of the resist because the incident electron beam is absorbed by the upper part of the resist. Does not exist. However, some reflected electrons enter the substrate and are reflected there and then return to the resist again. Therefore, the reflected electron beam compensates for the shortage of the incident electron beam, and sufficient exposure is performed. The depth of incidence of the electron beam generating the reflected electrons on the substrate is about 3 μm when the acceleration voltage is 30 kV. Therefore, when the underlayer is thinner than the penetration depth of the electron beam, it is considered that the amount of reflected electrons is smaller than that on a normal substrate.

Taking these facts into consideration, the supporting film protruding like a brim of the hat as shown in FIG.
Sufficient reflected electrons could not be obtained because it was only about 00 °, and it is considered that the under exposure of the resist was insufficiently exposed.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to the drawings. As the substrate, an InGaAs-based HEMT structure epiwafer was used. From the substrate side, the epi structure is composed of 5000 undoped InAlAs, 300 undoped InGaAs, 50
{Undoped InAlAs, 100} n-type InAlAs
(Si-doped, 8 × 10 ¹⁸ cm ⁻³ ), 300 ° undoped InAlAs, and 500 ° n-type InGaAs (Si-doped, 8 × 10 ¹⁸ cm ⁻³ ).

A description will be given below with reference to FIGS. The SiN _x film 2 is coated on the substrate 3 by plasma CVD for 30 minutes.
Deposit 0 °, apply a resist 1, pattern the mesa, etch the SiN _x film 2 with buffered hydrofluoric acid (a), and etch the mesa for 62
The substrate was etched to a depth of 50 ° (b). An electron beam resist 4 was applied (c), and exposed and developed with an electron beam (d). The exposure at this time was set to be 10% higher than the minimum exposure at which a pattern could be completely formed on a normal plane. Next, the SiN _x film 2 is etched with buffered hydrofluoric acid (e), and the Ti / Pt / Au layer 5 is
0, 2500 ° deposition (f), lift-off, and gate formation (g). (E) The etching amount of the SiN _x film 2 was set to a just etching amount because the mesa step portion was exposed if the side etching amount was large. FIG. 10 shows the gate characteristics of the device manufactured in this way and the device manufactured by the usual method. It was found that the device characteristics (a) of this example were significantly improved as compared with the device characteristics (b) of the comparative example using the ordinary method.

[0022]

According to the present invention, an air bridge can be accurately arranged in a step region of a mesa, a gate bias can be effectively applied to a current between a source and a drain, and no leak current is generated. A method for forming a gate electrode with excellent withstand voltage can be provided.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a process of forming a gate electrode manufactured in an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a step of forming a gate electrode manufactured in an embodiment of the present invention.

FIG. 3 is an explanatory diagram of a conventional gate electrode.

FIG. 4 is an explanatory diagram of a conventional gate electrode.

FIG. 5 is an explanatory diagram of a conventional gate electrode.

FIG. 6 is an explanatory diagram of a conventional gate electrode.

FIG. 7 is an explanatory diagram of a conventional gate electrode.

FIG. 8 is an explanatory diagram of a method for forming a gate electrode according to the present invention.

FIG. 9 is an explanatory diagram of a method for forming a gate electrode according to the present invention.

FIG. 10 is an explanatory diagram of electric characteristics of a gate electrode manufactured in an example of the present invention.

[Explanation of symbols]

Reference Signs List 1 resist 2 SiN _X film 3 substrate 4 electron beam resist 5 Ti / Pt / Au layer

──────────────────────────────────────────────────続 き Continued on the front page (58) Investigated field (Int.Cl. ⁶ , DB name) H01L 21/337-21/338 H01L 27/095-27/098 H01L 29/775-29/778 H01L 29 / 80-29/812 H01L 21/3205 H01L 21/321 H01L 21/3213 H01L 21/768 H01L 21/28-21/288 H01L 21/44-21/445

Claims (1)

(57) [Claims] A) forming a support film for supporting a resist film of a predetermined pattern on a substrate, and etching the substrate to a predetermined depth by an isotropic etching method using the support film as a mask to form a mesa of the substrate; And an end region of the supporting film is extended over the step region of the mesa of the substrate over a predetermined width. B) An electron beam resist film is formed thereon, and the entire surface passes through the electron beam resist film and the supporting film. By irradiating an electron beam of a possible energy, the electron beam resist film on the overhanging region of the support film, to form a region of an exposure amount as small as the amount of reflection from the substrate on another region, By subjecting this to a developing process, an electron beam resist film having a predetermined thickness is left only on the region where the support film overhangs. C) A pattern of a gate electrode metal film is formed on the region including the electron beam resist film, Support film and method of forming the gate electrode, and forming a gate electrode having an air bridge on the step area of the substrate of the mesa by removing an electron beam resist film after.