JP2815225B2 - Semiconductor device and sealing method therefor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a semiconductor device in which an IC chip on which elements are formed is mounted on a COB (Chip On Board) substrate and a sealing method therefor. (1) A semiconductor chip is mounted on a substrate, and a surface protective film is applied to the periphery of the chip on the substrate to provide a structure and method for suppressing the flow of the sealing resin. The surface protection film has a flow suppressing opening, and is configured so as to cover the chip and to cover the sealing resin up to the flow suppressing opening.

2) forming a surface protection film on the substrate, forming a chip mounting opening in the surface protection film, and a flow suppressing opening around the chip mounting opening; It is configured to include a step of mounting a semiconductor chip in the opening, and a step of covering the chip and covering up to the flow suppressing opening with a sealing resin.

3) The flow suppressing opening is configured to be a band-shaped opening provided around the chip.

4) The flow suppressing openings are arranged in an array of hole-shaped openings provided around the chip.

[Industrial applications]

The present invention relates to a semiconductor device in which an IC chip having elements formed thereon is mounted on a COB substrate, and a method for sealing the same.

With the recent miniaturization of personal computers and measuring devices, demands for products using COB substrates such as IC cards have been increasing. The method of sealing the IC chip on the COB substrate is to apply the sealing resin directly on the substrate, but the quality of the product depends on the flow of the resin.

In this case, the present invention can be used as a method for preventing the sealing resin from flowing onto the substrate.

[Conventional technology]

Conventional methods of suppressing the flow of sealing resin on a COB substrate include bonding a frame with a certain height around the chip mounting area on the substrate, or repelling the sealing resin such as silicon resin. It was formed on a substrate by printing on a resin with a stamp or by pressing with a stamp.

These methods can reliably prevent the flow of the sealing resin, but increase the cost by about 10 to 20 yen per substrate.

Therefore, the above-described method using frames or printing cannot be used for low-cost mass-production products such as computer games. In that case, the flow is controlled only by adjusting the viscosity of the sealing resin. I had to.

3 (a) and 3 (b) are plan views illustrating the flow of resin according to the conventional example.

This example is a low-priced product without using the above-mentioned frame, etc.
This is a case where the flow is controlled only by the viscosity of the sealing resin.

In the figure, 1 is the board (made of glass epoxy), 1A is the exposed surface of the board, 2 is the IC chip mounting part, 3 is the internal terminal (copper foil), 3 is the external terminal (copper foil), and 5 is the chip mounting part. The coating surface of the surface protective film (solder resist: photosensitive resin used for a soldering mask of a printed board), which is opened and adhered on the substrate, is a sealing resin.

 FIG. 3A shows the state of the substrate 1 before sealing.

FIG. 3 (b) shows a state in which the sealing resin 6 is coated on the external terminals 4 due to excessive flow of the sealing resin 6 after the sealing resin 6 is applied and sealed, resulting in a sealing failure. It is.

[Problems to be Solved by the Invention] In the conventional example, there has been a problem that it is not possible to cope with a change in flowability due to a difference in production lot of the sealing resin.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a structure and a method for suppressing the flow of a sealing resin without affecting the cost in a semiconductor device using a COB substrate.

[Means for solving the problem]

To solve the above problems, 1) a semiconductor chip is mounted on a substrate, a surface protection film is applied on the periphery of the chip on the substrate, and the surface protection film has an opening for suppressing flow. A semiconductor device covered with a sealing resin up to the flow suppressing opening, or 2) a surface protective film is applied on the substrate, and the chip mounting opening and the chip mounting opening are formed on the surface protective film. Forming a flow suppression opening around the periphery, mounting a semiconductor chip in the chip mounting opening on the substrate, and covering the chip with the sealing resin to cover the flow suppression opening; 3) the semiconductor device according to 1), wherein the flow suppressing opening is a band-shaped opening provided around the chip; or 4) the flow suppressing. Opening around the tip This is achieved by the semiconductor device according to the above 1), wherein the arrangement of the hole-shaped openings provided in the enclosure is provided.

[Action]

The properties of the sealing resin flow well on the surface protection resin (solder resist) adhered on the substrate, but hardly flow on the substrate (glass epoxy).

Further, if there is a certain level of step, it becomes difficult to flow due to surface tension.

The present invention makes use of the above facts to form a thin groove-shaped cutout portion (opening for suppressing the flow of the sealing resin) outside the chip mounting opening in the resin film for protecting the surface of the substrate. Thereby, the flow of the sealing resin is suppressed.

In this case, the flow suppressing opening can be formed simultaneously with the chip mounting opening in the etching step at the time of manufacturing the substrate, so that there is no increase in the number of steps.

〔Example〕

1 (a) and 1 (b) are plan views illustrating an embodiment of the present invention.

In the figure, 1 substrate (made of glass epoxy), 1A is the exposed surface of the substrate, 2 is the IC chip mounting part, 3 is the internal terminal (Ni, Au on copper foil)
Plating), 4 are external terminals (NI, Au plating on copper foil), 5 is a surface protective film (solder resist) deposited on the substrate, 6 is sealing resin, 7 is the surface deposited on the substrate surface This is a moat-like flow suppression opening that is opened around the chip mounting opening of the protective film.

 FIG. 1A shows a state before the substrate 1 is sealed.

FIG. 1B shows a state after the sealing resin 6 has been applied and sealed. The sealing resin 6 is blocked by the moat-like flow suppressing opening 7 surrounding the chip mounting opening, so that sealing failure due to excessive flow does not occur.

At this time, the flow suppressing opening 7 can be formed at the same time as the chip mounting opening in the step of etching the surface protective film applied on the substrate when the substrate is manufactured, so that the number of steps is not increased.

FIG. 2 is a plan view for explaining another embodiment of the present invention.

In this example, a large number of small hole-shaped openings 7A are arranged side by side around the chip mounting openings.

 Next, the manufacturing method will be described in the order of steps.

At the time of manufacturing the substrate, a flow suppressing opening 7 is formed at the same time as the chip mounting opening in an etching step of the surface protective film deposited on the substrate.

An adhesive (silver paste) is applied to the chip mounting portion 1,
The IC chip is placed on top of it and bonded by heating.

Next, a wire potential is applied to the IC chip to the internal terminal 3.

 The chip is covered with a sealing resin (epoxy).

At this time, the sealing resin is blocked by the flow suppressing opening 7, so that the sealing resin is thickly covered to prevent the exposure of the wire and the chip, and that the sealing resin flows to the external terminals due to excessive flow. There is nothing.

If the viscosity of the sealing resin is too high, the coating thickness will be too large, and the wire will be exposed without being sufficiently spread to cover the internal terminals. Therefore, when the viscosity is lowered, the above-mentioned obstacles due to excessive flow occur. However, in the embodiment, this could be completely prevented.

〔The invention's effect〕

As described above, according to the present invention, in the semiconductor device using the COB substrate, it was possible to suppress the flow of the sealing resin without affecting the cost at all.

As a result, it was possible to contribute to the suspension of production and improvement of reliability of semiconductor devices using COB substrates such as IC cards.

[Brief description of the drawings]

1 (a) and 1 (b) are plan views illustrating an embodiment of the present invention, FIG. 2 is a plan view illustrating another embodiment of the present invention, and FIGS. 3 (a) and 3 (b). FIG. 3 is a plan view illustrating a flow of a resin according to a conventional example. In the figure, 1 is a substrate (made of glass epoxy), 1A is an exposed surface of the substrate, 2 is an IC chip mounting portion, 3 is an internal terminal (Ni, Au plating on a copper foil), 4 is an external terminal (Ni, a copper foil). Au plating), 5 is the surface to which the surface protective film (solder resist) is applied, 6 is the sealing resin, and 7, 7A are the openings for suppressing flow.

──────────────────────────────────────────────────続 き Continued from the front page (72) Inventor Shigeo Natsume 2-1844-2 Kozoji-cho, Kasugai-shi, Aichi Prefecture Inside Fujitsu VSI Co., Ltd. (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 23 / 28-23/30 H01L 21/56

Claims (4)

(57) [Claims] 1. A semiconductor chip is mounted on a substrate, a surface protection film is applied to the periphery of the chip on the substrate, the surface protection film has an opening for suppressing flow, and covers the chip. A semiconductor device, wherein a sealing resin is coated up to an opening for flow suppression. 2. A step of applying a surface protection film on a substrate, forming a chip mounting opening in the surface protection film, and a flow suppressing opening around the chip mounting opening. A method of sealing a semiconductor device, comprising: a step of mounting a semiconductor chip in a chip mounting opening; and a step of covering the chip and covering up to the flow suppression opening with a sealing resin. 3. The semiconductor device according to claim 1, wherein said flow suppressing opening is a band-shaped opening provided around said chip. 4. The semiconductor device according to claim 1, wherein said flow suppressing openings are an array of hole-shaped openings provided around said chip.