JP2808814B2 - Defective pixel position detection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION A. Industrial Field of the Invention The present invention relates to a charge coupled device (CCD).
The present invention relates to a defective pixel position detecting device that generates position data indicating a position of a pixel that outputs a signal of a peculiar level in a state where light contained in a solid-state imaging device is not incident as in e).

B. Summary of the Invention The present invention relates to an image output signal read out of the above-mentioned storage means, which is stored in a storage means in synchronization with the reading of an image output signal in a state where light is not incident, of each pixel of the image pickup element. And the image pickup output signal from the image pickup element are synchronously added, and the S / N of the image pickup output signal is improved by repeatedly performing control of writing the added image pickup output signal to the storage means, thereby providing a unique signal. Position data indicating a position of a defective pixel that outputs a level image pickup output signal is easily generated.

C. Prior Art In general, a solid-state imaging device such as a CCD formed of a semiconductor generates a defective pixel that outputs a signal of a peculiar level in a state where light is not incident due to a local crystal defect of the semiconductor. It is known that image quality is deteriorated due to an imaging output from a pixel. In a defective pixel that outputs a signal of a peculiar level in a state where the light is not incident, a constant bias voltage is always added to an imaging output corresponding to the amount of incident light and output.

Therefore, conventionally, a Blemish correction circuit that corrects the signal level of an output signal from a defective pixel that outputs a signal of a peculiar level in a state in which light included in a solid-state imaging device is not incident, for example, as described above, Data on the position of the defective pixel included in the element and the Blemish level included in the output signal thereof is stored in a memory, and based on the data read out from the memory, the image quality deterioration caused by the imaging output from the defective pixel is determined. Is corrected by signal processing. The position of the defective pixel included in the solid-state imaging device and its blemish level are detected in advance on a manufacturing line, and the data is written to a programmable read-only memory.

D Problems to be Solved by the Invention By the way, in the conventional Blemish correction circuit, as described above, the position of the defective pixel included in the solid-state imaging device and the Blemish level thereof are detected in advance, and the programmable read-only memory in which the data is written is written. Is used to perform the correction processing. Therefore, when the Blemish level changes over time or a new defective pixel occurs, there is a problem that it is not possible to perform an appropriate Blemish correction processing. .

Accordingly, the present invention has been made in view of the above-mentioned problems of the conventional Blemish correction circuit, and has been described in view of the above. In a Blemish correction circuit that corrects a level, an appropriate Blemish correction process can be performed even when the Blemish level of an image sensor changes over time or a new defective pixel occurs. Aim.

E Means for Solving the Problems A position detecting device for a defective pixel according to the present invention is a storage device for storing the imaging output signal in synchronization with the reading of the imaging output signal obtained for each pixel of the imaging device in a light-shielded state. Means, an addition means for synchronously adding the imaging output signal read from the storage means and the imaging output signal from the imaging device, and writing the imaging output signal added by the addition means to the storage means A control means for repeatedly performing control, and outputting a unique level of an image output signal output in a state where no light is incident on each pixel of the image sensor based on the image output data stored in the storage means. And position data generating means for generating position data indicating the position of the defective pixel to be processed.

F Action In the defective pixel position detecting device according to the present invention, the storage means stores the imaging output signal in synchronization with the reading of the imaging element. The adding means synchronously adds the imaging output signal read from the storage means and the imaging output signal from the imaging element. The control unit improves the S / N of the imaging output signal of the storage unit by repeatedly performing control of writing the imaging output signal added by the addition unit to the storage unit. The position data generating means outputs, based on the imaging output data stored in the storage means, an imaging output signal having a peculiar level which is output in a state where light is not incident among the pixels of the imaging element. Generate position data indicating the position of the pixel.

G Example Hereinafter, an example of a defective pixel position detecting device according to the present invention will be described in detail with reference to the drawings.

The embodiment shown in FIG. 1 is a solid-state image sensor in which a subject image is formed on an imaging surface by imaging light incident through an imaging optical system (3) such as an imaging lens (1) and an iris mechanism (2). The present invention is applied to a signal processing system of a solid-state imaging device including (4) in an imaging unit.

In this solid-state imaging device, the iris mechanism (2) of the imaging optical system (3) includes the solid-state image sensor (4).
The iris driving unit (6) that operates in response to an iris control signal supplied from a system controller (5) performs opening / closing driving.

The CCD image sensor (4) is driven by a CCD driving unit (7) that operates according to a CCD control signal supplied from the system controller (5), and operates in accordance with the operation specified by the system controller (5). The imaging operation is performed in the mode.

Here, as the solid-state image sensor (4), for example, as shown in FIG. 2, a large number of light receiving portions (S) corresponding to pixels arranged in a matrix, and these light receiving portions (S) A vertical transfer register (VR) provided on one side along the vertical direction, and a horizontal transfer register (HR) provided on the end side of each of the vertical transfer registers (VR). The signal charge obtained by each light receiving section (S) is transferred to each vertical transfer register (VR) corresponding to each vertical line, for example, every one field period or every one frame period, and through each vertical transfer register (VR). An interline transfer type CCD in which the signal charges are transferred to a horizontal transfer register (HR), and the signal charges for each horizontal line are taken out from the horizontal transfer register (HR) as an image output. Mejisensa is used.

This embodiment includes a signal subtracter (9) to which an imaging output signal from the CCD image sensor (4) is supplied via a preamplifier (8).

The signal subtracter (9) converts the Blemish correction data read from the first memory (10) whose data writing / reading is controlled by the system controller (5) into a digital / analog (D / A) converter ( The Blemish correction signal converted to analog by (11) is
The Blemish correction processing is performed by subtracting this Blemish correction signal from the imaging output signal of the CCD image sensor (4).

The multiplier (12) is the CCD image sensor (4)
A detection output signal from the temperature sensor (13) for detecting the temperature of the CCD image sensor (4), that is, a detection output signal indicating the current temperature of the CCD image sensor (4), is supplied to the D / A converter (11). ) Is multiplied by the analogized Blemish correction signal to perform a temperature correction process on the Blemish correction signal.

The subtraction output signal from the signal subtracter (9) is digitized by an analog-to-digital (A / D) converter (14) and supplied to a digital signal processing unit (not shown) at the subsequent stage as imaging output data. , And supplied to the adder (15).

The adder (15) supplies the added output data to a second memory (17) whose data writing / reading is controlled by the system controller (5) via a changeover switch (16).

The data read from the second memory (17) is
The signal is supplied to the adder (15) and to the changeover switch (16) via a high-pass filter (18). Further, the second memory (17) is provided with the CCD
An arithmetic unit (19) for forming a position of a pixel which outputs a signal of a peculiar level in a state where light is not incident among pixels of the image sensor (4) and Blemish correction data indicating the peculiar level; , And is connected to the arithmetic unit (19).

The arithmetic unit (19) further includes a detection output signal indicating the current temperature of the CCD image sensor (4) obtained by the CCD image sensor (4) and an analog / digital (A / D) converter (20). Is supplied in digital form.

The system controller (5) transmits an iris control signal for closing the iris mechanism (2) for controlling the amount of imaging light applied to the imaging surface of the solid-state image sensor (4) in the Blemish detection mode. In addition to supplying to the iris drive unit (6), a CCD control signal for specifying the frame read mode of the CCD image sensor (4) is supplied to the CCD drive unit (7). In the Blemish detection mode, for example, the system controller (5) performs read control on the first memory (10), and outputs the Blemish correction data having a zero correction level from the first memory (10). By reading, the Blemish correction process is stopped.

Here, the image output signal from the defective pixel obtained by the CCD image sensor (4) in a state in which the iris mechanism (2) is closed has a signal level, that is, a Blemish level, whose charge accumulation in the defective pixel. It increases in proportion to time. Therefore, in this embodiment, the CCD controller (7) is controlled by the system controller (5) to extend the charge accumulation time, and charge accumulation is performed within the dynamic range of the circuit.

In the Blemish detection mode, the system controller (5) first controls the changeover switch (16) so as to select the adder (15).
Then, the system controller (5) communicates with the A / D
The imaging output data obtained by the converter (14) is
The data is read into the second memory (17) in synchronization with the reading of the imaging output signal from the image sensor (4). further,
The system controller (5) reads out the imaging output data written in the second memory (17),
The imaging output data obtained by the A / D converter (14) and the adder (15) are synchronously added to the second memory (1).
S / N is improved by repeating the operation of writing in 7).

Next, the system controller (5) controls the changeover switch (16) so as to select the high-pass filter (18). Then, the second memory (1
7) reading out the imaging output data read out from the second memory (17) via the high-pass filter (18);
Write to. That is, in the second memory (17),
The imaging output data from which the DC component and the low-frequency noise component have been removed by the high-pass filter (18) is written.

The system controller (5), based on the imaging output data written in the second memory (17) in this manner, outputs a signal of a peculiar level in a state where no light is incident on a defective pixel. Position data indicating the position,
The arithmetic unit (19) performs arithmetic processing for generating Blemish level data indicating the unique level of the signal output from the defective pixel indicated by the position data.

The arithmetic unit (19) calculates the second charge based on the charge accumulation time of the CCD image sensor (4), the number of times of the synchronous addition, and the temperature at the time when the imaging output data is loaded into the second memory (17). The Blemish level data is generated together with the position data by an arithmetic processing for normalizing the image pickup output data written in the memory (17). The Blemish level data obtained by the arithmetic unit (19) is written into the first memory (10) by the system controller (5) together with the position data as Blemish correction data.

In this embodiment, the Blemish correction data written in the first memory (10) in the above-described Blemish detection mode is read out from the first memory (10) and read out from the D / A converter (11). ) To form an analog signal during the actual imaging operation, and the signal subtracter (9) performs the blur correction processing.

In this embodiment, the second memory (17)
By using a frame memory, the Blemish correction data can be written to the first memory (10) in one operation. However, when a line memory is used, it is possible to perform an operation of more than the number of lines. good. Also, the third
As in the embodiment shown in the figure, the Blemish detection can be performed for each point using a register.

The embodiment shown in FIG.
The configuration of (0) is different from the embodiment shown in FIG. 1 described above, and the common components are denoted by the same reference numerals in FIG. 3 and detailed description thereof is omitted.

That is, the Blemish detection unit (30) in the embodiment shown in FIG. 3 forms the address data corresponding to each pixel of the CCD image sensor (4) by counting the clock from the CCD drive unit (7). Address counter (21), and a high-pass filter (22) to which imaging output data obtained by digitizing an imaging output signal from the CCD image sensor (4) by an A / D converter (14) is supplied.
And a comparator (23) and an adder (2) to which the imaging output data is supplied via the high-pass filter (22).
4) and first and second switches (25), (2) controlled to be switched by the output of the comparator (24).
6), a first register (27) for temporarily storing the imaging output data supplied from the high-pass filter (22) through the first switch (25), and a first register (27) from the address counter (21). A second register (2) for temporarily storing address data supplied via the second switch (26).
8) and a third register (29) for temporarily storing the addition output data of the adder (24).

In this embodiment, in the Blemish detection mode,
The system controller (5) operates the CCD image sensor (4) in a frame read mode with the iris mechanism (2) closed.

The comparator (23) of the Blemish detection unit (30) compares the current imaging output data supplied via the high-pass filter (22) with the imaging data stored earlier in the first register (27). Compare with output data.
When the current imaging output data is larger than the imaging output data previously stored in the first register (27), the comparator (23) compares the current imaging output data with the first imaging output data. Switching control of the first switch (25) so that the current image pickup output data is obtained.
The switching control of the second switch (26) is performed so that the address data indicating the pixel position of the image sensor (4) is taken into the second register 28.

That is, the first switch (25), which is controlled to be switched by the comparator (23), and the first register (27) that stores the imaging output data supplied through the first switch (25) , And functions as a peak level detector for detecting the peak level of the imaging output data supplied via the high-pass filter (22). The second switch (26) controlled to be switched by the comparator (23) and a second memory for storing address data supplied from the address counter (21) via the second switch (26). The register (28)
(27) functions as a detector for detecting the position of a pixel from which the peak level data stored in the register (27) is obtained, that is, the position of a defective pixel.

The second register (28) fetches address data indicating a defective pixel position at which the imaging output data has a peak value. The address data indicating the defective pixel position is stored in the system controller (5) and the arithmetic unit (19).
Supplied to

The third register (29) for temporarily storing the addition output data by the adder (24) is controlled by the system controller (5) to control the data fetch timing. The adder (24) synchronizes and adds the image pickup output data from the defective pixel indicated by the address data fetched into the address data fetched to form the image output data with improved S / N. The imaging output data obtained in the third register (29) is supplied to the arithmetic unit (19).

The arithmetic unit (19) determines the charge accumulation time of the CCD image sensor (4) and the synchronization when the imaging output data obtained in the third register (29) is sufficiently larger than the noise level. The imaging output data obtained in the third register (29) is normalized based on the number of times of addition and the temperature at the time when the imaging output data is loaded into the second memory (17) to generate Blemish level data. I do. The Blemish level data obtained by the arithmetic unit (19) is stored in the first memory (10) as Blemish correction data together with the position data of the defective pixel indicated by the address data taken into the second register (28). Written.

Then, the Blemish correction signal is formed by reading the Blemish correction data written in the first memory (10) from the first memory (10) and converting the data into an analog signal by the D / A converter (11). While performing the Blemish correction process, the operation in the Blemish detection mode is repeated until the imaging output data obtained in the third register (29) becomes equal to or lower than the noise level.

Then, the Blemish correction data written in the first memory (10) in the Blemish detection mode is read from the first memory (10), and the D / A
The analog signal is converted by the converter (11) to form a Blemish correction signal during an actual imaging operation, and the signal subtractor (9) performs the Blemish correction process. In the position detecting device for a defective pixel according to the present invention, the imaging output signal from the imaging device is stored in the storage device, and the imaging output signal read from the storage device and the imaging output signal from the imaging device are synchronized. Addition, control to write the added imaging output signal to the storage means is repeatedly performed to improve the S / N of the imaging output signal, and the position of the defective pixel is determined based on the imaging output signal stored in the storage means. By generating the indicated position data, even if a weak peculiar level is output from the defective pixel, the position of the defective pixel can be accurately detected.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of a defective pixel position detecting device according to the present invention. FIG. 2 is a diagram schematically showing a structure of a CCD image sensor used as an image sensor in the above embodiment. FIG. 3 is a block diagram showing the configuration of another embodiment of the defective pixel position detecting device according to the present invention. (2) iris mechanism (4) solid-state image sensor (5) system controller (6) iris drive unit (7) CCD drive unit (9) signal subtractor (10) ) First memory (11) D / A converter, (15) Adder (17) Second memory (19) Arithmetic unit (21) Address counter ( 22) High-pass filter (23) Comparator, (24) Adder (25), (26) Switch (27), (28), (29) Register (30) Blemish Detection unit

Continuation of the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H04N 5/30-5/335

Claims (1)

(57) [Claims] A storage means for storing the imaging output signal in synchronization with the reading of an imaging output signal obtained from each pixel of the imaging element in a light-shielded state; and an imaging output signal read from the storage means. An adding method of synchronizing and adding the image pickup output signal from the image pickup element, a control unit for repeatedly performing control of writing the image pickup output signal added by the adding unit to the storage unit, and a control unit stored in the storage unit. Based on the imaging output data,
Position data generating means for generating position data indicating the position of a defective pixel that outputs an imaging output signal of a unique level that is output in a state where light is not incident among the pixels of the image sensor. Characteristic defective pixel position detection device.