JP2630206B2 - High power pulse laser diode module - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laser diode (LD) module capable of high-power pulse operation.

[0002]

2. Description of the Related Art Research and development of a high-power LD having a watt-class optical output as a solid-state laser excitation light source or a measurement light source has been activated. In the case of a single LD chip, in order to increase the output, the width of the light emitting area is widened to form a so-called broad area LD, or an array is used. Further, as a solid-state laser pumping light source, there is naturally a limit in increasing the output of a single chip, so a multi-chip integrated LD in which a plurality of LD chips are arranged on the same heat sink.
Modules have been developed and some are commercially available. As an example, there is a module in which individual LD chips are fixed to respective submounts and the submounts are stacked on a heat sink.

The details of this module are described in IEEE Journal of Quantum Electronics, Vol. 28, No. 925-9.
P. 65 (JG Endaricet et al., IEEE)
EJ. Quantum Electron. , Vol.
28, pp. 952-965). As another example, there is a module in which an LD chip is fixed to each step of a stepped heat sink as described in JP-A-4-264789. All of these conventional examples are based on the premise of continuous operation or repetitive pulse operation having a relatively large duty ratio. Therefore, in order to reduce the influence of the heat generation on the LD characteristics, the submount and the heat sink are devised as described above.

On the other hand, the high power pulse LD of the present invention
Modules are typically used with narrow pulse widths and small duty ratios. For this reason, the influence of the heat generation is small, and therefore, the heat radiation as in the conventional example is not necessarily required.

[0005]

Since the high-power pulse LD module of the present invention is intended for application to measurement and the like, the area of the entire light-emitting region viewed from the emission side should be as small as possible due to the optical system used. Need to be smaller. But,
In a multi-chip integrated LD module developed for pumping a solid-state laser as in the conventional example, the area of the entire light emitting region is too large and it is difficult to use it for measurement. The reason is that, in the above-mentioned conventional example, the thickness of the submount is
This is because, since the thickness is as large as 00 μm or more, the interval between the light-emitting regions of the individual LD chips necessarily becomes large. LD for measurement
As a module, it is necessary to integrate a plurality of laser chips more compactly and make the area of the entire light emitting region as small as possible. Furthermore, depending on the application, it is desirable that each LD chip can be driven independently in order to reduce the load on the pulse current drive circuit. Especially pulse width 1
In the case of driving with a short current pulse of about 0 ns, it is difficult to make the value of the peak current too large, so that it is necessary to drive each LD chip independently. However, a multi-chip integrated LD module manufactured for such a purpose has not appeared.

An object of the present invention is to provide a high-output pulse LD module in which a plurality of LD chips are compactly integrated and the total light emitting area is small, and furthermore, by independently driving each LD chip, a pulse current drive circuit is provided. An object is to obtain a high-output pulse LD module that can reduce the load.

[0007]

According to the present invention, there is provided a high-power pulse train according to the present invention.
The user module consists of multiple laser diode chips,
Close to each other and electrically insulated
And the emission area of each laser diode chip
That they are arranged to overlap each other in the layer direction
Features. In addition, the laser die auto chip
Stacked by flip chip mounting using bumps
It is characterized by having. Also, the laser diode chip
The P-side electrode and N-side electrode of the pump are formed on the same side.
And at least individual laser diode chip electrodes
Also key parts are arranged so that they do not overlap each other in the stacking direction
It is characterized by having.

[0008]

[0009]

Next, the present invention will be described with reference to the drawings.

FIG. 1 is a schematic diagram showing a reference example (hereinafter referred to as a reference example) on which a high-power pulse LD module of the present invention is based. Here, five LDs with an oscillation wavelength of 1.5 μm band
The chip 30 is stacked on the silicon mount 20 whose surface is metallized in such an arrangement that it is electrically connected in series. The LD chip 30 is electrically a PN junction diode. Therefore, each LD chip 30 is connected to the P side (or N
Side), and the light emitting regions 12 of the individual LD chips 30 are arranged so as to substantially overlap each other in the laminating direction. They are connected in series. Since the thickness of each LD chip 30 is about several tens of μm, a compact multi-chip integrated LD having a small total light emitting area 40 area
It is a module. The difference of the reference example from the conventional LD module is that the individual LD chips 30 are directly stacked without using a submount or the like.

Since the structure and manufacturing method of the LD chip 30 will be described later, the specific structure and manufacturing method of the LD module of the reference example will be described first. The size of the LD chip 30 is
Resonator length 600 μm, chip width 400 μm, chip thickness 5
0 μm and the light emitting region width is 200 μm. First, five LD chips 30 of the same size are stacked on the silicon mount 20 so that the emission side end faces are aligned as shown in FIG.
AuSn flux 9 is vapor-deposited on the surface of the silicon mount 20 and the P side of the LD chip 30 in advance. Next, L
The D chip 30 is heated while being pressed against the silicon mount 20, and the melting material 9 is once melted and then cooled, and the silicon mount 20 and the five LD chips 30 are simultaneously fixed.
Then, this is fixed to an appropriate package, and the wire 5 is fixed.
Bond 0. If this LD module is driven by a pulse current, the same current flows in each LD chip 30, and when compared with the same current value, an optical output about five times that of a single LD chip can be obtained. Since the internal resistance of the LD chip 30 used in the reference example is usually as low as about 1Ω or less, the overall load resistance is relatively small even if a plurality of LD chips 30 are connected in series. Of course, the driving voltage and the power consumption at this time are increased five times, and the load on the driving circuit is increased.

FIG. 2 is a more detailed schematic diagram of the 1.5 μm band LD chip 30 shown in FIG. This is a well-known structure which is usually called a broad area LD. Hereinafter, the specific structure will be described while following the manufacturing procedure. First, an N-type InP cladding layer 2, an InGaAsP quantum well active layer 3, a P-type InP
The cladding layer 4 and the P ⁺ -type InGaAs contact layer 5 are sequentially crystal-grown. Metal organic chemical vapor deposition is used for crystal growth. Next, a dielectric layer 6 is formed on the P-side contact layer 5, and a stripe-shaped window having a width of 200 μm is formed on a portion to be the light emitting region 12. Next, the P-side electrode 7 is formed.
After the N-side is polished to a thickness of about 50 μm, an N-side electrode 8 is formed. Next, AuSn flux 9 is placed on P-side electrode 7.
Is deposited. Finally, the chip is cut out, and a low-reflection film 10 is formed on the end surface on the emission side, and a high-reflection film 11 is formed on the end surface on the opposite side.

A supplementary example will be given. First, LD
The chip 30 has a broad area LD as shown in FIG.
In addition to the above, similar effects can be obtained even when an LD array is used. There are various types of LD arrays, for example,
An LD array having a buried structure as described in Japanese Patent Application No. 5-152043 can be used.
The size of the LD chip 30 can be appropriately set according to each application. LD chip 3
Similar effects can be obtained even when the 0 wavelength band and the material are different . In addition, instead of the InP substrate 1, S
The present invention is applicable even when an LD chip having a laser structure formed on an i-substrate is used . In this case, since the Si substrate is rigid, the chip thickness can be made smaller than in the embodiment, and therefore, more LD chips can be stacked. Alternatively, the area of the entire light emitting region can be made smaller.

In the reference example , the purpose is only to reduce the area of the entire light emitting region 40 as much as possible, and the plurality of LD chips 30 are driven by a single driving circuit. However, as described above, by independently driving each LD chip, the load on each drive circuit can be reduced.

[0015] Figure 3 is a schematic view showing an embodiment of a high output pulse LD module of the present invention, (a) is a front view, (b) is a plan view. In the embodiment , in addition to making the area of the entire light emitting region 41 as small as possible, the individual LD chips 31
Can be independently driven. Here, five LD chips 31 having an oscillation wavelength band of 1.5 μm are stacked on a silicon mount 21 whose surface is metallized so as to be electrically connected in series. The feature in comparison with the reference example is that the stacked structure of the module and the structure of the LD chip 31 are devised so that the individual LD chips 31 can be driven independently. Specifically, the LD chips 31 are stacked by a flip chip mounting method using the solder bumps 14, and the structure is such that the P-side electrode 7 and the N-side electrode 8 independent from each LD chip 31 can be pulled out. In this way, a plurality of drive circuits can be used, and the load on each drive circuit can be reduced.

[0016] Examples of specific structure of the LD chip 31 in the embodiment shown in FIG. This is the same blow area LD as the LD chip 30 shown in FIG. 2 as a reference example , and the layer structure, the structure of the light emitting region 12, and the reflection films 10 and 11 on the end faces are almost the same. The main differences from the LD chip 30 of the embodiment are that the solder bumps 14 made of AuSn are used for the fused portions, that the InP substrate uses a semi-insulating substrate instead of an N-type substrate, that the P-side electrode 7 and N-side electrode 8 is LD
For example, the chip 31 is taken out from the same side.
Furthermore, in order to facilitate bonding of the wires 51 when stacked, each of the electrodes 7 and 8 (wire bonding portion) of each LD chip 31 is so arranged that each of the LD chips 31 does not overlap each other in the stacking direction. The size of the electrodes 7 and 8 is changed. That is, the electrodes 7 and 8 are formed so as to be shifted laterally from the light emitting region 12 in the lower LD chip 31. Therefore, the lateral widths of the light emitting regions 12 of the individual LD chips 31 are equal, but the chip widths are different. The actual LD chip 31 has a size, a resonator length of 600 μm, a chip width of 500 to 900 μm, a chip thickness of 50 μm, and a light emitting region width of 200 μm.

Since the specific method of manufacturing the LD chip 31 is almost the same as that of the LD chip 30 shown in FIG. 2, details will be omitted, and different portions will be mainly described below. First, as the substrate 1, a semi-insulating InP substrate to which iron is added is used. As for the N-side electrode 8, in order to take out the N-side electrode 8 from the same side as the P-side electrode, a part of the surface of the crystal-grown LD chip 31 is removed, and the N-side electrode 8 is formed on the N-type cladding layer 2. Regarding the P-side electrode 7, the solder bump 1
The wire bonding portion is formed avoiding the position 4. The metal film 13 on the substrate 1 side is the LD chip 3
1 is introduced for fixing via the solder bumps 14.

The assembly in the embodiment is performed as follows. First, five LD chips 31 as described above are stacked on the silicon mount 21 so that the emission side end faces are aligned as shown in FIG. AuSn flux is vapor-deposited on the surface of the silicon mount 21 in advance. Next, the LD chip 31 is heated while being pressed against the silicon mount 21, and the solder bump 14 and the AuSn flux are once melted and then cooled, and the LD chips 31 of the silicon mount 215 are simultaneously fixed. Such a flip chip mounting method using the solder bumps 14 is described in, for example, the 1993 Spring Meeting of the Institute of Electronics, Information and Communication Engineers SC-2-5. afterwards,
This is fixed to an appropriate package, and the wire 51 is bonded.

With a little supplement, in the embodiment ,
As described in the supplement of the reference example , an LD array or the like can be used. In addition, the content described in the supplement of the reference example is applicable to LD chips of other materials other than InP.
The same applies to the embodiments.

[0020]

According to the present invention, a plurality of LD chips are compactly integrated, a high-output pulse LD module having a small total light emitting area, and a pulse current drive circuit can be burdened by independently driving each LD chip. Can be reduced,
A high output pulse LD module can be realized.

[Brief description of the drawings]

FIG. 1 is a schematic diagram showing a reference example .

FIG. 2 is a schematic diagram showing a specific structure of the LD chip of FIG.

FIG. 3 is a schematic diagram showing an embodiment of the present invention.

FIG. 4 is a schematic diagram showing a specific structure of the LD chip of FIG. 3;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 N-type cladding layer 3 Active layer 4 P-type cladding layer 5 Contact layer 6 Dielectric layer 7 P-side electrode 8 N-side electrode 9 Flux material 10 Low reflection film 11 High reflection film 12 Light emitting area 13 Metal film 14 Solder bump 20 , 21 Mount 30, 31 LD chip 40, 41 Total light emitting area 50, 51 Wire

 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-6-283807 (JP, A) Autumn 1993 (1993) The 54th Annual Conference of the Japan Society of Applied Physics 1063 30 aH-10 “Multi-beam type high power pulsed laser diode (LD) by epitaxial growth”

Claims (3)

(57) [Claims] 1. A plurality of laser diode chips are stacked close to each other and electrically insulated,
And the light emitting region of each of the laser diode chip product
A high-power pulsed laser diode module, which is arranged so as to substantially overlap each other in a layer direction . 2. A laser diode according to claim 1.
Chip is a flip chip mounting method using solder bumps
High power pulse characterized by being laminated by
Laser diode module. 3. The laser diode chip according to claim 1,
P-side electrode and N-side electrode of the tip are formed on the same side
And the individual electrodes of the laser diode chip
Arrange at least partly so that they do not overlap each other in the stacking direction.
High power pulsed laser die
Aether module.