JP2576799B2 - Lead frame for semiconductor integrated circuit device and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame used for a semiconductor integrated circuit device and a method of manufacturing the same, and more particularly, to a structure and a manufacturing method using an insulator as a core material of a lead frame to minimize the use of a conductor.

[0002]

2. Description of the Related Art A semiconductor integrated circuit lead frame first supplies a drive power supply and an electric signal to a semiconductor integrated circuit chip, and supplies an electric signal obtained as a result of operation in the semiconductor integrated circuit chip to the outside. The conduction function, second, the function of improving the inner bonding property to facilitate the connection between the semiconductor integrated circuit chip and the semiconductor integrated circuit lead frame, and third, the molded semiconductor integrated circuit device on the mounting substrate The outer lead style holding function of standing on the position, the outer lead mountability improving function of making it easy to connect the semiconductor integrated circuit device to the mounting board, and the fifth, the productivity improvement of the semiconductor integrated circuit device Therefore, a semiconductor integrated circuit device holding function of connecting individual lead frame patterns is required.

For this reason, a description will be given with reference to a perspective view of a conventional typical lead frame shown in FIG. 21 and a longitudinal sectional view of a conventional typical semiconductor integrated circuit device shown in FIG.
A conventional lead frame for a semiconductor integrated circuit uses an iron-based or copper-based metal as a material of the lead frame 113 in order to satisfy the first function, and to satisfy the third function. Metals such as iron and copper are bent 114 so that they conform to the shape of the unified standard for semiconductor integrated circuit packages established by organizations such as SEMI. Depending on the thickness, the lead coplanarity of the outer lead 115 and the lead skew (S
In order to satisfy the condition (kew), it was necessary to select and use a high-strength type in the metal. In addition, in order to satisfy the fifth function, initially the lead frame metal itself,
Top rail 116, bottom rail 117, side rail 118, dam bar 119, inner lead suspension 12
The inner lead 122, the outer lead 115, and the die pad 12
The three or the like are connected to each other to maintain a positional relationship with each other, and finally, these connected portions are cut off to realize a semiconductor integrated circuit device.

[0004] FIG. 23 is a diagram illustrating the read coplanarity and the read skew.

In order to satisfy the second function, the lead width of the inner area 124 of the inner area 122 is usually set to 200 μm or more, and the surface of the area is covered with gold or silver. In order to satisfy the fourth function, it is necessary to cover the surface of the outer lead 115 with solder or the like.

[0006]

In order to realize the first electric conduction function, the third outer lead style holding function, and the fifth semiconductor integrated circuit device holding function, for example, a metal material such as Yamaha HT-BRONZ
EFTEC6 manufactured by Furukawa Electric Co., Ltd.
Although a 4T material has been used, since it is basically a metal material, even if the material processing method is devised, it is not possible to connect the respective outer leads with the lead frame forming material itself.

[0007] Therefore, when the connecting portions of the inner lead, the outer lead, the die pad, and the like are cut off, the positions of the inner lead, the die pad, and the like embedded in the mold resin rarely change extremely. Since the leads are exposed to the outside of the mold, there is a problem that the leads are deformed by external stress, which leads to a poor soldering due to irregularities in the tips of the leads.

[0008] In response to this, for example, there has been a semiconductor integrated circuit device provided with a resin guard ring outside the outer lead, but there has been a problem that goes against the trend of light and thin and small.

Japanese Unexamined Patent Publication (Kokai) No. 64-4054 discloses a structure in which an insulating material is bonded to a lead frame to reduce a change in shape. However, the position where the insulating material is fixed is the intermediate position of the outer lead. Therefore, there is a problem that the coplanarity at the tip of the lead cannot be completely prevented. (See FIG. 1 of JP-A-64-4054.) JP-A-2-174240 discloses a structure in which outer leads of a TAB tape are reinforced with copper foil to prevent terminal bending. Since the foil has a higher density than the insulator core, there is a problem that the weight of the entire product increases with outer leads having the same thickness. Further, when the thickness of the outer lead is reduced, the reinforcing effect is reduced, so that there is a problem that coplanarity and skew increase. (See FIG. 1 (b) of Japanese Patent Application Laid-Open No. 2-174240) Also, Japanese Patent Application Laid-Open No. 2-20564 discloses a structure in which a bent portion of a lead frame is reinforced with a mold to prevent deformation. The idea of forming the frame itself with an insulating material is not disclosed. (See FIG. 2 of Japanese Patent Application Laid-Open No. H2-205064) As another problem, since the thickness of the lead from the inner lead to the outer lead is basically the same in the above-described structure, a design in which lead routing is the densest is provided. There is a problem in that the degree of freedom is reduced or a structure that is not suitable for inner lead bonding occurs even if the design can be performed.

This is because the conventional method of manufacturing a lead frame is a pressing method using a mold or an etching method using a mask. In the case of the etching method, there is a problem that the etching can be performed only up to about 0.5 times the lead thickness assuming that etching is performed from both the front and back surfaces.

On the other hand, the technique disclosed in Japanese Patent Application Laid-Open No. Hei 2-134857 has a structure in which a semiconductor integrated circuit chip is mounted on an insulating substrate and the substrate is connected to a lead frame via terminals. In this structure, since the conductor pattern on the insulating substrate and the outer lead are connected only at the mold sealing end face portion, the semiconductor integrated circuit due to mold resin warpage or the like of the semiconductor integrated circuit device is compared to the integrally molded lead frame. There is a problem that the force against the internally generated stress in the package is weak. In addition, when a conductor pattern on an insulating substrate is formed by a printing method, the adhesion strength between the insulating substrate and the conductor pattern is low, and the strength between the conductor patterns is low, which is also caused by mold resin warpage of a semiconductor integrated circuit device. There has been a problem that the force against the internally generated stress in the semiconductor integrated circuit package is weak.

The present invention provides the above-mentioned functions that the lead frame for a semiconductor integrated circuit device should have, namely, an electrical conduction function, an inner bonding property improving function, an outer lead style holding function, an outer lead mounting property improving function, and a semiconductor integrated circuit. Provide the structure of the lead frame having each function of the device holding function and its manufacturing method, and lead coplanarity and lead
The purpose is to prevent skew.

[0013]

In order to achieve the above object, a lead frame used in a semiconductor integrated circuit device according to the present invention comprises an insulator core in which a lead, an island and a lead outer frame are integrally formed, and at least an insulating core. It includes a conductor portion formed on the lead portion on the surface of the body core, and a bent portion formed on the lead portion.

Preferably, the insulator core is made of a resin-based resin.

As a method of manufacturing a lead frame, a step of integrally molding a lead, an island and a lead outer frame with an insulator, a step of attaching a conductor to at least a lead portion on the surface of the insulator, And a bending step.

Also, as a method of manufacturing a lead frame, a step of integrally forming a bent lead, an island having dimples, and a lead outer frame with an insulator is provided. And a step of adhering the same.

Further, the step of attaching a conductor to the lead portion on the surface of the insulator may use any one of a vacuum deposition method, a chemical plating method, a cladding method, and a bonding method.

Further, when forming the lead frame core material by any one of cutting, injection molding, compression, and transfer molding, a vacuum deposition method, a chemical plating method, a cladding method, and a bonding method are used. The conductor formed by any one of the methods is kept in contact with the bump of the semiconductor integrated circuit chip having the bump, and the conductor is exposed on the surface of the semiconductor integrated circuit device. It may be sealed.

A step of forming a lead, an island, and a lead outer frame to be processed by any one of cutting, injection molding, compression, and transfer molding. Attaching a conductor to a lead portion on the surface of an insulator by any one of a method, a chemical plating method, a cladding method, and a bonding method, and a semiconductor integrated circuit having the formed conductor as a bump. A step of exposing the conductor to the surface of the semiconductor integrated circuit device and simultaneously sealing the conductor while keeping the conductor in close contact with the bump of the chip.

It is preferable that the lead frame is made of the same kind of insulating material as the sealing resin of the semiconductor integrated circuit as the insulating material of the core material of the lead portion.

Further, using the same type of resin insulating material,
A method for manufacturing a lead frame including a step of forming a lead portion and sealing a semiconductor integrated circuit is preferable.

Further, the outer lead portions overall cross-sectional shape including the outer lead tips, in the range of the lead frame with hexagon having mounting substrate surface parallel to the surface is effective.

Further, the cross-sectional shape of the entire outer lead portion including the tip of the outer lead has a trapezoidal shape having a surface parallel to the surface of the mounting substrate and a shorter side facing the surface of the mounting substrate.
It is possible to obtain a lead frame having the following configuration.

[0024]

[Function] By forming the lead frame into a multilayer structure as described above, the surface metal material layer plays only the role of the electrical conduction function, the function of improving the inner bonding property, and the function of improving the mounting property of the outer lead. Has clarified the role of each layer, such as having the outer lead style holding function and the semiconductor integrated circuit device holding function when integrally molded.

As a result, since the lead thickness of the conventional lead frame is divided into layers, the thickness of each layer becomes thinner, so that the fine pitch lead pattern formability by the pressing method can be improved, and the insulation of the inner layer can be improved. Since the core is encapsulated and molded, the cross section of the lead can be freely changed from a simple square to a hexagon.

Further, since the insulator is present in the core, the insulator is left between the leads, thereby acting to fix the relative positions of the inner lead, the outer lead, the die pad and the like in the lead frame.

[0027]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a perspective view of a lead frame according to an embodiment of the present invention. The lead frame has an inner lead 02 and a bent outer lead 03 on an insulating film 01. Note that the outer leads 03 are formed above and below the insulator film 01, and the outer leads on each side are connected to the inner bent portion 04, the outer bent portion 05, and the outer suspension portion 06. In addition, all the outer leads are connected at the outer peripheral portion 07 of the mold.

The manufacturing method of the lead frame of this embodiment is as follows.
This will be described with reference to FIGS.

FIGS. 2 and 3 show flowcharts. 80 μm thick polytetrafluoroethylene (Po
lytetrafluoroethylene: PTF
E) The film 01 is punched out with a mold 08 as shown in FIG. 3A, and as shown in FIG. 4, a die pad 09, a mold outer peripheral portion 07, an inner bent portion 04, an outer bent portion 05, an outer hanging portion 06, and adjacent patterns. The connecting part 10 is formed. At this time, it is necessary to make the width of the slot 11 sufficiently large. In this case, the thickness of the insulating film 01 is designed to be about 10 times. In each of the longitudinal sectional views of FIG. 3, the film clamp mechanism is omitted for the sake of simplicity, but is actually used to ensure dimensional accuracy.

Subsequently, as shown in FIG. 3B, cutouts 12 and 13 were formed in the bent direction of the inner bent portion 04 and the outer bent portion 05 with a blade as shown in FIG. The angles of the notches 12 and 13 are determined when the outer lead is bent.
It was designed so that both sides could contact. The design value of the present embodiment is 20 ° at the notch 12 and 18 ° at the notch 13.
°. The notch depth was cut so that the remaining insulator film thickness was greater than 0 μm and 5 μm or less.

Thereafter, the PTF having the notches 12 and 13
The insulator film 01 made of E is put into a closed container 14 made of quartz glass having a “U” shape as shown in FIG. 6, and the atmosphere in the container 14 is evacuated to a vacuum degree of 10 ⁻⁴ Pa, and then renewed. Hydrazine gas (N ₂ H ₄ ) was introduced into the container 14 so that the pressure became 10 ^-1 Pa.

In parallel with this, the lead frame pattern to be formed is developed according to the third trigonometric method, and the pattern on each side is drawn in a positive pattern on quartz glass, and the surface pattern mask 15 in FIG. The back surface pattern mask 16, the side surface pattern mask 17 in FIG. 9, and the like were formed.

FIG. 10 shows an example of a lead frame created using the changed mask. In the embodiment of FIG. 10, a conductor 19 of electroless nickel plating is formed on the die pad 08 by using a method of forming a lead pattern described later.

Incidentally, when only the inner lead pattern is different in the same PKG, the mold 08, the back surface pattern mask 16 and the side pattern mask 17 can be shared by the same object, and only the front surface pattern mask 15 needs to be changed. Was completed.

Then, these masks were set as shown in FIG. 6 and adjusted so that the laser light 18 was applied to the position on the insulator film 01 where the conductor was to be formed. At this time, the masks 15 to 16 and the insulator film 01 are used to prevent the occurrence of “fog” or the like.
Were set in parallel, and the masks 15 to 17 and the laser beam 18 were set vertically. Also, the side pattern mask 17
Of the insulating film 01 in the slot 11 and the slot 11 so that the laser light 18 is irradiated on the side surface of the insulating film 01 through the through hole and the laser light 18 is not irradiated on the insulating film for forming the adjacent pattern. The flexion had to be adjusted.

Thereafter, excimer laser is applied to the masks 15 to
And selectively irradiating on insulator film 01 through 17;
Selectively hydrophilize the insulator film 01,
Electroless plating was performed thereon. The process will be described in detail with reference to FIG.

First, as shown in FIG. 11A, when the insulating film 01 made of PTFE is exposed to N ₂ H ₄ gas having a degree of vacuum of 10 ⁻¹ Pa, N ₂ H ₄ is adsorbed on the surface of the PTFE. When an ArF excimer laser having a wavelength of 193 nm is irradiated thereon as shown in FIG. 11 (b), Akira Yabe, Director of Laser Reaction Laboratory, National Institute for Materials Science and Technology, reported that the 32
As described in Vol. 10, No. 10, pp. 696-698, the following reaction proceeds and the active chemical species N ₂ H ₃ ,
NH or NH ₂ is generated.

H ₂ N—NH ₂ → N ₂ H ₃ + H N ₂ H ₃ → NH + NH ₂ H ₂ N—NH ₂ → 2NH ₂ These species react on the surface of PTFE, causing a change in the chemical structure, Amino groups are selectively formed on the surface of the PTFE insulator film 01.

Next, as shown in FIGS. 11 (c), (d) and (e), the insulating film 01 was added to the aqueous solution of hydrochloric acid-tin chloride.
After activating the surface by exposure to water, immersion in an aqueous solution of palladium chloride to precipitate palladium ions on the active portion, and then, using the deposited palladium as a nucleus, a conductor 19 mainly composed of electroless nickel is formed as shown in FIG. ) And selectively formed on a PTFE insulating film as shown in FIG.

Next, as shown in FIG.
With the clamp (I) 20 on the insulator film of the inner bent portion 04 not provided with the conductor, and with the clamp (II) 21 on the insulator film of the outer bent portion 05 without the conductor 19,
The clamp (I) is held so that the notch 12 and the notch 13 are closed by holding the insulator film of the outer hanging portion 06 without the conductor 19 on the insulator film by the clamp (III) 22.
The clamp (II) 21 and the clamp (III) 22 were moved while 20 was fixed.

Subsequently, as shown in FIG. 3 (e), while holding the insulating film so that the notches are closed,
The electrode 23 is brought into contact with the conductor 19 on the outer periphery of the mold,
A 1 μm thick electrolytic nickel plating 24 was applied.
As shown in (f), the electrode 25 is not located in the outer lead portion or the
And gold plating 26 was applied.

FIG. 1 is a perspective view of the completed lead frame.
FIG. 3 (g) shows a partial longitudinal sectional view. FIG. 13 is a perspective view of a semiconductor integrated circuit device manufactured using this embodiment. As is apparent from these figures, the lead frame of the present invention is plated with the tip of the outer lead and the bottom 27 of the bent portion of the outer lead. Not only is there no inferiority, but because the thickness of the outer lead is thin, there is less heat escape at the meniscus portion, and the meniscus suction is better than that of the metal outer lead product on the entire surface. Since the strength of solder mounting on the board largely depends on the bottom 27 of the bent portion of the outer lead, no substantial difference from the conventional lead frame product was observed.

Since no conductor is present on the side surface 28 of the outer lead, no solder meniscus is formed at the time of mounting. However, when the width of the land on the substrate side and the width of the outer lead are unified, a positional displacement check after mounting is performed. Has also become easier to perform from above.

Since a conductor is also formed on the outer lead tip 29, a solder meniscus is also formed on the outer lead tip when mounting the board. There was no.

In addition, since the outer leads on each side are connected by the external suspension portions 06, the deformation of the outer leads due to external force is smaller than that of the conventional product.

Of course, the thickness of the outer lead can be adjusted by the thickness of the insulator film and the thickness of the plating, and the width of the outer lead can be adjusted by the insulator film punching die and the laser beam mask. On the user's side, it could be used as good as conventional products.

Next, a second embodiment will be described.

FIG. 14 is also a perspective view of a lead frame according to an embodiment of the present invention. The lead frame has an inner lead 02 having the same insulator as a core and a bent outer lead 03 on an insulator molding 30. Has become. Note that outer lead 0
3 is in the fully enclosed shape conductor 32 around the insulating core 31 of the cross-sectional shape has a hexagonal, or One outer lead portion.

In this embodiment, as a method of forming a conductor pattern on the core of an insulator lead frame, the surface of the insulator used as the core of the lead frame used in the previous embodiment is directly modified and only the same portion is formed. It has been confirmed that the method can be realized also by a method of forming a conductor, but an example in which the method is dared by another method will be described.

The manufacturing method of the lead frame of this embodiment is as follows.
This will be described with reference to FIGS.

FIG. 15 is a perspective view of a mold used in the present embodiment, and FIG. 16 is a flowchart of the present embodiment. FIG.
As shown in FIG. 16 (a), the upper die 33 is made of a cemented carbide for the main body, and after a PTFE coating 35 is applied to the entire surface of the upper die 33 for about 10 μm, the lead frame pattern 36 to be pointed is formed to a depth of 60 μm. The lead width is set to 10μm between the surface width and the depth. Also, the tip of the outer lead is engraved in a mold whose depth is set back by 10μm on the inner side from the surface, exposing the surface of cemented carbide, and the electrode 37 is also coated with PTFE. Is removed to expose the surface of the cemented carbide.

Next, as shown in FIGS. 15 and 16 (b), a convex pattern 39 is formed on the PTFE block 38 so as to fit into the lead frame pattern 36 without any gap, and faces the surface facing the convex pattern 39. The oblique side 40 of the PTFE block was machined so as to be narrowed down.

Next, as shown in FIG.
The top of the convex pattern 39 of the block 38 was completely fitted into the lead frame pattern 36 on the upper mold 33.

After that, the upper mold 33 in which the PTFE block 38 is fitted is immersed in an aqueous solution of electroplating to have a thickness of 0.05 μm.
A silver plating 41 having a thickness as thin as possible, a copper plating having a thickness of 1 μm or more and a nickel plating 42 having a thickness of 5 μm were applied as follows. These silver plating 41 and copper and nickel plating 42
As shown in FIG. 16 (d), since PTFE has water repellency and is also an insulator, the cemented carbide was selectively deposited only on the exposed lead frame pattern 36.

In parallel with this, FIGS. 15 and 16 (e)
As shown in the figure, the lower mold 43 is made of a cemented carbide for the main body and is cut into a concave pattern having a two-step flat surface of an intermediate surface 44 and a bottom surface 45.

The intermediate surface 44 has a bottom surface 45 so as to face the most convex surface of the upper mold 33 itself with a clearance of 150 μm.
Is set so as to be parallel to the most convex surface of the PTFE block fitted in the upper mold 33.

Incidentally, since the bottom surface 45 and the oblique side (I) 46 also serve as the outer surface of the semiconductor integrated circuit product, it is considered that the lower surface 45 and the oblique side (I) 46 conform to the outer shape defined by SEMI or the like.
Also, the non-engraved oblique side (II) 47 of the lower mold is adjusted so as to be in close contact with the non-engraved oblique side 48 of the upper mold.

A gate 49 for pouring an insulator is provided at one corner of the lower mold 43.

Thereafter, a PTFE coating 50 is applied to the entire surface by about 10 μm, and the upper mold 33 and the lower mold 43 are further coated.
When the lead frame pattern 3 of the upper mold 33 is
The outer lead frame pattern 51 was engraved on the lower mold 43 so as to conform to No. 6, exposing the ground surface of the cemented carbide. The outer lead frame pattern 51 has a depth of 60 μm and a lead width of the surface width−the depth = 10 μm. The tip of the outer lead is engraved in a mold whose depth is set back by 10 μm toward the inner side from the surface to form a ground surface of a cemented carbide. Is exposed.

The PTFE coating is also removed from the electrode 52 to expose the surface of the cemented carbide.

Thereafter, the lower mold 43 was immersed in an electroplating aqueous solution, and silver plating 53 having a thickness as small as 0.05 μm or less, copper plating having a thickness of 1 μm or more and nickel plating 54 having a thickness of 5 μm were applied. These silver plating 53 and copper,
The nickel plating 54 is made of PT as shown in FIG.
Since FE has water repellency and is an insulator, the cemented carbide was selectively deposited only on the exposed outer lead frame pattern 51.

Subsequently, as shown in FIG.
3 and the lower mold 43 are combined, and the glass transition point temperature is 230 ° C.
The thermosetting epoxy resin 55 containing the silicon filler heated as described above was injected from the gate 49 and kept at 200 ° C. for 10 hours.

Then, the silver platings 41 and 53 diffuse to the copper and nickel platings 42 and 54, and holes are generated at the interface between the upper and lower dies 33 and 43 and the copper and nickel platings.
Since the adhesion between the copper and nickel platings 42 and 54 and the upper mold 33 and the lower mold 43 decreases, and PTFE has water repellency, the adhesion between PTFE and the epoxy resin is low.
As shown in FIG. 16 (h), nickel,
The copper plating layers 42 and 54 were transferred, and the lead frame 56 could be removed from the mold.

As shown here, the lead frame of the present embodiment uses a mold and is molded integrally by injecting a resin. Therefore, the shape of the mold is finely modified so that the outer lead core is hardened at room temperature and then cured. The generated coplanarity and skew were completely prevented.

Thereafter, the lead frame 56 is immersed in an electroless nickel solution and an electroless gold plating solution, and selectively has a thickness of 1 mm on the nickel and copper plating layers as shown in FIG.
A μm nickel plating layer 57 and a 0.5 μm thick gold plating layer 58 were formed.

FIG. 14 shows the shape of the finally completed lead frame.

FIG. 17 shows a completed vertical sectional view of a semiconductor integrated circuit device using the lead frame prepared in this embodiment.

The lead frame 59 created in this embodiment
The nickel and copper layers 60 are coated on a thermoplastic epoxy resin 55 containing a silicon filler, and a nickel coating layer 57 and a gold coating layer 58 are formed thereon.

The semiconductor integrated circuit chip 61 is heated and fixed on the bottom surface of the lead frame 59 via the silver-containing epoxy paste 62. Using a gold wire 63 having a diameter of 30 μm,
The terminal 64 on the semiconductor integrated circuit chip 61 and the bonding area 65 of the inner lead on the lead frame 59 are connected by the ultrasonic combined thermocompression bonding method, and the bottom surface 45 and the oblique side (I) 46 of the lead frame 59 are used as one side receiving mold. Using a mold on the other side, a thermosetting epoxy 66 containing a silicon filler having a glass transition point of 220 ° C.
It was prepared by injecting at a temperature of not more than ° C.

[0070] The semiconductor integrated circuit device of this embodiment, since the cross-sectional shape of the outer lead is hexagon, conventional cross-sectional shape as compared to the square of the outer lead parts, when mounted on the substrate using solder, The meniscus formed on the tip and side surfaces of the outer leads was large, and thus the improvement of the position correcting force of the semiconductor integrated circuit device due to the surface tension of the solder was observed. FIG. 18 is a longitudinal sectional view showing how the meniscus of the outer lead portion is formed at the time of mounting the substrate. Solder is screen-printed using a 50 μm-thick metal mask on the solder leveled lands 67 on the mounting board, and the semiconductor integrated circuit device of this embodiment is placed thereon, and is placed in a belt furnace at a maximum temperature of 230 ° C. Was soldered. It was found that the meniscus 68 of the solder evenly wrapped under the lower oblique side of the outer lead to form a fillet. In the semiconductor integrated circuit device of the present embodiment, since the amount of solder fillet existing on the left and right sides of the lower surface of the outer lead is large, the tension of the solder seems to be greater than that of the conventional lead frame and acts on the outer lead. It was observed that the degree of position correction of the semiconductor integrated circuit device by solder was higher than that of the conventional product.

In the drawings of the present embodiment, the outer lead is bent upward, but a mold for bending the outer lead downward is also prepared, and it is confirmed that the mold can be formed in the same manner.

Next, a third embodiment will be described.

FIG. 19 shows a manufacturing process of a lead frame in which the technique of the second embodiment is further advanced.

In this embodiment, as in the previous case, the surface of the insulator is modified with a laser beam to selectively form a conductor pattern, or the mold is partially covered with an insulator to selectively form the conductor. We confirmed that it could be formed even by depositing a pattern, but we report it because it was carried out by another method.

As shown in FIGS. 19A and 20, a lead frame pattern 70 having a depth of 50 μm, a depth of 100 μm at the top and a width of 80 μm at the bottom, and a surface cover sheet piece 106 are formed in the encapsulating lower mold 69 made of cemented carbide. The upper adhesive wrap hole 75 was formed, and a release material was applied as a whole.

Separately, as shown in FIG. 19B, an 18 μm-thick nickel conductive foil 71 coated with a 0.1 μm-thick gold plating over the entire surface is provided on the inner lead 72 of the inner lead 72 of the lower mold 69. A mold having a size that can be widened so that there is no gap or space between the bottom 73 and the outer end surface 74 of the outer lead tip oblique side, the bottom 77 and side 78 of the outer lead oblique 76, and the bottom 80 and side 81 of the outer lead horizontal surface 79. 82 and 83 were used for release.

Subsequently, the mold 83 on which the conductive foil 71 is placed is pushed up, and as shown in FIG. 19C, the outer end face 74 and the side face 75 of the outer lead tip oblique side of the encapsulating lower mold 69, and the outer lead oblique side 76 are formed. Electromagnetic block with vacuum chuck (I) having a surface that can fit into the bottom surface 77 and the side surface 78 and the bottom surface 80 and the side surface 81 of the outer lead flat portion 79.
84 and a block (II) 85 made of an electromagnet with a vacuum chuck having a surface that fits into the bottom 73 of the inner lead 72 of the inner lead 72 of the enclosing mold 69, and fixed by using an electromagnet and vacuum suction.

Next, block (I) 84 and block (I)
I) 85 is simultaneously moved onto the lower mold 69, and FIG.
As shown in (d), the block (I) 84 and the block (II) 85 were simultaneously lowered so that the conductive foil 71 attached to the block (II) 85 fit into the bottom 73 of the inner lead.

Thereafter, the vacuum attraction of the block (I) 84 is turned off while the electromagnet and the vacuum attraction of the block (II) 85 are operated, and as shown in FIG.
Only the conductive foil 71 is moved down so that the outer end surface 74 and the side surface 75 of the outer lead tip oblique side, and the outer lead oblique side 7
6, bottom surface 77 and side surface 78, outer lead horizontal surface portion 79
It was fitted to the bottom surface 80 and the side surface 81 of the な が ら while bending.

Next, block (I) 84 and block (II)
Block (I) 84 and block (II) 85 while turning off the electromagnets of 85 and blowing out air from the vacuum chuck section.
FIG. 19 (f) shows a state where is raised.

In this state, since the outer leads are easily deformed, reinforcement is made with a thermoplastic epoxy resin which is an insulator. However, since this thermoplastic epoxy is a substance that has been used for sealing semiconductor integrated circuit devices,
In the present embodiment, the semiconductor integrated circuit device was sealed while reinforcing the outer leads.

FIG. 19 (g) is a partial vertical sectional view of a semiconductor integrated circuit wafer 86, on which aluminum terminals 87 are formed. By bonding a gold wire 88 having a diameter of 30 μm to a terminal 87 on the wafer 86 by a thermocompression bonding method using ultrasonic waves using a capillary 89, the gold ball 9 is formed.
0 was fixed on the terminal 87. Thereafter, the gold wire 88 is picked by the clamp 91, and the capillary 89 is moved in the horizontal direction.
A gold wire 88 was cut directly above the gold ball 90, a gold ball bump 92 was formed as shown in FIG. 19 (h), and the wafer was cut with a dicer to produce a semiconductor integrated circuit chip 93 as shown in FIG. 19 (i).

Subsequently, as shown in FIG. 19 (j), the gold ball bump 92 on the semiconductor integrated circuit chip 93 was mounted on the conductive foil 71 in the engraved portion of the inner lead 72 of the encapsulating lower die 69. .

As shown in FIG. 19 (k), a 50 μm-thick PTF is
An E film 95 is formed. The outer lead flat surface portion 96 of the encapsulation upper die 94 includes an outer lead horizontal surface portion 79 of the encapsulation lower die 69 and an outer lead oblique side portion 97 of the encapsulation upper die 94.
The depth of the engraving plane 98 in the outer lead flat part 96 and the depth of the engraving hypotenuse 99 in the outer lead oblique part 97 are sealed. The lower mold 69 was calculated and created so as to be 125 μm away from the bottom surface 77 of the outer lead oblique side portion 76 and the bottom surface 80 of the outer lead horizontal surface portion 79.

The length of the ceiling portion 100 of the encapsulating upper die 94 is equal to or longer than the maximum length of the semiconductor integrated circuit device to be mounted, and a vacuum chuck is provided at the center of the ceiling portion 100.

The thickness of the lower surface is 50 μm, which is physically roughened.
Mold 102, 10 so that the polyimide sheet 101 of FIG.
3 was cut using the polyimide sheet piece 104 shown in FIG.
As shown in FIG. 9 (l), the polyimide sheet piece 104 is inserted into the encapsulating upper mold while being placed on the mold 103, and the
At the time of contact with 00, the polyimide sheet piece 104 was fixed to the ceiling 100 by vacuum suction as shown in FIG.

The ceiling height of the encapsulation upper mold 100 is determined by the clearance formed when the encapsulation upper mold 94 having the polyimide sheet piece 104 attached thereto and the encapsulation lower mold 69 are combined. Polyimide sheet piece of upper mold 94> Thickness of semiconductor integrated circuit chip 93 excluding gold ball bump 92 and inner lead conductor surface on lower mold 69-Polyimide sheet piece of upper mold 94 <Including gold ball bump 92 The value satisfies the two equations of the thickness of the semiconductor integrated circuit chip 93.

Thereafter, the encapsulation lower mold 69 on which the semiconductor integrated circuit chip 93 with the gold ball bumps 92 is mounted and the encapsulation upper mold 94 with the polyimide sheet piece 104 are mounted as shown in FIG.
And pressurized. Then, the semiconductor integrated circuit chip 93 is pressed by the polyimide sheet piece 104 attached to the encapsulation upper die 94, and the gold ball bumps 92 formed on the semiconductor integrated circuit chip 93 are moved to the encapsulation lower die 69.
The gold-plated inner lead conductor placed on top is pressed more strongly, and the conductivity can be reliably ensured.

Subsequently, a thermosetting epoxy resin 105 containing a silicon filler having a glass transition temperature of 230 ° C. was pushed into a space between the lower mold 69 and the upper mold 94 and was cooled and cured. Since the semiconductor integrated circuit chip 93 is securely sandwiched between the encapsulation lower mold 69 and the encapsulation upper mold 94, the position does not shift even when the thermosetting epoxy resin 105 containing silicon filler is pressed at high speed.

FIG. 19 (p) shows a vertical sectional view of the semiconductor integrated circuit device 106 after being removed from the encapsulation type.

The cross-sectional shape of the outer lead of this embodiment is as follows.
The conductor-attached lower surface has a short side, and the conductor-attached side surface has a trapezoidal shape bulging upward.

In the semiconductor integrated circuit device 106 shown in FIG. 19 (p), since the conductors 71 having a fine pitch are exposed on the bottom surface 107, there is a large risk of short-circuiting due to dust or the like.

Therefore, the bottom 1 of the semiconductor integrated circuit device 106
As shown in FIG. 19 (q), a polyimide sheet 1 with an 18 μm-thick adhesive whose surface was physically roughened to cover
08, the company name, product name, lot number, and the like are printed using the transfer roller 109, and as shown in FIG. As shown in FIG. 19 (s), the piece 112 is pressed against the bottom surface 107 of the semiconductor integrated circuit device 106, and is instantaneously heated to 220 ° C. using an electromagnetic induction method to melt the adhesive and melt into the hole 75. Thus, the polyimide sheet piece 112 was attached to the bottom surface 107 of the semiconductor integrated circuit device 106.

FIG. 19 (t) shows a longitudinal sectional view of a completed shape of the semiconductor integrated circuit device.

As shown here, in the present embodiment, a mold is used, and the resin is injected and the package is simultaneously molded at the same time. The coplanarity and skew generated in the outer lead core later were completely prevented.

As a modification of this embodiment, a glass transition temperature of 250 in a semi-cured state is used instead of the polyimide sheet.
When production was attempted using a thermoplastic epoxy resin piece at a temperature of ° C, no problem occurred.

Although the three embodiments have mainly been described above, it is further added that, as a method of forming a core material of a lead frame for a semiconductor integrated circuit, there are cutting, injection molding, compression, and transfer molding. Next, as a method of attaching a conductor, the conductor can be formed by a vacuum deposition method, a chemical plating method, a cladding method, a bonding method, or the like.

[0098]

As described above, the present invention employs a multilayer structure in which a conductor material is disposed on the surface of a lead frame and an insulator is disposed on a lead frame core and a suspension between leads. It produces the following effects.

That is, an electric conduction function of supplying a drive power supply and an electric signal to the semiconductor integrated circuit chip and supplying an electric signal obtained as a result of operation in the semiconductor integrated circuit chip to the conductor of the lead frame, It has an inner bonding property improving function to facilitate connection between the semiconductor integrated circuit chip and the semiconductor integrated circuit lead frame, and an outer lead mounting property improving function to facilitate connection between the semiconductor integrated circuit device and the mounting substrate. In addition, the insulator has an outer lead style holding function in which the molded semiconductor integrated circuit device is erected at a predetermined position on the mounting substrate, and individual lead frame patterns are provided for improving the productivity of the semiconductor integrated circuit device. The function of holding the semiconductor integrated circuit device, For example, the degree of freedom in designing a lead frame can be improved, for example, the formability of a fine pitch lead pattern by a pressing method can be improved, and the cross-sectional shape of an outer lead is not a square but an optimal shape when forming a meniscus at the time of mounting. In addition, by connecting the outer leads with the lead forming member itself, the external stress resistance can be improved. That is, in the first embodiment, since the outer leads on each side are connected by the external hanging portions, deformation of the outer leads due to external force is smaller than that of the conventional product. Since resin was injected using a mold and integrally molded, the coplanarity and skew generated in the outer lead core after curing at room temperature could be completely prevented by finely modifying the shape of the mold.

In addition, since the insulator used as the core material of the lead frame has a maximum specific gravity of about 2 at the maximum, it is more difficult than a conventional semiconductor integrated circuit device using a conductor having a density of about 8 ^g / cm ^3. It also has the effect of being lightly finished.

Further, with respect to the problem that the lead frame of the package for a semiconductor integrated circuit according to the above-described conventional example has a weak force against internal stress, as in the related art, at least a die pad to which the concept of the conventional lead frame is applied. The problem can be solved by integrally forming a part from the inner lead to the outer lead through the inner lead.

[Brief description of the drawings]

FIG. 1 is a perspective view of a lead frame according to an embodiment of the present invention.

FIG. 2 is a flowchart of one embodiment of the present invention.

FIG. 3 is a flowchart of one embodiment of the present invention.

FIG. 4 is a perspective view of a film after die-cutting according to one embodiment of the present invention.

FIG. 5 is a perspective view showing a film after cutting a bent portion of a film after die punching according to an embodiment of the present invention.

FIG. 6 is a longitudinal sectional view showing a positional relationship among a closed container, a laser beam mask, and a processed film used in the present invention.

FIG. 7 is a perspective view of a surface pattern mask.

FIG. 8 is a perspective view of a back surface pattern mask.

FIG. 9 is a perspective view of a side pattern mask.

FIG. 10 is a perspective view of an example of a lead frame created by changing a surface pattern mask.

FIG. 11 is a view showing a process for hydrophilizing / electroless plating a PTFE film.

FIG. 12 is a perspective view of a lead frame obtained by performing electroless plating on a film.

FIG. 13 is a perspective view of a semiconductor integrated circuit device manufactured using this embodiment.

FIG. 14 is a perspective view of a lead frame according to a second embodiment of the present invention.

FIG. 15 is a perspective view of a mold used in a second embodiment of the present invention.

FIG. 16 is a flowchart of a second embodiment of the present invention.

FIG. 17 is a completed vertical sectional view of a semiconductor integrated circuit device using a lead frame prepared in a second embodiment of the present invention.

FIG. 18 is a longitudinal sectional view showing how a meniscus of an outer lead portion is formed at the time of mounting the board.

FIG. 19 is a diagram showing a lead frame manufacturing process in which the method of the second embodiment is further advanced.

FIG. 20 is a perspective view of a mold used in Example 3.

FIG. 21 is a perspective view of a conventional typical lead frame.

FIG. 22 is a longitudinal sectional view of a conventional typical semiconductor integrated circuit device.

FIG. 23 is an explanatory diagram of a read coplanarity and a read skew.

[Explanation of symbols]

01 Insulator film 02,122 Inner lead 03,115 Outer lead 04 Inner bent part 05 Outer bent part 06 External suspension part 07 Mold outer peripheral part 08,82,83,102,103,110,111
Die 09,123 Die pad 10 Adjacent pattern connecting part 11 Slot 12,13 Notch 14 Sealed container 15 Front pattern mask 16 Back pattern mask 17 Side pattern mask 18 Laser light 19,32 Conductor 20 Clamp (I) 21 Clamp (II) 22) Clamp (III) 23, 25, 37, 52 Electrode 24, 57 Nickel plating layer 26 Palladium, gold plating layer 27 Bottom edge of outer lead bent portion 28 Outer lead side surface 29 Outer lead tip 30 Insulator molding 31 Insulator core 33 Upper mold 34 Mold main body 35,50 PTFE coating 36,70 Lead frame pattern 38 PTFE block 39 Convex pattern 40 Oblique side of PTFE block 41,53 Silver plating 42,54 Copper plating and nickel plating 43 Mold 44 Intermediate surface 45 Bottom surface 46 Oblique side (I) 47 Unengraved oblique side of lower mold (II) 48 Unengraved oblique side of upper mold 49 Gate 51 Outer lead frame pattern 55, 66, 105 Thermosetting epoxy with silicon filler Resin 56, 59, 113 Lead frame 58 Gold plating layer 60 Nickel, copper layer 61 Semiconductor integrated circuit chip 62 Epoxy paste containing silver 63, 88 Gold wire 64, 87 Terminal 65 Bonding area 67 Mounting board land 68 Solder meniscus 69 Enclosed lower mold 71 Nickel conductive foil plated with gold 72 Inner lead portion 73 Inner lead bottom 74 Outer end surface of outer lead tip oblique side 75 Adhesive wrap hole 76, 97 Outer lead oblique side 77 Bottom of outer lead oblique side 78 Outer lead oblique side Side of 79, 96 Outer lead flat portion 80 Bottom surface of outer lead flat portion 81 Side surface of outer lead flat portion 84 Block (I) 85 Block (II) 86 Semiconductor integrated circuit wafer 89 Capillary 90 Gold ball 91 Clamp 92 Gold ball bump 93 Semiconductor integration Circuit chip 94 Enclosed upper die 95 PTFE film 98 Engraved plane in outer lead plane 99 Engraved oblique side in outer lead oblique side 100 Ceiling 101 Polyimide sheet 104, 112 Polyimide sheet piece 106 Semiconductor integrated circuit device 107 Semiconductor integrated circuit device Bottom surface 108 Polyimide sheet with adhesive 109 Transfer roller 114 Bending 116 Top rail 117 Bottom rail 118 Side rail 119 Dam bar 120 Inner lead suspension 121 Da Pad hanging 124 co-India area

Claims (11)

(57) [Claims] A plurality of patterns on which die pads and leads are to be formed, wherein the patterns are chip-mounted;
In a lead frame in which wire bonding and sealing processing are performed, an insulator core in which a lead, an island, and a lead outer frame are integrally formed, a conductor portion formed at least on a lead portion on the surface of the insulator core, and a lead portion A lead frame comprising: a formed bent portion. 2. The lead outer frame includes at least the lead
2. The lead frame according to claim 1, wherein the lead frame is formed at a tip portion of the lead frame and the bent portion . 3. A method of manufacturing a lead frame, comprising: a step of integrally molding a lead, an island, and a lead outer frame with an insulator; a step of attaching a conductor to at least a lead portion on a surface of the insulator; Bending the lead frame. 4. A method for manufacturing a lead frame, comprising the steps of integrally forming a bent lead, an island having dimples, and a lead outer frame with an insulator, and forming a conductor on at least a lead portion on a surface of the insulator. Attaching a lead frame. 5. The method according to claim 3, wherein the step of attaching the conductor comprises one of a vacuum deposition method, a chemical plating method, a cladding method, and a bonding method. 6. When forming a lead frame core material by any one of cutting, injection molding, compression, and transfer molding, a vacuum deposition method, a chemical plating method, a cladding method, or a bonding method. A state in which the conductor formed by any one of the methods is kept in close contact with the bump of the semiconductor integrated circuit chip having the bump, and the conductor is exposed on the surface of the semiconductor integrated circuit device. The lead frame according to claim 1 or 2, further comprising a structure sealed by: 7. A step of forming a lead, an island, and a lead outer frame to be processed by any one of cutting, injection molding, compression, and transfer molding, and in this case, vacuum deposition. Method, chemical plating method, cladding method,
A step of attaching a conductor to a lead portion on the surface of the insulator, which is performed by any one of the attaching methods, and maintaining the formed conductor in close contact with the bump of the semiconductor integrated circuit chip having the bump. 5. The method of manufacturing a lead frame according to claim 3, further comprising: exposing the conductor to a surface of the semiconductor integrated circuit device while simultaneously sealing the conductor. 8. The semiconductor device according to claim 1, wherein the same insulating material as the sealing resin for the semiconductor integrated circuit is used as the insulating material for the core of the lead portion.
The lead frame according to claim 2 or 6. 9. The lead frame according to claim 3, further comprising a step of forming a lead portion and sealing the semiconductor integrated circuit by using the same resin insulating material. Production method. The 10. Outer lead tip outer lead portions overall cross-sectional shape including, claim 1, hexagon having mounting substrate surface parallel to the plane, according to claim 2, claim 6 or claim 8, wherein Lead frame. 11. A outer lead distal outer lead portions overall cross-sectional shape including, has a mounting substrate surface parallel to the plane, and the mounting substrate surface and a surface facing a trapezoidal shape and short sides <br 9. The lead frame according to claim 1, wherein the lead frame is a lead frame.