JP2023099435A - Semiconductor light emitting element, light emitting device and distance measurement device - Google Patents

Abstract

To provide a semiconductor light emitting element with high output and easy beam control in the far field while suppressing the voltage rise of the entire element.SOLUTION: A semiconductor element has a structure in which a substrate, a first reflector, a resonator section including an active layer, a second reflector, and a transparent conductive film are stacked in this order, and further comprises: a first current narrowing section composed of an oxidation narrowing layer; and a second current narrowing section composed of an insulating film formed on the top surface of the second reflector and having an opening and a contact portion between the transparent conductive film and the semiconductor layer to which the transparent conductive film is in contact, and the width d2 of the second current narrowing section is smaller than the width d1 of the first current narrowing section.SELECTED DRAWING: Figure 1

Description

The present invention relates to a semiconductor light emitting device, a light emitting device, and a distance measuring device.

VCSELs (Vertical Cavity Surface Emitting Lasers) have attracted attention as light sources for ToF (Time of Flight) type LiDARs (Light Detection and Ranging).

In order to improve ranging accuracy and measurable distance, a higher output light source is required.

As a method for achieving high output in a VCSEL, increasing the emission diameter is conceivable. However, simply increasing the diameter of the emitted light results in a decrease in the current density near the center of the diameter of the emitted light and an increase in the current density in the periphery. For this reason, simply increasing the diameter of the light emission poses problems in far-field beam control and durability.

Patent Document 1 discloses a substrate back emission type VCSEL in which a current confinement structure different from the oxidation confinement is provided on the substrate surface side. With this configuration, the current density can be increased not only at the periphery but also near the center of the emission diameter while increasing the emission diameter. However, the substrate back emission type VCSEL has a problem that it cannot be realized depending on the wavelength or cannot be increased in output due to the absorption of light by the substrate.

Patent Document 2 discloses a substrate surface emission type VCSEL in which a current confinement structure different from the oxidation confinement is provided on the device surface, which is the light emission side, by diffusion or ion implantation. With this configuration, even if the diameter of the light emission is increased, the current density can be increased not only in the peripheral portion but also in the vicinity of the center of the diameter of the light emission.

Patent Document 2 discloses a method of forming a current confinement structure in which a current flows only in the central portion by implanting ions into the peripheral portion of the substrate surface to increase the resistance of the periphery. Problems that arise when forming a current confinement structure in this manner will be described with reference to FIG.

The VCSEL shown in FIG. 13 comprises an electrode layer 701, an n-GaAs substrate 702, an n-DBR layer 704, an active region 706, an insulating layer (eg oxide) 707, a p-DBR layer 708, a p-GaAs layer 710, a top It has an electrode 714 . In such a VCSEL, a high-resistance region 712 is formed in the peripheral portion of the p-GaAs layer 710 by ion implantation, and further a region from the second electrode 714 to the current injection region 720 is formed in the upper portion of the p-GaAs layer 710. Leave a current path. Also, a current path from current injection region 720 to opening 716 is formed in p-DBR 708 . For these reasons, the thickness of the p-GaAs layer 710 must be on the order of μm. Since the distance of the current injection region 720 in the direction perpendicular to the substrate is thickened on the order of μm, the resistance increases, and as a result, the voltage of the entire semiconductor light emitting device increases.

WO2019/107273 JP 2006-114915 A

SUMMARY OF THE INVENTION In view of the above problems, an object of the present invention is to provide a semiconductor light-emitting device capable of suppressing a voltage rise of the entire device and achieving high output and easy beam control in the far field.

One aspect of the present invention is a semiconductor light-emitting device having a structure in which a substrate, a first reflector, a resonator section including an active layer, a second reflector, and a transparent conductive film are laminated in this order, A first current constriction portion constituted by a constriction layer, an insulating film formed on the upper surface of the second reflecting mirror and having an opening, and a contact portion between the transparent conductive film and the semiconductor layer in contact with the transparent conductive film. and a width d2 of the second current confinement portion is smaller than the width d1 of the first current confinement portion.

ADVANTAGE OF THE INVENTION According to this invention, the semiconductor light-emitting element which suppresses the voltage rise of the whole element, and has a high output, and is easy to control a far-field beam can be provided. Further, by using this semiconductor light emitting device, it is possible to provide a distance measuring device with improved distance measurement accuracy and a measurable distance.

It is a figure explaining an embodiment of the invention. It is a figure which shows the distribution of a current density, and the mode of a change about embodiment of this invention. FIG. 2 is a diagram for explaining Example 1; FIG. 11 is a diagram for explaining Example 2; FIG. 11 is a diagram for explaining Example 3; FIG. 10 is a diagram showing the distribution and change of current density in Example 3; FIG. 11 is a diagram for explaining Example 4; FIG. 11 is a diagram for explaining Example 5; FIG. 11 is a diagram for explaining Example 6; FIG. 11 is a diagram for explaining Example 7; FIG. 12 is a diagram for explaining Example 8; FIG. 21 is a diagram for explaining Example 9; It is a figure explaining a comparative example.

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below. It should be noted that the present invention is not limited to the following embodiments, and can be appropriately modified based on the ordinary knowledge of those skilled in the art within the scope of the present invention. Any improvements or the like are included in the scope of the present invention.

A semiconductor light emitting device 100 according to one embodiment of the present invention will be described with reference to FIG. The semiconductor light emitting device 100 includes a substrate 101 , a first DBR (Distributed Bragg Reflector) 102 , a semiconductor resonator section 103 and a second DBR 104 . The first DBR 102 and the second DBR 104 respectively correspond to the first reflecting mirror and the second reflecting mirror of the invention.

A plurality of quantum well layers 140 are arranged in the resonator section 103 . Also, part of the second DBR 104 includes an AlGaAs layer having a higher Al composition than other layers. By oxidizing this with steam, an oxidized constricting layer 106 having insulating properties is formed around it. The oxidized confinement layer 106 corresponds to the first current confinement portion. In FIG. 1, only the insulating portion is shown with a lead line and denoted by reference numeral 106 , but the non-oxidized semiconductor layer portion in the central portion also corresponds to the oxidized constricting layer 106 .

Here, the second DBR 104 is made of semiconductor. As another form of the present invention, a configuration having a third DBR different from the second DBR on top of the second DBR is also possible, the details of which will be described in Example 5 below. .

The resonator section 103 and the second DBR 104 are processed into a tubular mesa shape and covered with an insulating film 161 from above. A transparent conductive layer 162 is formed on the insulating film 161 .

The upper electrode 150 is in electrical contact with part of the transparent conductive layer 162 . The lower electrode 151 is in ohmic contact with the back surface of the substrate 101 .

As shown in FIG. 1, an insulating film 161 with a central portion partially removed is formed on the upper surface of the second DBR 104 processed into a mesa shape. A portion from which the insulating film 161 is removed is hereinafter referred to as an insulating opening. A transparent conductive layer 162 contacts the top surface of the second DBR 104 at the isolation opening. This insulating opening defines a contact portion composed of the transparent conductive layer 162 and the upper surface of the second DBR 104 . The shape of the isolation opening may be circular, oval, polygonal, or similar. As for the shape of the insulating opening, if there is an acute-angled portion, the electric current tends to concentrate at that portion, so it is not preferable from the viewpoint of the current profile and durability, and a shape close to a circle is preferable. Carriers supplied from the upper electrode 150 flow into the second DBR 104 only through the contact portion in the insulating opening. That is, the insulating film 161 having the insulating opening and the contact portion between the second DBR 104 and the transparent conductive layer 162 form the second current confinement portion. If the size of the second current confinement portion is circular, for example, its diameter is d2.

Here, as shown in FIG. 1, when the cross-sectional shape of the insulating film 161 has a tapered shape that becomes thinner toward the central portion, the size of the second constriction structure is the distance between the tip portions. It can be defined as the distance d2. That is, d2 is the actual size of the current constricted by the second constriction structure.

In FIG. 1, the mesa shape is formed from the second DBR 104 to the resonator section 103, but the mesa shape may be formed below the oxidized confinement layer 106. FIG. Therefore, the mesa shape may extend, for example, to the middle of the resonator section 103 or to the middle of the first DBR 102 .

Although this embodiment mode describes the structure in which the light-emitting element is processed into a tubular mesa shape, the present invention is not limited to this. For example, instead of processing the periphery uniformly like a cylinder, a portion is removed by etching to the same depth, and then steam oxidation is performed to form an oxidized constricting layer 106 with insulating properties around the periphery. may be formed.

In addition, although the transparent conductive layer 162 is one layer in FIG. 1, one layer or a plurality of layers of transparent insulating films (SiOx, SiNx, TiOx, etc.) may be stacked thereon as necessary. In that case, part of the insulating film under the upper electrode 150 is removed, and the upper electrode 150 and the transparent conductive layer 162 are configured to be electrically connected.

The first DBR 102 is constructed by stacking a plurality of pairs of a high refractive index layer and a low refractive index layer each having an optical thickness of λc/4. λc is the center wavelength of the high reflection band of the first DBR 102 .

The quantum well layer 140 has a structure in which a well layer is sandwiched between barrier layers, and is an active layer of the resonator section 103 .

The second DBR 104 is basically composed of a pair of a high refractive index layer and a low refractive index layer each having an optical film thickness of λc/4 and laminating a plurality of such pairs. However, part of the uppermost high-refractive-index layer is replaced with a contact layer having a higher carrier concentration than the others, thereby improving electrical contact with the transparent conductive layer 162 . Also, in the second DBR 104, a portion of the high refractive index layer closest to the quantum well layer (active layer) 140 is replaced with an AlGaAs layer having a higher Al composition than the others. After forming the mesa of the VCSEL 100, the AlGaAs layer is oxidized for a predetermined length from the mesa side wall by steam oxidation, thereby forming an insulating oxidized constricting layer 106 around the mesa side wall.

The insulating opening portion where the insulating film 161 is removed, that is, the width d2 of the second current confinement is the semiconductor portion inside the oxide constriction layer 106 that is the first current confinement (that is, the portion through which current can flow). (hereinafter referred to as non-oxidized portion) is smaller than the width d1. That is, d1 and d2 have sizes that satisfy the following formula (1).

d2 < d1 (1)

In the following, the case where the non-oxidized portion (semiconductor portion inside the oxidized constricting layer 106) and the second current confinement have circular shapes will be described, but these shapes are not limited to circular, elliptical, A polygon or a shape close to them may be used. In that case, widths d1 and d2 when cut along a certain cross section are sizes that satisfy formula (1).

The effect of the above configuration will be described based on the calculation result of FIG. 2(A). Note that the element configuration used as this calculation model is based on the configuration of Example 1, which will be described later.

FIG. 2A shows the distribution of the current density flowing into the quantum well layer 140 when the diameter d2 of the insulating opening is changed from 5 μm to 29 μm when the confinement diameter d1 is 30 μm. The horizontal axis of FIG. 2(A) is the radial position when the mesa center (which is also the center of the non-oxidized portion) is set to position 0. In FIG.

FIG. 2B shows how the current density changes when Jc is the current density in the central portion and Je is the minimum value of the current density in the peripheral portion (the portion extending from the peripheral edge of d1 to the central portion by 10 μm). .

The far-field pattern can be controlled by making the current density distribution flowing into the quantum well layer higher in the central portion than in the peripheral portion. in short,
Jc > Je (2)
It is preferable that

Furthermore,
Jc > 2 x Je (3)
It is more preferable to be

From FIGS. 2A and 2B, it can be seen that if the diameter d2 of the insulating opening is smaller than 25 μm, that is, if the formula 2 is satisfied, a centrally convex current density distribution can be formed. In addition, in the range where d2 is smaller than about 15 μm, that is, in the range where Equation 3 is satisfied, the current density profile becomes more convex at the central portion.

In addition, by expanding the current density concentrated at the periphery of the oxidation confinement diameter to the center, the occurrence of non-radiative recombination portions spreading from the periphery is suppressed, and the durability of the device is improved. The dotted line in FIG. 2B shows how Jmax/Jmin changes when Jmax is the maximum value and Jmin is the minimum value of the current density in the non-oxidized portion. Note that Jmax/Jmin (dotted line) substantially agrees with Jc/Je (solid line) in the range where d2 is less than 20 μm.

In terms of durability,
Jmax < 3.3 × Jmin (4)
It is preferable that Since the durability is generally said to be inversely proportional to the square of the current density, by satisfying the condition of Expression 4, the in-plane variation of the local durability in the non-oxidized portion can be kept within one digit.

Now, if you care more about far-field profile than durability,
Jmax < 10 × Jmin (5)
may be By satisfying the condition of formula (5), the variation in local durability in the non-oxidized portion can be kept within two digits.

Three factors, the preferred device configuration, non-oxidized constriction diameter d1, and insulating aperture diameter d2, influence each other and are determined according to the application or requirements. As an example, when the device configuration shown in FIG. 1 has a non-oxidized constriction diameter d1 of 30 μm as in Example 1 described later, the diameter d2 of the insulating opening is 12 to 18 μm when emphasis is placed on durability. is a suitable value. Also, for applications where far field profile is more important than durability, the value of d2 may be 12 μm or less.

When the device configuration changes, the suitable ranges of d1 and d2 change accordingly, so suitable ranges are selected according to the application.

In order to form the second current confinement structure, the present invention provides a transparent conductive layer 162 on the second DBR 104 . Since the transparent conductive layer 162 can be made thinner than the p-GaAs layer used in the prior art (FIG. 13), the resistance of the second constriction structure can be reduced. For this reason, the voltage rise in the second current confining structure can be reduced by about one digit in the entire VCSEL 100 as compared with the formation method by ion implantation. By using this element as a light source, it is possible to provide a distance measuring device that not only improves the accuracy of distance measurement and the distance that can be measured, but also realizes miniaturization and weight reduction.

EXAMPLES Hereinafter, examples of the present invention will be described in more detail, showing specific layer structures of light-emitting elements and the like.

(Example 1)
A VCSEL 300 according to this embodiment will be described with reference to FIG. FIG. 3 is a cross-sectional view of the VCSEL 300 of Example 1. FIG. The VCSEL 300 is configured by laminating a GaAs substrate 301, a first DBR 302, a semiconductor resonator section 303, and a second DBR 304 in this order. Although these members are in direct contact with each other in FIG. 3, another member may be provided between them. Moreover, the above description is a description of the structure, and does not limit the order of manufacturing each member.

Three quantum well layers 340 are arranged in the resonator section 303 . In a part of the second DBR 304, an oxidized constricting layer 306 is formed by oxidizing Al _0.98 GaAs by water vapor oxidation to give insulation to the periphery.

The resonator section 303 and the second DBR 304 are processed into a tubular mesa shape and covered with an insulating film 361 from above. Furthermore, an ITO (Indium Tin Oxide) layer 362 is formed on the insulating film 361 .

As shown in FIG. 3, the upper surface of the second DBR 304 processed into a mesa shape is provided with an insulating film 361 from which the central portion is partially removed. is in contact with the upper surface of the DBR 304 of . The portion where the insulating film 361 is removed is referred to as an insulating opening in this disclosure. It can be said that the ITO layer 362 is in contact with the top surface of the second DBR 304 at the insulating opening. The shape of the insulating opening is circular in this embodiment. Also, the upper ring electrode 350 is in electrical contact with a portion of the ITO layer 362 . The lower common electrode 351 is in ohmic contact with the back surface of the GaAs substrate 301 .

The first DBR 302 is constructed by stacking 35 pairs of Al _0.1 GaAs layers and Al _0.9 GaAs layers each having an optical thickness of λc/4. λc is the center wavelength of the high reflection band of the first DBR 302, and is 940 nm in this embodiment.

The quantum well layer 340 is an 8 nm thick In _0.1 GaAs layer and a 10 nm thick Al _0.1 GaAs layer.
It is sandwiched between barrier layers. In this embodiment, three quantum well layers are arranged in the resonator section 303 .

The second DBR 304 is constructed by stacking 20 pairs of Al _0.1 GaAs layers and Al _0.9 GaAs layers each having an optical thickness of λc/4. And Al _0.1 in the top layer
A part of the GaAs layer is replaced with a GaAs contact layer having a thickness of 50 nm and a carrier concentration of 1×10 ¹⁹ cm ⁻³ to improve electrical contact with the transparent conductive layer (ITO layer) 362 . Al _0.1 GaAs closest to the quantum well layer 340 in the second DBR 304
Part of the layer is replaced by a 30 nm thick Al _0.98 GaAs layer. In this Al _0.98 GaAs layer, after the formation of the mesa of the VCSEL 300 , an oxidized constricting layer 306 having insulating properties is formed on the periphery by oxidizing a predetermined length from the edge of the mesa by steam oxidation from the side wall of the mesa. there is

The optical film thickness of the ITO layer 362 is λc/2.

The diameter d2 of the insulating opening portion where the insulating film 361 is removed is 10 μm.
The diameter d1 of the semiconductor portion inside 6 (that is, the portion through which current can flow, the non-oxidized portion) is 30 μm. Since the non-oxidized portion is a portion through which current can flow in the resonator section 103, the diameter of the non-oxidized portion is the emission diameter of the VCSEL. This also applies to the present embodiment and the second embodiment and subsequent embodiments.

In this embodiment, as shown in FIGS. 2A and 2B, the shape of the current density distribution flowing into the quantum well layer 340 is formed into a convex shape at the center to control the far-field pattern. can be done. In the configuration of this embodiment, the values of Jc/Je and Jmax/Jmin are 4.2. Since this embodiment assumes use for a short period of time, a value greater than 3.3 was selected as the value of Jmax/Jmin. On the other hand, d2 can be set to 15 μm, for example, when life characteristics are important. In this case, the values of Jc/Je and Jmax/Jmin are 2.4.

Furthermore, a second constriction structure is formed by providing a thin transparent conductive layer 362 of about 300 nm thickness on the second DBR 304 . For this reason, the voltage rise in the second constriction structure can be reduced by about an order of magnitude for the entire VCSEL 300 as compared with the formation method using ion implantation. Therefore, by using the light-emitting element of this embodiment as a light source, it is possible to provide a distance measuring device that not only improves the accuracy of distance measurement and the measurable distance, but also realizes miniaturization and weight reduction.

(Example 2)
A VCSEL 400 according to the second embodiment will be described with reference to FIG. In this embodiment, the current confinement function on the upper surface of the second DBR is realized by limiting the contact area as in the first embodiment without providing an insulating opening.

FIG. 4 is a cross-sectional view of a VCSEL 400 of Example 2. FIG. In FIG. 4, since the configuration from the lower common electrode 351 to the second DBR 304 is the same as that of the first embodiment, the same part numbers are given and the description thereof is omitted.

A tunnel junction layer 442 is disposed over the second DBR 304 . As shown in FIG. 4, the tunnel junction layer 442 exists only on the diameter d4 of the outermost surface of the second DBR 304 including the center of the mesa. Diameter d4 is smaller than diameter d1 of the non-oxidized portion of oxidized constricting layer 106 . An ITO layer 462 is provided on a portion of the upper surface of the tunnel junction layer 442 and the upper surface of the second DBR 304 where the tunnel junction layer 442 is not arranged. The optical thickness of the ITO layer 462 may be an integral multiple of λc/2, but since even the ITO layer absorbs light to some extent, λc/2 is sufficient if there is no problem with conductivity in the lateral direction of the substrate. Preferably. An upper ring electrode 450 is disposed on the ITO layer 462 .

The tunnel junction layer 442 comprises at least two layers, from the substrate side, of a p-type GaAs layer 440 doped with a carrier concentration of 5×10 ¹⁹ cm ⁻³ and an n-type GaAs layer 441 doped with a carrier concentration of 1×10 ¹⁹ cm ⁻³ thereon. consists of one layer. The total optical film thickness of these two layers is set to be an integral multiple of λc/2. For example, the actual thickness of the n-type GaAs layer 441 is assumed to be 190 nm.

If the absorption in the highly doped p-type GaAs layer becomes a problem, the p-type GaAs layer 440 may be composed of a plurality of layers. For example, the layer on the substrate side has a carrier density of 1×10 ¹⁸ cm ⁻³
may be doped, and the upper layer (the layer in contact with the n-type GaAs layer 441) may be a thin layer (for example, 20 nm thick) having a carrier density of 1×10 ¹⁹ cm ⁻³ .

If an etching stop layer is required in the patterning of the tunnel junction layer 442, the etching stop layer may be interposed between the second DBR 304 and the tunnel junction layer 442. FIG. The optical film thickness of the etching stop layer is set to be an integral multiple of λc/2.

Thus, the tunnel junction layer is a so-called tunnel diode because the p-type layer and the n-type layer having a carrier concentration exceeding 1×10 ¹⁸ cm ⁻³ are joined together, and a thin depletion layer is generated at the pn interface by the tunnel effect. Current also flows in the opposite direction through Therefore, when a voltage is applied between the upper ring electrode 450 and the lower electrode 151 so that the upper ring electrode 450 becomes positive, a voltage is applied from the upper ring electrode 450 through the ITO layer 462 and the tunnel junction layer 442 to the second DBR 304 . current flows. The current flowing into the second DBR 304 diffuses in the second DBR 304 in the same manner as in the configuration of FIG. current density distribution.

As described above, the configuration of this embodiment can also control the far-field pattern in the same manner as in the first embodiment. In addition, by expanding the current density concentrated at the periphery of the oxidation confinement diameter to the center, the occurrence of non-radiative recombination portions spreading from the periphery is suppressed, and the durability of the device is improved.

Furthermore, a second constriction structure is formed by providing a thin transparent conductive film 462 and a tunnel junction layer 442 on the second DBR 304 . Both the p-type layer and the n-type layer of the tunnel junction layer are highly doped layers with a carrier concentration on the order of 10 ¹⁹ and have low resistance. For this reason, the voltage rise in the second constriction structure can be reduced by about an order of magnitude for the entire VCSEL 400 as compared with the formation method using ion implantation. Therefore, by using the light-emitting element of this embodiment as a light source, it is possible to provide a distance measuring device that not only improves the accuracy of distance measurement and the measurable distance, but also realizes miniaturization and weight reduction.

(Example 3)
A VCSEL 500 of Example 3 will be described with reference to FIG. It is common to Example 1 in that an insulating opening is provided, and is common to Example 2 in that a tunnel junction layer is provided. Differences from the first and second embodiments will be mainly described below.

FIG. 5 is a cross-sectional view of a VCSEL 500 of Example 3. FIG. The VCSEL 500 is configured by laminating a GaAs substrate 301, a first DBR 302, a semiconductor resonator section 303, a second DBR 504, and a tunnel junction layer 542 in this order.

The resonator section 303, the second DBR 504, and the tunnel junction layer 542 are processed into a cylindrical mesa shape and covered with an insulating layer 561 from above. An ITO layer 562 is formed on the insulating layer 561 .

As shown in FIG. 5, the upper surface of the second DBR 504 processed into a mesa shape is provided with an insulating layer 561 from which the central portion is partially removed. is in contact with the top surface of The shape of the insulating opening is circular in this embodiment. Also, an upper ring electrode 550 is in electrical contact with a portion of the ITO 562 . The lower common electrode 551 is in ohmic contact with the back surface of the GaAs substrate 501 .

Tunnel junction layer 542 is p-type Ga doped to a carrier concentration of 5×10 ¹⁹ cm ^{−3 .}
As layer 540 and n-type GaAs layer 54 doped to a carrier concentration of 1×10 ¹⁹ cm ⁻³
1. Thus, the tunnel junction layer is a so-called tunnel diode because the p-type layer and the n-type layer having a carrier concentration exceeding 1×10 ¹⁸ cm ⁻³ are joined. Therefore, as in the tunnel junction layer 442 of the second embodiment, a current flows also in the opposite direction through a thin depletion layer generated at the pn interface due to the tunnel effect.

This embodiment is the same as the first embodiment in that the opening exists in a part of the insulating film above the mesa. The diameter d6 and the diameter d5 of the non-oxidized portion are different from those of the first embodiment. This effect will be explained below.

In this embodiment, the diameter d6 of the insulating opening portion where the insulating layer 561 is removed is 20 μm, and the diameter d5 of the non-oxidized portion inside the oxidized constricting layer 506 is 70 μm.

The effect of this will be described based on the calculation result of FIG. 6(A). In FIG. 6A, the horizontal axis indicates the radial position in the non-oxidized portion, the vertical axis indicates the current density, and the numerical values in the figure indicate the diameter d6 of the insulating opening. FIG. 6A shows the current density distribution when d5 is fixed at 70 μm and d5 is varied in the range from 10 μm to 69 μm. From FIG. 6A, the current density distribution maintains a convex shape at the center when d6 is up to 30 μm. It can be seen that the current can be injected to the boundary between the oxidized portion and the non-oxidized portion, that is, the position of 35 μm on the horizontal axis in FIG. 6(A).

The solid line in FIG. 6B shows the ratio of Jc/Je when d5 is fixed at 70 μm and d6 is changed. From FIG. 6B, it can be seen that Expression 3 is satisfied when d6 is smaller than about 35 μm.

For comparison, the case of Example 1 is indicated by a dotted line. The case of Example 1 shown here is the case where d1 is 70 μm in the structure of Example 1. FIG. Description of Jmax/Jmin is omitted because it substantially matches Jc/Je when d6 or d2 is 30 μm or more.

By performing similar calculations, it is possible to find the value of d2 or d6 that simultaneously satisfies Equations 3 and 5 when d1 or d5 takes an arbitrary value. Table 1 lists values of d2 or d6 that simultaneously satisfy Equations 3 and 5 when d1 or d5 is 30, 50, 70 and 100 μm.

From Table 1, in the case of Example 1, when d1 is between 30 and 70 μm, the minimum preferable range of d2 is 4 μm, and when d1 is 50 μm, the maximum allowable range of d2 is 6 μm. Become. On the other hand, in this example, it can be seen that the preferred range of d6 is at least 9 μm or more when d5 is at least between 50 and 100 μm.

Thus, in this embodiment, the tunnel junction layer 542 is provided on the top of the mesa, and particularly the n-type GaAs layer 541 in the tunnel junction layer 542 spreads carriers in the direction parallel to the substrate. Therefore, compared with Example 1, a desired current density distribution can be achieved even if the light emitting area is increased.

According to the present embodiment, it is possible to set the diameter of the non-oxidized portion larger than that of the first embodiment, so that a light emitting device with higher output can be realized.

In this embodiment, the tunnel junction layer 542 is positioned above the second DBR 504, but instead of the high refractive index layer that is the uppermost layer of the second DBR 504, the tunnel junction layer is arranged. can be In that case, the film thickness is set so that the optical film thickness of the tunnel junction layer is an odd multiple of λc/4. In the case of this embodiment, carriers in the lateral direction diffuse in the n-type GaAs layer 541, so it is necessary to set the film thickness to be thicker than a certain level. For example, it is 190 nm and the optical film thickness of the tunnel junction layer can be 3λc/4.

In this embodiment, the tunnel junction layer 542 is provided over the entire upper surface of the second DBR 304, but the tunnel junction layer 542 may not be provided at least around the mesa structure. For example, the tunnel junction layer 542 may be formed to include the center of the mesa, have a diameter greater than d5, and include the entire non-oxidized portion of the oxidized constricting layer 306 in plan view.

(Example 4)
A VCSEL 700 of Example 4 will be described with reference to FIG. In this embodiment, the thickness of the ITO layer is reduced to reduce light absorption in the ITO layer.

The description of this embodiment is based on the first embodiment described above. The same reference numerals are given to the same configurations as in the first embodiment, and the description thereof is omitted. Also, in FIG. 7, only the configuration above the first DBR 302 is shown.

In Example 1, if the ITO layer absorbs a lot and affects the oscillation and output of the VCSEL, the film thickness of the ITO layer is made thinner than λc/2 as in this example, and a transparent insulating layer is formed thereon. It is possible to install a single layer, or multiple layers.

In the VCSEL 700 described in this embodiment, an insulating film 361 with a central portion partially removed is provided on the upper surface of the second DBR 304 processed into a mesa shape. is in contact with the upper surface of the DBR 304 of . Here, the film thickness of the ITO layer 762 is assumed to be 100 nm. A transparent insulating film layer 763 (for example, SiOx) is formed thereon so that the optical film thickness obtained by adding the two layers of the ITO layer 762 and the transparent insulating film layer 763 is an integral multiple of λc/2. An upper ring electrode 750 is electrically connected to a portion of the ITO layer 762 at a portion where the transparent insulating film layer 763 is partially removed.

Here, if the optical film thickness of the ITO layer 762 deviates from λc/2 and the reflectance at the insulating opening is reduced, a plurality of transparent insulating films may be further formed on the transparent insulating film layer 763 . An insulating film layer may be formed. After the thickness of the transparent insulating film in contact with the ITO layer 762 is set to λc/2 together with the ITO layer 762, two layers with different refractive indices are alternately laminated so that the optical film thickness is λc/4. By doing so, it becomes possible to improve the reflectance in the insulating opening.

When further transparent insulating films are formed on the transparent insulating film layer 763, openings similar to those of the transparent insulating film layer 763 are also formed in these transparent insulating layers so that the upper ring electrode 750 and the ITO layer 762 are electrically connected. connect properly.

According to this example, in addition to the effect of Example 1, absorption by ITO can be reduced, so that luminous efficiency can be further improved. In addition, it is possible to reduce the risk of stopping oscillation due to the reduction in reflectance.

Although the present embodiment has been described based on the first embodiment, the present invention is not limited to this, and can be applied to the configurations of other embodiments and embodiments.

In this example, the thickness of the ITO layer 762 was set to 100 nm, but the thickness of the ITO layer should be reduced to such an extent that the increase in resistance from the upper ring electrode to the tunnel junction is not a problem due to its electrical conductivity. is possible. On the other hand, considering the possibility of disconnection due to the stepped portion of the insulating opening, the thickness is preferably 10 nm or more.

(Example 5)
A VCSEL 800 of Example 5 will be described with reference to FIG. The VCSEL 800 further has a third DBR 801 on the ITO layer 362 as compared with the first embodiment. The third DBR may be composed of dielectric multilayer films such as SiOx, SiNx, TiOx.

In the first example, the size of d2 was set to 10 μm or 15 μm. 15 μm is a design when emphasis is placed on durability. Here, it is assumed that the size of d2 cannot be set to 15 μm or less due to process restrictions or the like. In such a case, in order to increase the values of Jc/Je and Jmax/Jmin, in this embodiment, the thickness of the second DBR 804 is made thinner than the thickness set in the first embodiment. A third DBR is provided to compensate for the reduced reflectivity due to

Specifically, if the thickness of the second DBR 804 is 3/5 that of Example 1, even if d2 is 15 μm, the values of Jc/Je and Jmax/Jmin are 4.4. can get.

It should be noted that the size of the third DBR 801 in the horizontal direction of the paper must be optically sufficiently large as a resonator above the active layer. In FIG. 8, the size of the third DBR 801 is smaller than the inner diameter of the upper ring electrode 350 and larger than d1, but it is not limited to this. Even if the size of the third DBR 801 is about the same as or larger than the inner diameter of the upper ring electrode 350 , it may be configured so that current can be supplied to the upper ring electrode 350 .

In this example, the thickness of the second DBR 804 was set thinner than in Example 1, but in order to obtain a desired current density distribution, the thickness of the second DBR 804 may be made thicker than in Example 1. good. In that case, for example, one layer or a plurality of layers of the second DBR can be 3/4λc.

(Example 6)
A VCSEL 900 according to a sixth embodiment of the present invention will be described with reference to FIG. VCSEL 900 differs from Example 1 in that λc is 850 nm. Therefore, in the first DBR 502 and the second DBR 504, the optical film thickness of each layer is changed to λc/4 (=212.5 nm). In addition, the composition and optical film thickness of the quantum well layer 540 and the resonator section 503 are adjusted as appropriate.

Specifically, the quantum well layer 540 has a structure in which a GaAs layer with a thickness of 8 nm is sandwiched between Al _0.3 GaAs barrier layers with a thickness of 8 nm. In this embodiment, three quantum well layers are arranged in the resonance section 503 .

By doing so, even for a wavelength in the 850 nm band, which has a high absorptivity in the substrate and is difficult to achieve high output in the case of back emission, the effect of absorption by the substrate can be suppressed, and a high output semiconductor light emitting device can be provided.

Although this embodiment has a configuration in which the oscillation wavelength is changed from that of the first embodiment, any of the examples described in the second to fifth embodiments can be similarly applied as an example provided by the present invention.

(Example 7)
A VCSEL 3300 according to this embodiment will be described with reference to FIG. FIG. 10 is a cross-sectional view of a VCSEL 3300 of Example 7. FIG. In this example, unlike the VCSEL 300 of Example 1, a thick film contact layer 3400 is provided between the second DBR 304 and the ITO layer 362 . In this embodiment, the thick-film contact layer 3400 is a p-type GaAs layer with an optical thickness of λc/2.

The VCSEL 3300 is configured by laminating a GaAs substrate 301, a first DBR 302, a semiconductor resonator section 303, a second DBR 304, and a thick film contact layer 3400 in this order. Although these members are in direct contact with each other in FIG. 10, another member may be provided between them. Moreover, the above description is a description of the structure, and does not limit the order of manufacturing each member.

Three quantum well layers 340 are arranged in the resonator section 303 . A part of the second DBR 304 is formed with an oxidized constricting layer 306 having insulating properties around it by oxidizing Al0.98GaAs by steam oxidation.

The resonator section 303, the second DBR 304, and the thick-film contact layer 3400 are processed into a tubular mesa shape and covered with an insulating film 361 from above. Furthermore, an ITO (Indium Tin Oxide) layer 362 is formed on the insulating film 361 .

As shown in FIG. 10, an insulating film 361 whose center portion is partially removed is provided on the upper surface of the thick-film contact layer 3400 processed into a mesa shape, and the ITO layer 362 is thick in the removed portion. It is in contact with the top surface of the membrane contact layer 3400 . A portion where the insulating film 361 is removed is referred to as an insulating opening in this specification. The ITO layer 362 contacts the top surface of the thick contact layer 3400 at the insulating opening. That is, the ITO layer 362 and the semiconductor layer with which the ITO layer 362 is in contact constitute the contact portion. The shape of the insulating opening is circular in this embodiment. Also, the upper ring electrode 350 is in electrical contact with a portion of the ITO layer 362 . The lower common electrode 351 is in ohmic contact with the back surface of the GaAs substrate 301 .

By the way, the layer constituting the DBR preferably has an optical thickness that is an odd multiple of λc/4. Since the thick-film contact layer 3400 of the present embodiment has an optical film thickness of λc/2, it is not a DBR layer. Thus, in the VCSEL 3300 of this embodiment, unlike the VCSEL 300 of the first embodiment, the portion functioning as the DBR constituting the VCSEL and the ITO layer are not in direct contact. However, in this embodiment, as in the first embodiment, the current distribution flowing into the quantum well layer can be controlled to have a suitable shape. This is because, in the present invention, it is the two current confinement layers and the semiconductor layer between them that control the current distribution flowing into the quantum well layer to a suitable shape. In this embodiment, the current confinement structure defined by the insulating opening formed in the oxide confinement layer 306 and the insulating film 361 is two current confinement layers, and the spread of the current in the semiconductor layer between them is utilized. .
Therefore, the effects of the invention can be obtained regardless of whether or not the ITO layer is in direct contact with the layer functioning as the DBR.

ITO is generally an n-type semiconductor, and the ITO layer 362 in this embodiment is also an n-type semiconductor. Therefore, the interface with the thick film contact layer 3400, which is a p-type semiconductor layer, is a pn junction, and a depletion layer is generated. Therefore, in the film thickness on the p-type semiconductor layer side, the width where holes exist is narrowed by the width of the depletion layer. Furthermore, due to the defect level existing at the interface with the ITO layer 362, holes decrease near the interface.

Therefore, in the case of a contact using an ITO layer, depending on conditions such as the carrier concentration of the ITO layer, a contact layer having a greater thickness than a contact using a normal p-type contact electrode is required. Sometimes. In such a case, the configuration of this embodiment is advantageous in that it is possible to increase the thickness of the contact layer by an integer multiple of the optical thickness λc/2 without changing the top reflectance of the VCSEL. .

Also, as described in the above embodiments, the present invention utilizes two current confinement structures and a semiconductor layer therebetween to control carrier spread. Therefore, the total film thickness of the semiconductor layers between the two current confinement structures is also an important parameter. For example, if the film thickness is set for the number of suitable pairs from the viewpoint of securing the reflectance of the DBR, the film thickness necessary for suitable spread of carriers may be insufficient. In this case, a semiconductor layer having an optical film thickness that is an integral multiple of λc/2 may be provided between the ITO layer and the DBR to obtain a structure having an appropriate film thickness. As a result, it is possible to ensure both the DBR reflectivity and the spread control of carriers.

Moreover, although this embodiment shows the configuration in which the VCSEL of the first embodiment is provided with the thick-film contact layer 3400, any of the VCSELs described in the second to sixth embodiments may be provided with the thick-film contact layer 3400. FIG. In either case, as described above, it is possible to achieve both the ensuring of DBR reflectance and the control of carrier spread.

(Example 8)
A VCSEL array 1000 that is an eighth embodiment of the present invention will be described with reference to FIG. Although the embodiments so far have described the case where there is one VCSEL light emitting unit, the present invention is not limited to this, and may be configured to have a plurality of VCSEL light emitting units.

As shown in FIG. 11, in a VCSEL array 1000 of this embodiment, a plurality of VCSELs 300 described in Embodiment 1 are arranged in an array. Circle 910 represents the inner diameter of the upper ring electrode. A dashed-dotted line 911 indicates a light-emitting area, the inner diameter of which is d1. A portion indicated by a dotted line is the pad portion 920 of the upper electrode.

As shown in FIG. 11, multiple light emitting points are connected to the same electrode, and the multiple light emitting points emit light simultaneously. With such a structure, the output from the light emitting element can be further increased.

Although this embodiment shows an example in which 16 light-emitting points are arranged in a 4×4 triangular lattice, the present invention is not limited to this, and the number of light-emitting points and The arrangement of the light emitting points can be changed as appropriate. In addition, although an example in which a plurality of light emitting points are collectively driven at the same time has been shown, depending on the application, the light emitting points and the corresponding upper electrodes may be divided into a plurality of groups or individually, and the timing of light emission may be changed. .

Moreover, although this embodiment shows the configuration in which the VCSELs of the first embodiment are arrayed, any of the VCSELs described in the second to seventh embodiments may be arrayed. By forming an array using the VCSEL based on Example 3, it is possible to set the diameter of the non-oxidized portion larger than when using the VCSEL based on Examples 1 and 2. , high output can be realized in a smaller area when arrayed.

(Example 9)
FIG. 12 shows a distance measuring device 2000 according to the ninth embodiment. FIG. 12 illustrates laser image detection and ranging (LiDAR) using the VCSEL described in the above embodiment as a light source.
It is a device.

As shown in FIG. 12, the distance measuring device 2000 comprises an overall control section 1010, a VCSEL driver 1020, a VCSEL 1030, a light emitting side optical system 1040, a light receiving side optical system 1060, a light receiving image sensor 1070, and a distance data processing section 1080. there is

In this embodiment, the VCSEL described in Embodiment 1 is used as the VCSEL 1030, but the present invention is not limited to this, and the VCSELs or VCSEL arrays described in Embodiments 1 to 8 are appropriately applied.

The VCSEL 1030 is configured by mounting the VCSEL described in the above embodiment on a package. The light-emitting side optical system 1040 and the light-receiving side optical system 1060 may be composed of a single convex lens-shaped member, or a lens group combining a plurality of lenses. The light receiving image sensor 1070 is an image sensor in which SPAD (Single Photon Avalanche Diode) photosensors are arranged in a two-dimensional array.

An outline of the operation of the rangefinder 2000 is as follows. First, a drive signal is output from the overall control unit 1010 to the VCSEL driver 1020 . VCSEL driver 1020 receives the drive signal
injects a current of a predetermined current value into the VCSEL 1030 to cause the VCSEL 1030 to oscillate.

The laser light generated by the VCSEL 1030 passes through the light-emitting side optical system 1040 and hits the measurement object 1200 , and the reflected light reflected by the measurement object 1200 enters the light-receiving image sensor 1070 through the light-receiving side optical system 1060 . In this manner, each pixel of the light receiving image sensor 1070 detects the reflected light of the light emitted from the VCSEL 1030 . Distance data processing section 1080 may be electrically connected to light receiving image sensor 1070 . Therefore, it may be arranged in the same package as the light receiving image sensor 1070, or may be mounted in a different package and electrically connected by a circuit board or the like.

An electric signal pulse output from each pixel of the light receiving image sensor 1070 is input to the distance data processing section 1080 . The distance data processing unit 1080 calculates distance information in the light propagation direction from the time (detection timing) of the electrical signal pulse output from each pixel of the light receiving side optical system 1060, and generates and outputs three-dimensional information.

In this manner, the distance measuring device 2000 can acquire and output three-dimensional information.

Range finder 2000 can be applied to control for avoiding collision with other vehicles, control for automatically driving following other vehicles, and the like in the field of automobiles. Furthermore, it can be used for mobile bodies (mobile devices) such as ships, aircraft, and industrial robots, and mobile body detection systems. Furthermore, it can be widely applied to equipment that utilizes three-dimensional recognition of objects including distance information.

Applications of the three-dimensional information are not limited to those described above. For example, distance information may be used for image processing. By using three-dimensional information of the real space when an image of the real space is acquired and the virtual object is superimposed and displayed, the virtual object can be displayed on the real world without a sense of discomfort. Also, by acquiring three-dimensional information when acquiring an image, it is possible to correct blur based on the three-dimensional information after photographing.

Although preferred embodiments of the present invention have been described above, the present invention is not limited to these embodiments, and various modifications and changes are possible within the scope of the gist.

(Appendix)
The present disclosure includes the following configurations and methods.
[Configuration 1]
A semiconductor light emitting device having a structure in which a substrate, a first reflecting mirror, a resonator section including an active layer, a second reflecting mirror, and a transparent conductive film are laminated in this order,
a first current constriction portion constituted by an oxidized constriction layer;
a second current confinement portion composed of an insulating film formed on the upper surface of the second reflecting mirror and having an opening, and a contact portion between the transparent conductive film and a semiconductor layer with which the transparent conductive film is in contact;
including
the width d2 of the second current confinement portion is smaller than the width d1 of the first current confinement portion;
A semiconductor light emitting device characterized by:
[Configuration 2]
The opening of the insulating film in the second current confinement portion is included in a non-oxidized portion inside the oxidized confinement layer in the first current confinement portion in a plan view,
The semiconductor light emitting device according to Structure 1.
[Configuration 3]
The width d1 of the first current confinement portion is
30 µm ≤ d1 ≤ 70 µm
The semiconductor light emitting device according to Configuration 1 or 2, which satisfies:
[Configuration 4]
A tunnel junction layer is provided on top of the second reflector,
The insulating film and the transparent conductive film are provided on the tunnel junction layer, and the transparent conductive film is in contact with the second reflector via the tunnel junction layer.
3. The semiconductor light emitting device according to Structure 1 or 2.
[Configuration 5]
The tunnel junction layer is provided so as to include at least an inner non-oxidized portion of the oxidized constriction layer in the first current confinement portion in a plan view of the uppermost portion of the second reflecting mirror.
The semiconductor light emitting device according to Structure 4.
[Configuration 6]
The width d1 of the first current confinement portion is
50 µm ≤ d1 ≤ 100 µm
The semiconductor light-emitting device according to Configuration 4 or 5, which satisfies:
[Configuration 7]
A transparent insulating film is provided on the transparent conductive film,
7. The semiconductor light emitting device according to any one of Structures 1 to 6.
[Configuration 8]
A third reflector made of a dielectric material is further provided above the second reflector,
8. The semiconductor light emitting device according to any one of Structures 1 to 7.
[Configuration 9]
A plurality of semiconductor light emitting devices according to any one of Structures 1 to 8 are arranged side by side,
A light-emitting device characterized by:
[Configuration 10]
A light source including the semiconductor light emitting device according to any one of Structures 1 to 8;
a sensor that detects reflected light of the light emitted from the light source;
a processing unit that acquires distance information based on the detection timing of the reflected light;
A ranging device.

101: Substrate 102: First DBR (first reflector) 103: Resonance base 104: Second DBR (second reflector) 161: Insulating film 162: Transparent conductive film

Claims (10)

A semiconductor light emitting device having a structure in which a substrate, a first reflecting mirror, a resonator section including an active layer, a second reflecting mirror, and a transparent conductive film are laminated in this order,
a first current constriction portion constituted by an oxidized constriction layer;
a second current confinement portion composed of an insulating film formed on the upper surface of the second reflecting mirror and having an opening, and a contact portion between the transparent conductive film and a semiconductor layer with which the transparent conductive film is in contact;
including
the width d2 of the second current confinement portion is smaller than the width d1 of the first current confinement portion;
A semiconductor light emitting device characterized by: The opening of the insulating film in the second current confinement portion is included in a non-oxidized portion inside the oxidized confinement layer in the first current confinement portion in a plan view,
The semiconductor light emitting device according to claim 1. The width d1 of the first current confinement portion is
30 µm ≤ d1 ≤ 70 µm
2. The semiconductor light emitting device according to claim 1, which satisfies: A tunnel junction layer is provided on top of the second reflector,
The insulating film and the transparent conductive film are provided on the tunnel junction layer, and the transparent conductive film is in contact with the second reflector via the tunnel junction layer.
The semiconductor light emitting device according to claim 1. The tunnel junction layer is provided so as to include at least an inner non-oxidized portion of the oxidized constriction layer in the first current confinement portion in a plan view of the uppermost portion of the second reflecting mirror.
5. The semiconductor light emitting device according to claim 4. The width d1 of the first current confinement portion is
50 µm ≤ d1 ≤ 100 µm
5. The semiconductor light emitting device according to claim 4, satisfying: A transparent insulating film is provided on the transparent conductive film,
The semiconductor light emitting device according to claim 1. A third reflector made of a dielectric material is further provided above the second reflector,
The semiconductor light emitting device according to claim 1. A plurality of semiconductor light emitting devices according to any one of claims 1 to 8 are arranged side by side,
A light-emitting device characterized by: a light source comprising the semiconductor light emitting device according to any one of claims 1 to 8;
a sensor that detects reflected light of the light emitted from the light source;
a processing unit that acquires distance information based on the detection timing of the reflected light;
A ranging device.

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