JP2016133622A - Storage type display device, driving method for storage type display device, and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent flicker without unnecessarily raising frequency of voltage to be applied to a counter electrode and to perform erasure without afterimage and overwrite of an image with low power consumption and in a short time.SOLUTION: In electrophoretic elements, counter electrodes facing pixel electrodes via a plurality of microcapsules are composed of first counter electrodes 52-1 and second counter electrodes 52-2. The first counter electrodes 52-1 and the second counter electrodes 52-2 are formed into a rectangular shape with a column direction of pixels arranged in a matrix shape as a longitudinal direction, and in the column direction, the first counter electrodes 52-1 and the second counter electrodes 52-2 are arranged by turns. By a control circuit, voltage waveforms in a prescribed cycle are applied to the first counter electrodes, and applied to the second counter electrodes by displacing a phase.SELECTED DRAWING: Figure 8

Description

  The present invention relates to a memory type display device, a method for driving the memory type display device, and an electronic apparatus.

It is known that when an electric field is applied to a dispersion system in which charged particles are dispersed in a liquid, the charged particles move (migrate) in the liquid. This phenomenon is referred to as electrophoresis. In recent years, electrophoretic display devices that display desired information (images) using this electrophoresis have generally started to spread.
For example, an electrophoretic display device including a microcapsule type electrophoretic element including a pixel electrode, a counter electrode, and a microcapsule disposed between the pixel electrode and the counter electrode has been proposed. The microcapsule encloses a dispersion medium for dispersing the electrophoretic particles in the microcapsule, a plurality of white particles, and a plurality of black particles. A data line for supplying a data signal is connected to the pixel electrode, and the data signal is written to the pixel electrode through the data line.
As a method for driving the electrophoretic display device, for example, as in Patent Document 1, a low level or high level voltage is applied to the pixel electrode of each pixel, and a low level and a high level voltage are alternately alternately applied to the counter electrode. There is known a driving method called common swing applied to.

In addition, when rewriting display contents in an electrophoretic display device, the voltage of the pixel electrode of a pixel whose display is not rewritten is made equal to the voltage of the counter electrode, and the potential of the pixel electrode of the pixel whose display is rewritten is It is conceivable to set the voltage of the pixel electrode so as to be a predetermined potential. However, it may be difficult to maintain the display state in the pixel where the display is not rewritten due to the difference between the timing of voltage application to the pixel electrode and the timing of voltage application to the counter electrode, or leakage of the pixel transistor. is there. Therefore, conventionally, a method of temporarily erasing the display by applying a voltage for making all the pixels white, for example, to the pixel electrode is employed.
However, in the conventional erasing method, white particles and black particles are driven only by an electric field in the vertical direction from the counter electrode to the pixel electrode or in the vertical direction from the pixel electrode to the counter electrode. May interfere with each other and may not move smoothly. As a result, a so-called afterimage may occur in which the previous display image remains thin.
Therefore, as a method of erasing the display in white without generating such an afterimage, there is a method of erasing by changing the potential difference between each pixel electrode of the adjacent pixel and the counter electrode as in Patent Document 2, for example. Proposed.

JP-A 52-70791 JP 2011-107249 A

In the apparatus of Patent Document 1, for example, when the low level voltage is 0V and the high level voltage is 15V, the voltage of the counter electrode is 0V in a predetermined cycle (referred to as period 1) and 15V (period 1). Period 2) is repeated. Therefore, in a pixel in which a voltage of 0 V is written to the pixel electrode, the potential of the pixel electrode with respect to the potential of the counter electrode is 0 V in period 1 and −15 V in period 2. In a pixel in which a voltage of 15 V is written to the pixel electrode, the potential of the pixel electrode with respect to the potential of the counter electrode is 15 V in period 1 and 0 V in period 2. For example, if white particles are positively charged particles and black particles are negatively charged particles, in a pixel in which a voltage of 0 V is written to the pixel electrode, there is no gradation change in period 1 and black particles are opposed in period 2 Since the movement starts on the substrate, the gradation changes. Further, in the pixel in which a voltage of 15 V is written to the pixel electrode, the gradation changes in the period 1 because the white particles start to move to the counter substrate, but the gradation does not change in the period 2.
In this way, in all the pixels, the gradation does not change continuously, but the period in which the gradation changes and the period in which the gradation does not change alternately occur, and the method of changing the gradation is discontinuous. Therefore, it will be recognized as flicker.
This flicker can be eliminated by increasing the frequency of the voltage applied to the counter electrode. However, increasing the frequency increases wasteful power consumption due to stray capacitance, or causes the voltage waveform to become dull due to the resistance of the counter electrode. There is a problem that a predetermined voltage cannot be applied, and a larger voltage needs to be supplied.

In the apparatus of Patent Document 2, in order to make the potential difference between each pixel electrode and the counter electrode of adjacent pixels different, it is necessary to program a pattern for realizing such a potential difference in all the pixels. When such a program is executed, the potential of all the data lines is always switched between a low level and a high level for each row, so that a large amount of power is consumed due to the parasitic capacitance associated with the data lines. In addition, it takes time to program the entire screen, and there is a problem that display rewriting cannot be executed in a short time.
The present invention has been made in view of the above circumstances, and can prevent flicker without unnecessarily increasing the frequency of the voltage applied to the counter electrode, and can reduce power consumption in a short time. One of the problems to be solved is to enable erasure and image rewriting without afterimages.

In order to solve the above problems, a memory-type display device according to one embodiment of the present invention includes a plurality of pixels arranged in a matrix, and the pixels include a plurality of pixel electrodes formed for the pixels; A memory-type display device comprising: a counter electrode facing the pixel electrode; and a display element sandwiched between the pixel electrode and the counter electrode, wherein the counter electrode includes a first counter electrode and a first counter electrode. Two counter electrodes, wherein the first counter electrode and the second counter electrode are alternately arranged in at least one direction of a row direction or a column direction,
A control circuit is provided that applies a voltage waveform of a predetermined period to the first counter electrode, and applies the voltage waveform to the second counter electrode with a phase shift.

According to this aspect, a period in which the voltages applied to the first counter electrode and the second counter electrode are different occurs. For example, a high level voltage is applied to the first counter electrode, and the second counter electrode is applied. During a period in which a low level voltage is applied to the electrode, an electric field is not generated in a pixel electrode or a part of the pixel electrode facing the first counter electrode among the pixel electrodes to which a high level voltage is applied, The gradation of that portion does not change. On the other hand, an electric field is generated in the pixel electrode facing the second counter electrode or a part of the pixel electrode, and the gradation changes.
In addition, among the pixel electrodes to which a low level voltage is applied, an electric field is generated in the pixel electrode facing the first counter electrode or a part of the pixel electrode, and the gradation of the part changes. On the other hand, an electric field is not generated in the pixel electrode or a part of the pixel electrode facing the second counter electrode, and the gradation does not change.
Next, in a period in which a low level voltage is applied to the first counter electrode and a high level voltage is applied to the second counter electrode, among the pixel electrodes to which a high level voltage is applied, An electric field is generated in a pixel electrode or a part of the pixel electrode facing one counter electrode, and the gradation of the portion changes. On the other hand, an electric field is not generated in the pixel electrode or a part of the pixel electrode facing the second counter electrode, and the gradation does not change.
In addition, among the pixel electrodes to which a low level voltage is applied, an electric field is not generated in the pixel electrode facing the first counter electrode or a part of the pixel electrode, and the gradation of the part does not change. On the other hand, an electric field is generated in the pixel electrode facing the second counter electrode or a part of the pixel electrode, and the gradation changes.
Accordingly, in a pixel having the same voltage of the pixel electrode, on the one hand, a period in which the gradation change occurs and a period in which the gradation change does not occur are repeated, and on the other hand, a period in which the gradation change does not occur and the gradation change The period of occurrence of is repeated. As a result, since it looks mixed for the user who is viewing the display unit, the discontinuous optical change is averaged to become a smooth change, and flickering is reduced. In addition, even when the voltage of the pixel electrode is the same, the voltages applied to the counter electrodes facing each other are different from each other. Therefore, when an electric field is generated, the direction from the pixel electrode to the counter electrode or the counter electrode In addition to the vertical electric field in the direction from the pixel electrode to the pixel electrode, a horizontal electric field is generated between adjacent counter electrodes. As a result, the electric field in the vertical direction and the horizontal direction are combined, and in one pixel, not only the electric field in the vertical direction but also the electric field in the oblique direction is generated, and the particles at the pixel boundary are driven in the oblique direction. It is considered that there are a plurality of movement directions, and the movement is smooth. Since the movement of the particles becomes smooth in this way, the erasing operation is performed without generating a so-called afterimage in which the previous display image remains thin.

  In this aspect, the display element is a concept including an electrophoretic element, a liquid crystal, a flying powder element, and the like. The first counter electrode and the second counter electrode may be alternately arranged in the row direction or may be arranged alternately in the column direction. Further, they may be arranged alternately in the row direction and the column direction.

  A memory-type display device according to another aspect of the present invention is characterized in that the first counter electrode and the second counter electrode are formed in a shape whose longitudinal direction is a row direction. According to this aspect, the first counter electrode and the second counter electrode can be easily formed, flickering is reduced, and an erasing operation is performed without generating an afterimage.

  The memory-type display device according to another aspect of the present invention is characterized in that the first counter electrode and the second counter electrode are formed in a rectangular shape and arranged in a lattice shape. According to this aspect, since the polarity of the voltage applied to the counter electrode is reversed not only in the row direction but also in the column direction at a predetermined cycle, the flicker is further reduced and the occurrence of afterimage is further suppressed. The erase operation is performed.

  A memory-type display device according to another aspect of the present invention is characterized in that the first counter electrode and the second counter electrode are connected diagonally. According to this aspect, since the polarity of the voltage applied to the counter electrode is reversed not only in the row direction but also in the column direction at a predetermined cycle, the flicker is further reduced and the occurrence of afterimage is further suppressed. The erase operation is performed.

  The memory type display device according to another aspect of the present invention is characterized in that the first counter electrode and the second counter electrode also serve as a capacitance type input detection element. According to this aspect, display without flicker and erasure without afterimage are performed, and the position of the finger in contact with the display unit is detected in a period in which the display is not changed.

  In order to solve the above problems, a driving method of a memory-type display device according to one embodiment of the present invention includes a plurality of pixels arranged in a matrix, and the pixel includes a plurality of pixels formed for each pixel. An electrode, a counter electrode facing the pixel electrode, and a display element sandwiched between the pixel electrode and the counter electrode, wherein the counter electrode includes a first counter electrode and a second counter electrode. The first counter electrode and the second counter electrode are alternately arranged in at least one direction of a row direction or a column direction, and the storage type display device is driven by a voltage having a predetermined cycle. Applying a waveform to the first counter electrode; and applying the voltage waveform to the second counter electrode with a phase shift.

  Next, an electronic apparatus according to the present invention includes the above-described memory type display device according to the present invention. In such an electronic device, flickering is reduced, and an erasing operation and image rewriting are performed while suppressing the occurrence of afterimages. The electronic device is a concept including a tablet, an electronic book, a smartphone, and the like.

1 is a block diagram showing a main configuration of a memory type display device according to a first embodiment of the present invention. FIG. 9 illustrates a configuration example of a pixel circuit. Sectional drawing of a display part. The block diagram of a microcapsule. The figure explaining operation | movement of a microcapsule. The figure explaining operation | movement of a microcapsule. FIG. 6 is a diagram illustrating a configuration example of a data line driver circuit. The figure which shows the structure of a 1st counter electrode and a 2nd counter electrode. The figure which shows typically the optical change in the application method of the voltage to the 1st counter electrode and the 2nd counter electrode at the time of a display change, and the adjacent pixel of the same color display. The figure which shows typically the optical change in the application method of the voltage to the 1st counter electrode and the 2nd counter electrode at the time of erasing, and the adjacent pixel of the same color display. The figure which shows the structure of the 1st counter electrode and 2nd counter electrode which concern on 2nd Embodiment. The figure which shows the structure of the 1st counter electrode and 2nd counter electrode which concern on 3rd Embodiment. The perspective view of an electronic device (information terminal). The perspective view of an electronic device (electronic paper). The figure which shows typically the application method of the voltage to a counter electrode at the time of the display change which concerns on a comparative example, and the optical change in a pixel.

<First Embodiment>
The first embodiment of the present invention will be described below.
FIG. 1 is a diagram showing a main configuration of an electrophoretic display device 100 as an example of a memory type display device according to the first embodiment of the present invention. As shown in FIG. 1, the electrophoretic display device 100 includes an electrophoretic panel 10 and a control circuit 20.

The electrophoretic panel 10 includes a display unit 30 in which a plurality of pixel circuits P are arranged, and a drive unit 40 that drives each pixel circuit P. The drive unit 40 includes a scanning line drive circuit 42 and a data line drive circuit 44.
The control circuit 20 comprehensively controls each part of the electrophoresis panel 10 based on a video signal, a synchronization signal, and the like supplied from the host device.

The display unit 30 is formed with m scanning lines 32 extending in the X direction and n data lines 34 extending in the Y direction and intersecting the scanning lines 32 (m and n are natural numbers). ). The plurality of pixel circuits P are arranged at intersections of the scanning lines 32 and the data lines 34 and arranged in a matrix of m rows × n columns.
The first power supply line 61 and the second power supply line 62 are arranged for all the pixel circuits P.
FIG. 2 is a diagram illustrating a configuration example of the pixel circuit P. In FIG. 2, only one pixel circuit (pixel) P located in the j-th column (1 ≦ j ≦ n) of the i-th row (1 ≦ i ≦ m) is illustrated. As shown in the figure, the pixel circuit P includes an electrophoretic element 50, a selection switch Ts, a memory circuit 25, and a switch circuit 35.

  The selection switch Ts is composed of an N-MOS (Negative Metal Oxide Semiconductor). A scanning line 32 is connected to the gate portion of the selection switch Ts, a data line 34 is connected to the source side, and a memory circuit 25 is connected to the drain side. The selection switch Ts connects the data line 34 from the data line driving circuit 44 to the data line 34 by connecting the data line 34 and the memory circuit 25 during a period in which the scanning signal is input from the scanning line driving circuit 42 via the scanning line 32. It is used for inputting a data signal input via the memory circuit 25.

  The memory circuit 25 is a latch circuit and includes two P-MOS (Positive Metal Oxide Semiconductors) 25p1 and 25p2 and two N-MOSs 25n1 and 25n2. The first power supply line 13 is connected to the source side of the P-MOSs 25p1 and 25p2, and the second power supply line 14 is connected to the source side of the N-MOSs 25n1 and 25n2. Therefore, the source sides of the P-MOS 25 p 1 and the P-MOS 25 p 2 are high potential power terminals of the memory circuit 25, and the source sides of the N-MOS 25 n 1 and N-MOS n 2 are low potential power terminals of the memory circuit 25.

The switch circuit 35 includes a first transfer gate 36 and a second transfer gate 37. The first transfer gate 36 includes a P-MOS 36p and an N-MOS 36n. The second transfer gate 37 includes a P-MOS 37p and an N-MOS 37n.
The source side of the first transfer gate 36 is connected to the first power supply line 61, and the source side of the second transfer gate 37 is connected to the second power supply line 62. The drain sides of the transfer gates 36 and 37 are connected to the pixel electrode 51.

The memory circuit 25 includes an input terminal N1 connected to the drain side of the selection switch Ts, and a first output terminal N2 and a second output terminal N3 connected to the switch circuit 35.
The gate portion of the P-MOS 25p1 and the gate portion of the N-MOS 25n1 of the memory circuit 25 function as the input terminal N1 of the memory circuit 25. The input terminal N1 is connected to the drain side of the selection switch Ts and is also connected to the first output terminal N2 (the drain side of the P-MOS 25p2 and the drain side of the N-MOS 25n2) of the memory circuit 25.
Further, the first output terminal N 2 is connected to the gate portion of the P-MOS 36 p of the first transfer gate 36 and the gate portion of the N-MOS 37 n of the second transfer gate 37.

The gate portion of the P-MOS 25p2 and the gate portion of the N-MOS 25n2 of the memory circuit 25 function as the second output terminal N3 of the memory circuit 25.
The second output terminal N3 is connected to the drain side of the P-MOS 25p1 and the drain side of the N-MOS 25n1, and the gate portion of the N-MOS 36n of the first transfer gate 36 and the P of the second transfer gate 37. -It is connected to the gate part of the MOS 37p.

The memory circuit 25 holds the data signal sent from the selection switch Ts and is used to input the data signal to the switch circuit 35.
The switch circuit 35 functions as a selector that selectively selects one of the first and second power supply lines 61 and 62 based on the data signal input from the memory circuit 25 and connects to the pixel electrode 51. . At this time, only one of the first and second transfer gates 36 and 37 operates according to the level of the data signal.

Specifically, when a high level is input as a data signal to the input terminal N1 of the memory circuit 25, a high level is output from the first output terminal N2, and thus the first output terminal N2 (input terminal N1). Among the transistors connected to the N-MOS 37n, the N-MOS 37n operates, and the P-MOS 37p connected to the second output terminal N3 operates to drive the transfer gate 37. Therefore, the second power supply line 62 and the pixel electrode 51 are electrically connected.
On the other hand, when a low level is input as a data signal to the input terminal N1 of the memory circuit 25, a low level is output from the first output terminal N2, and therefore, connected to the first output terminal N2 (input terminal N1). Among these transistors, the P-MOS 36p operates, and the N-MOS 36n connected to the second output terminal N3 operates to drive the transfer gate 36. Therefore, the first power supply line 61 and the pixel electrode 51 are electrically connected.
Then, the first power supply line 61 or the second branch power supply line 62 is electrically connected to the pixel electrode 51 through the operated transfer gate, and a potential is input to the pixel electrode 51.
Further, the memory circuit 25 can hold the data signal input via the selection switch Ts as described above. Therefore, when the state of the memory circuit 25, that is, the voltage state of the first output terminal is low level, the first power supply line 61 and the pixel electrode 51 are connected, and when the voltage level is high, the first power supply line 62 is connected. And the pixel electrode 51 are connected.

As shown in FIG. 3, the electrophoretic element 50 includes a pixel electrode 51 and a counter electrode 52 facing each other, and a plurality of microcapsules 53 arranged between the pixel electrode 51 and the counter electrode 52. In the present embodiment, the counter electrode 52 side is the observation side electrode. The counter electrode 52 includes a first counter electrode 52-1 and a second counter electrode 52-2. Details will be described later.
An electrophoretic element 50 as an example of a display element includes a plurality of microcapsules 53. The electrophoretic element 50 is fixed between the element substrate 28 and the counter substrate 29 using an adhesive layer 31. That is, the adhesive layer 31 is formed between the electrophoretic element 50 and both the substrates 28 and 29.
The adhesive layer 31 on the element substrate 28 side is necessary for bonding to the surface of the pixel electrode 51, but the adhesive layer 31 on the counter substrate 29 side is not essential. This is because the counter electrode 52, the plurality of microcapsules 53, and the adhesive layer 31 on the counter substrate 29 side are built in a consistent manufacturing process and then handled as an electrophoretic sheet with respect to the counter substrate 29 in advance. In this case, the reason why the adhesive layer 31 is necessary is that only the adhesive layer 31 on the element substrate 28 side is assumed.

  The element substrate 28 is a substrate made of, for example, glass or plastic. A pixel electrode 51 is formed on the element substrate 28, and the pixel electrode 51 is formed in a rectangular shape for each pixel circuit P. Although not shown, the scanning lines 32, the data lines 34, and the first lines shown in FIGS. Branch power supply line 63, second branch power supply line 64, power supply lines 13 and 14, selection switch Ts, memory circuit 25, switch circuit 35, and the like.

Since the counter substrate 29 is on the image display side, the counter substrate 29 is a substrate having translucency such as glass. For the counter electrode 52 formed on the counter substrate 29, a material having translucency and conductivity is used, for example, MgAg (magnesium silver), ITO (indium tin oxide), IZO (indium zinc). Oxide) or the like.
The electrophoretic element 50 is generally formed in advance on the counter substrate 29 side and is handled as an electrophoretic sheet including the adhesive layer 31. A protective release paper is attached to the adhesive layer 31 side.
In the manufacturing process, the display unit 30 is formed by attaching the electrophoretic sheet from which the release paper is peeled off to the separately manufactured element substrate 28 on which the pixel electrode 51 and the circuit are formed. Yes. For this reason, in a general configuration, the adhesive layer 31 exists only on the pixel electrode 51 side.

FIG. 4 is a configuration diagram of the microcapsule 53. The microcapsule 53 is formed of a polymer resin having a particle size of, for example, about 50 μm and having translucency such as acrylic resin such as polymethyl methacrylate and polyethyl methacrylate, urea resin, and gum arabic. The microcapsule 53 is sandwiched between the counter electrode 52 and the pixel electrode 51 described above, and a plurality of microcapsules 53 are arranged vertically and horizontally in one pixel. A binder (not shown) for fixing the microcapsule 53 is provided so as to fill the periphery of the microcapsule 53.
The microcapsule 53 is a spherical body, and inside thereof, a dispersion medium 54 that is a solvent for dispersing the electrophoretic particles, a plurality of white particles (electrophoretic particles) 55 as the electrophoretic particles, and a plurality of black particles Charged particles with (electrophoretic particles) 56 are enclosed. In this embodiment, the white particles are negatively charged and the black particles are positively charged. The present invention is not limited to such an embodiment, and white particles may be negatively charged and black particles may be positively charged.

The dispersion medium 54 is a liquid that disperses the white particles 55 and the black particles 56 in the microcapsules 53.
Examples of the dispersion medium 54 include alcohol solvents such as water, methanol, ethanol, isopropanol, butanol, octanol, and methyl cellosolve, various esters such as ethyl acetate and butyl acetate, and ketones such as acetone, methyl ethyl ketone, and methyl isobutyl ketone. , Aliphatic hydrocarbons such as pentane, hexane and octane, alicyclic hydrocarbons such as cyclohexane and methylcyclohexane, benzene, toluene, xylene, hexylbenzene, hebutylbenzene, octylbenzene, nonylbenzene, decylbenzene , Aromatic hydrocarbons such as benzenes having a long chain alkyl group such as undecylbenzene, dodecylbenzene, tridecylbenzene, tetradecylbenzene, etc., and methylene chloride, chloroform, carbon tetrachloride, 1,2-dichloroethane, etc. Gen hydrocarbons include those obtained by blending a surfactant or the like alone or a mixture thereof such as carboxylic acid salts, or various other oils.

The white particles 55 are particles (polymer or colloid) made of a white pigment such as titanium dioxide, zinc white, and antimony trioxide, and are positively charged, for example.
The black particles 56 are particles (polymer or colloid) made of a black pigment such as aniline black or carbon black, and are negatively charged, for example.
For this reason, the white particles 55 and the black particles 56 can move in the electric field generated by the potential difference between the pixel electrode 51 and the counter electrode 52 in the dispersion medium 54.

These pigments include electrolytes, surfactants, metal soaps, resins, rubbers, oils, varnishes, charge control agents composed of particles such as compounds, titanium-based coupling agents, aluminum-based coupling agents, silanes as necessary. A dispersant such as a system coupling agent, a lubricant, a stabilizer, and the like can be added.
Here, the description has been made with two particle types of white and black, but one particle type or three or more particle types may be used, and the color of the particles is not limited to white and black, and any combination of colored particles may be used. There may be.
In addition to the configuration in which particles and a dispersion medium are enclosed in a microcapsule, for example, a partition wall that is divided into fine spaces is formed on the element substrate 28 with an epoxy resin or the like, and the particles and the dispersion medium are filled in the partition. A structure in which the counter substrate 29 on which the electrode 52 is formed is bonded to the top of the partition wall with the adhesive layer 31 may be employed.

5 and 6 are diagrams illustrating the operation of the microcapsule 53. FIG. When the pixel electrode 51 is at a low potential and the counter electrode 52 is at a high potential in the relationship between the pixel electrode 51 and the counter electrode 52, the positively charged white particles 55 migrate to the pixel electrode 51 side in the microcapsule 53. On the other hand, the negatively charged black particles 56 migrate to the counter electrode 52 side in the microcapsule 53. As a result, the black particles 56 gather on the display surface side (counter electrode 52 side) in the microcapsule 53. When the pixel circuit P is viewed from the counter electrode 52 side that is the observation side, the color of the black particles 56 is increased. “Black” is recognized.
On the other hand, in the relationship between the pixel electrode 51 and the counter electrode 52, when the pixel electrode 51 is at a high potential and the counter electrode 52 is at a low potential, the negatively charged black particles 56 migrate to the pixel electrode 51 side in the microcapsule 53. To do. On the other hand, the positively charged white particles 55 migrate to the counter electrode 52 side in the microcapsule 53. As a result, the white particles 55 gather on the display surface side (counter electrode 52 side) of the microcapsule 53. When the pixel circuit P is viewed from the counter electrode 52 side, which is the observation side, the color of the white particles 55 is obtained. A certain “white” is recognized.
As described above, the voltage between the pixel electrode 51 and the counter electrode 52 is set to a value corresponding to the gradation (brightness) to be displayed, and the charged particles are migrated to obtain a desired gradation display. be able to.

  Note that when the application of voltage between the pixel electrode 51 and the counter electrode 52 is stopped, the electric field disappears, and thus the electrophoretic particles are stopped by the viscous resistance of the solvent. The charged particles are displayed in a state where a predetermined voltage is applied by an attractive force such as an electric mirror force with the counter electrode 52 or a fan = Dell = Wasle force, even after the application of the predetermined voltage is stopped. It has a property (memory property) that can be maintained.

Returning to FIG. The scanning line driving circuit 42 outputs a scanning signal to each scanning line 32. That is, the scanning line driving circuit 42 sequentially selects a predetermined scanning line 32, applies a high level voltage to the selected scanning line 32, and applies a low level voltage to the unselected scanning lines 32. A signal is output to each scanning line 32.
Therefore, when the i-th scanning line 32 is selected, a high-level voltage is applied to the i-th scanning line 32, so that the selection switches T of the n pixel circuits P belonging to the i-th row are simultaneously turned on. Changes to the on state.

The data line driving circuit 44 generates data signals Vx [1] to Vx [n] corresponding to one row (n) of pixel circuits P selected by the scanning line driving circuit 42 and outputs them to the data lines 34. To do. Here, the data signal output to the data line 34 in the j-th column is denoted as Vx [j].
Here, it is assumed that the data signal Vx is supplied to the pixel circuit P located in the i-th row and the j-th column. In this case, the data line driving circuit 44 is synchronized with the timing at which the scanning line driving circuit 42 selects the i-th scanning line 32 (“specified gradation”) for the pixel circuit P. ) Is output to the data line 34 in the j-th column as a data signal Vx [j].

The data signal Vx [j] is supplied (written) to the pixel electrode 51 of the pixel circuit P through the selection switch Ts (see FIG. 2) in the on state. Thereby, the voltage between both ends of the electrophoretic element 50 of the pixel circuit P (the voltage between the pixel electrode 51 and the counter electrode 52) is set to a value corresponding to the designated gradation of the pixel circuit P.
In the present embodiment, the designated gradation has two values, “black” (low level) and “white” (high level).
In this way, the drive unit 40 selects the i-th scanning line 32, and the data signal Vx [j having a magnitude corresponding to the designated gradation of the pixel circuit P located in the i-th row and the j-th column. ] Is output to the data line 34 in the j-th column.
Then, the data signal Vx [j] is supplied to the input terminal N1 of the memory circuit 25 of the pixel circuit P via the selection switch Ts (see FIG. 2) in the on state, and the contents of the memory circuit 25 are specified on the designated floor. Programmed. Thereby, the voltage between both ends of the electrophoretic element 50 of the pixel circuit P (the voltage between the pixel electrode 51 and the common electrode 52) is set to a value corresponding to the designated gradation of the pixel circuit P.
In this way, the drive unit 40 selects the i-th scanning line 32, and the data signal Vx [j having a magnitude corresponding to the designated gradation of the pixel circuit P located in the i-th row and the j-th column. ] Is output to the data line 34 in the j-th column.
This operation is referred to as a program of the data signal Vx [j] for the pixel circuit P.

FIG. 7 is a diagram illustrating a configuration example of the data line driving circuit 44. As shown in the figure, the data line driving circuit 44 includes a shift register 44-1, a first latch circuit 44-2, and a second latch circuit 44-3.
The shift register 44-1 shifts the start pulse SP according to the clock signal CK supplied from the control circuit 20, and shifts from the first stage corresponding to the first column data line 34 to the nth column data line 34. Sampling signals s1 to sn are sequentially output up to the corresponding n-th stage.
The first latch circuit 44-2 sequentially takes in the video signal VIDEO for a period corresponding to the sampling signals s1 to sn from the stage where the sampling signals s1 to sn are input, and outputs them to the second latch circuit 44-3. The video signal VIDEO is supplied from the control circuit 20 to the first latch circuit 44-2.

The second latch circuit 44-3 receives the video signal VIDEO (data signals Vx [1] to Vx [n] for one row supplied from each stage of the first latch circuit 44-2 at the timing when the latch pulse LAT becomes active. ]) And the data signals Vx [1] to Vx [n] for one row are simultaneously supplied from the first column to the data line 34 of the nth column.
Specifically, for example, after the data signals Vx [1] to Vx [n] for one row corresponding to the i-th row are fetched from the video signal VIDEO to the first latch circuit 44-2, the latch pulse LAT is activated. , The data signals Vx [1] to Vx [n] for one row corresponding to the i row are simultaneously supplied from the first column to the data line 34 of the nth column. In synchronization with this, the scanning line driving circuit 42 sets the scanning signal Gw [i] to an active level.
As a result, the memory circuits 25 of all the pixel circuits P on the i row are programmed to the designated gradation.

[Driving when changing display]
Next, the counter electrode 52 (52-1, 52-2), the method of applying a voltage to the counter electrode 52 (52-1, 52-2), and the optical change of the pixel circuit when the display is changed in the present embodiment. Will be described.
As shown in FIG. 8, the counter electrode in this embodiment includes a first counter electrode 52-1 and a second counter electrode 52-2. The first counter electrode 52-1 and the second counter electrode 52-2 are rectangular electrodes whose longitudinal direction is the row direction, and are arranged alternately in the column direction. The first counter electrode 52-1 is connected to the first common power line 65, and the second counter electrode 52-2 is connected to the second common power line 66. Note that the width and position in the column direction of the first counter electrode 52-1 and the second counter electrode 52-2 do not have to coincide with the width and position in the column direction of the pixel electrode P.

  As shown in FIG. 9, the control circuit 20 applies a voltage waveform in which a high level voltage and a low level voltage are alternately repeated at a predetermined cycle to the first common power line 65 as a first common voltage VCOM0. . In addition, the control circuit 20 has the second common power supply line 66 whose phase is shifted by a half cycle (π radians) from the first common voltage VCOM0 and is at a high level in the same cycle as the first common voltage VCOM0. A voltage waveform in which a voltage and a low level voltage are alternately repeated is applied as the second common voltage VCOM1. That is, the control circuit 20 applies a low level voltage to one of the first counter electrode 52-1 and the second counter electrode 52-2 and applies a low level voltage to the other. In a period during which a low level voltage is applied, a high level voltage is applied to the other.

  FIG. 9 shows a pixel circuit P0_0 in which the first counter electrode 52-1 is a counter electrode and displaying white, and a pixel in which the second counter electrode 52-2 is a counter electrode and displaying white. The optical response of each pixel circuit when the display of the circuit P0_1 is changed to black (the memory circuit 25 is programmed to a low level) is schematically shown. FIG. 9 shows a pixel circuit P1_0 in which the first counter electrode 52-1 is a counter electrode and displays black, and the second counter electrode 52-2 is a counter electrode and displays black. The optical response of each pixel circuit when the display of the pixel circuit P1_1 being changed to white (the memory circuit 25 is programmed to a high level) is schematically shown.

In the example shown in FIG. 9, a voltage of 15 V, which is a high level voltage, is applied with a low level potential as a reference (0 V). During the driving period, a low-level voltage 0 V is applied to the first power supply line 61, and a high-level voltage 15 V is applied to the second power supply line 62.
Then, a voltage of 0 V is applied to the pixel circuit P0_0 and the pixel electrode 51 of the pixel circuit P0_1 in which the memory circuit 25 displays white programmed at a low level during the driving period. Further, a voltage of 15 V is applied to the pixel circuit P1_0 displaying the black color in which the memory circuit 25 is programmed to a high level and the pixel electrode 51 of the pixel circuit P1_1 during the driving period. Further, a voltage that alternately repeats 15V and 0V is applied as the first common voltage VCOM0. Further, a voltage that alternately repeats 0V and 15V is applied as the second common voltage VCOM1.

  As shown in FIG. 9, in the first period T1 of the driving period, a voltage of 0 V is applied to the pixel circuit P0_0 displaying white and the pixel electrode 51 of the pixel circuit P0_1, and the first voltage in the pixel circuit P0_0 is set. A first common voltage VCOM0 of 15V is applied to the counter electrode 52-1. The second common voltage VCOM1 of 0 V is applied to the second counter electrode 52-2 in the pixel circuit P0_1. Therefore, the potential difference of the pixel electrode 51 with respect to the first counter electrode 52-1 of the pixel circuit P0_0 becomes −15 V, and the negatively charged black particles start moving to the first counter electrode 52-1, A tone change occurs. In FIG. 9, a dotted line schematically showing the optical response of the pixel circuit P0_0 is drawn as a dotted line having an inclination in the period T1, and this indicates that a change in gradation occurs. However, in the pixel circuit P0_1, the potential difference of the pixel electrode 51 with respect to the second counter electrode 52-2 is 0 V, no particle movement occurs, and no gradation change occurs. In FIG. 9, a solid line schematically showing the optical response of the pixel circuit P0_1 is drawn as a solid line having no inclination in the period T1, and this indicates that no change in gradation occurs.

  In the next period T2, a voltage of 0V is applied to the pixel circuit 51 of the pixel circuit P0_0 and the pixel circuit P0_1, and a first common voltage VCOM0 of 0V is applied to the first counter electrode 52-1 in the pixel circuit P0_0. Is done. In addition, a voltage of 15 V is applied to the second counter electrode 52-2 in the pixel circuit P0_1. Therefore, the potential difference of the pixel electrode 51 with respect to the first counter electrode 52-1 of the pixel circuit P0_0 is 0 V, no particle movement occurs, and no change in gradation occurs. However, in the pixel circuit P0_1, the potential difference of the pixel electrode 51 with respect to the second counter electrode 52-2 becomes -15V, and the negatively charged black particles start moving to the second counter electrode 52-2. A gradation change occurs.

  In the next period T3, a voltage of 0V is applied to the pixel circuit 51 of the pixel circuit P0_0 and the pixel circuit P0_1, and a first common voltage VCOM0 of 15V is applied to the first counter electrode 52-1 in the pixel circuit P0_0. Is done. The second common voltage VCOM1 of 0 V is applied to the second counter electrode 52-2 in the pixel circuit P0_1. Therefore, the potential difference of the pixel electrode 51 with respect to the first counter electrode 52-1 of the pixel circuit P0_0 becomes −15 V, and the negatively charged black particles start moving to the first counter electrode 52-1, A tone change occurs. However, in the pixel circuit P0_1, the potential difference of the pixel electrode 51 with respect to the second counter electrode 52-2 is 0 V, no particle movement occurs, and no gradation change occurs.

  In the same manner, the pixel circuit P0_0 displaying white similarly sequentially repeats the period with gradation change and the period without gradation change, and the display color gradually changes from white to black. Further, the pixel circuit P0_1 that displayed white sequentially repeats the period without gradation change and the period with gradation change, and the display color gradually changes from white to black. Accordingly, the same color pixel circuits P0_0 and P0_1 corresponding to the adjacent first counter electrode 52-1 and second counter electrode 52-2 have no change in the other gradation when there is a change in one gradation. In addition, when there is no change in one of the gradations, there is a change in the other gradation, so that it appears mixed to the user who is looking at the display portion. As shown, it is smoothed to reduce flicker.

  Next, as shown in FIG. 9, a voltage of 15 V is applied to the pixel circuit P1_0 displaying the black color and the pixel electrode 51 of the pixel circuit P1_1 in the first period T1 of the driving period, and the pixel circuit P1_0. A first common voltage VCOM0 of 15V is applied to the first counter electrode 52-1. The second common voltage VCOM1 of 0 V is applied to the second counter electrode 52-2 in the pixel circuit P1_1. Therefore, the potential difference of the pixel electrode 51 with respect to the first counter electrode 52-1 of the pixel circuit P1_0 is 0 V, no particle movement occurs, and no change in gradation occurs. In FIG. 9, a dotted line schematically showing the optical response of the pixel circuit P1_0 is drawn as a dotted line having no inclination in the period T1, and this indicates that no change in gradation occurs. However, in the pixel circuit P1_1, the potential difference of the pixel electrode 51 with respect to the second counter electrode 52-2 becomes 15V, and the positively charged white particles start moving to the second counter electrode 52-2, A tone change occurs. In FIG. 9, a straight line schematically showing the optical response of the pixel circuit P1_1 is drawn as a straight line having an inclination in the period T1, and this indicates that a change in gradation occurs.

  In the next period T2, a voltage of 15V is applied to the pixel circuit P1_0 and the pixel electrode 51 of the pixel circuit P1_1, and a voltage of the first common voltage VCOM0 of 0V is applied to the first counter electrode 52-1 in the pixel circuit P1_0. Is applied. A voltage of 15 V is applied to the second counter electrode 52-2 in the pixel circuit P1_1. Therefore, the potential difference of the pixel electrode 51 with respect to the first counter electrode 52-1 of the pixel circuit P1_0 becomes 15V, and the positively charged white particles start moving to the second counter electrode 52-2, and the gradation Changes occur. However, in the pixel circuit P1_1, the potential difference of the pixel electrode 51 with respect to the second counter electrode 52-2 is 0 V, no particle movement occurs, and no gradation change occurs.

  In the next period T3, a voltage of 15V is applied to the pixel circuit P1_0 and the pixel electrode 51 of the pixel circuit P1_1, and a first common voltage VCOM0 of 15V is applied to the first counter electrode 52-1 in the pixel circuit P1_0. Is done. The second common voltage VCOM1 of 0 V is applied to the second counter electrode 52-2 in the pixel circuit P1_1. Therefore, the potential difference of the pixel electrode 51 with respect to the first counter electrode 52-1 of the pixel circuit P1_0 is 0 V, no particle movement occurs, and no change in gradation occurs. However, in the pixel circuit P1_1, the potential difference of the pixel electrode 51 with respect to the second counter electrode 52-2 becomes 15 V, and the positively charged white particles start to move to the first counter electrode 52-1, A tone change occurs.

In the same manner, the pixel circuit P1_0 displaying black similarly repeats the period without gradation change and the period with gradation change, and the display color gradually changes from black to white. In addition, the pixel circuit P1_1 that displayed black sequentially repeats the period with gradation change and the period without gradation change, and the display color gradually changes from black to white. Accordingly, the same color pixel circuits P1_0 and P1_1 corresponding to the adjacent first counter electrode 52-1 and second counter electrode 52-2 have no change in the other gradation when there is a change in one gradation. In addition, when there is no change in one of the gradations, there is a change in the other gradation, so that it appears mixed to the user who is looking at the display portion. As shown, it is smoothed to reduce flicker.
The above is a case of the pixel circuit P facing the first counter electrode 52-1, and the pixel circuit P facing the second counter electrode 52-2. However, the pixel electrode 51 of one pixel circuit P is The same effect can be obtained even when both the first counter electrode 52-1 and the second counter electrode 52-2 are opposed to each other.

(Comparative example)
Next, the comparative example compared with embodiment of this invention is demonstrated. FIG. 15 schematically shows an optical response of each pixel circuit in the comparative example in which the counter electrode 52 is provided in common to all the pixel circuits. In the comparative example, the pixel circuit P0 displays white, the memory circuit 25 is programmed to low level, the pixel circuit P1 displays black, and the memory circuit 25 is programmed to high level. To do.
As shown in FIG. 15, in the first period T1 of the driving period, a voltage of 0V is applied to the pixel electrode 51 of the pixel circuit P0 displaying white, and a common voltage VCOM of 15V is applied to the counter electrode 52. Applied. Therefore, the potential difference of the pixel electrode 51 with respect to the counter electrode 52 of the pixel circuit P0 becomes −15 V, and the negatively charged black particles start moving to the counter electrode 52, causing a change in gradation. In FIG. 15, a solid line schematically showing the optical response of the pixel circuit P0 is drawn as a solid line having an inclination in the period T1, and this indicates that a change in gradation occurs.

  In the next period T2, a voltage of 0 V is applied to the pixel electrode 51 of the pixel circuit P0, and a common voltage VCOM of 0 V is applied to the counter electrode 52. Therefore, the potential difference with respect to the counter electrode 52 of the pixel electrode 51 in the pixel circuit P0 is 0 V, no particle movement occurs, and no gradation change occurs. In FIG. 15, a solid line schematically showing the optical response of the pixel circuit P0 is drawn as a solid line having no inclination in the period T2, and this indicates that no change in gradation has occurred.

  In the next period T3, a voltage of 0 V is applied to the pixel electrode 51 of the pixel circuit P0, and a common voltage VCOM of 15 V is applied to the counter electrode 52. Accordingly, the potential difference of the pixel electrode 51 with respect to the counter electrode 52 in the pixel circuit P0 becomes −15 V, and the negatively charged black particles start moving to the counter electrode 52, causing a change in gradation.

  In the same manner, the pixel circuit P0 that displayed white similarly sequentially repeats the period with gradation change and the period without gradation change, and the display color gradually changes from white to black. Therefore, the optical change in the pixel circuit P0 becomes discontinuous as shown in FIG. 15, and flickering occurs.

  Next, as shown in FIG. 15, a voltage of 15 V is applied to the pixel electrode 51 of the pixel circuit P1 displaying black, and a voltage of 15 V is applied to the counter electrode 52, as shown in FIG. A common voltage VCOM is applied. Accordingly, the potential difference of the pixel electrode 51 with respect to the counter electrode 52 in the pixel circuit P1 is 0 V, no particle movement occurs, and no gradation change occurs. In FIG. 15, a solid line schematically showing the optical response of the pixel circuit P1 is drawn as a solid line having no inclination in the period T1, and this indicates that no gradation change has occurred.

  In the next period T2, a voltage of 15V is applied to the pixel electrode 51 of the pixel circuit P1, and a common voltage VCOM of 0V is applied to the counter electrode 52. Therefore, the potential difference of the pixel electrode 51 with respect to the counter electrode 52 in the pixel circuit P1 becomes 15 V, and the positively charged white particles start moving to the counter electrode 52, and a change in gradation occurs. In FIG. 15, a solid line schematically showing the optical response of the pixel circuit P1 is drawn as a solid line having an inclination in the period T2, which indicates that a change in gradation has occurred.

  In the next period T3, a voltage of 15V is applied to the pixel electrode 51 of the pixel circuit P1, and a common voltage VCOM of 15V is applied to the counter electrode 52. Accordingly, the potential difference of the pixel electrode 51 with respect to the counter electrode 52 in the pixel circuit P1 is 0 V, no particle movement occurs, and no gradation change occurs.

  In the same manner, the pixel circuit P1 displaying black similarly sequentially repeats the period without gradation change and the period with gradation change, and the display color gradually changes from black to white. Therefore, the optical change in the pixel circuit P1 becomes discontinuous as shown in FIG. 15, and flickering occurs.

As is apparent from a comparison between the comparative example as described above and the present embodiment, in the comparative example, a discontinuous optical change causes flickering. Therefore, in order to prevent flickering, it is necessary to increase the frequency of the common voltage VCOM. As a result, power consumption may increase unnecessarily due to stray capacitance. In addition, the voltage waveform may become dull due to the resistance of the electrode, and a predetermined voltage cannot be applied, which may require a larger voltage supply.
However, in the present embodiment, the same color pixel circuit corresponding to the adjacent first counter electrode 52-1 and second counter electrode 52-2 adjacent to each other has a change in one gradation. There is no change, and when there is no change in one of the gradations, there is a change in the other gradation, so it appears mixed to the user looking at the display part, so discontinuous optical changes are averaged. The flicker is reduced with a smooth change. Therefore, in this embodiment, the frequency of the common voltages VCOM0 and VCOM1 does not need to be increased unnecessarily, an increase in useless power consumption is prevented, and it is not necessary to supply a large voltage.

[Erase driving]
Next, an optical change of the pixel circuit at the time of erasing in the present embodiment will be described. At the time of erasing, as shown in FIG. 10, a voltage of 15 V, for example, is applied to the pixel electrodes of all the pixel circuits. In the pixel circuits P0-0 and P0-1 displaying white, when the potential difference between the pixel electrodes with respect to the first counter electrode 52-1 or the second counter electrode 52-1 is 0 V, the level is 0. There is no key change. Even when the potential difference between the pixel electrodes based on the first counter electrode 52-1 or the second counter electrode 52-1 is 15V, the direction of the electric field is positively charged white particles. −1 or the direction toward the second counter electrode 52-1, the gradation is not changed and the white display is maintained.

Further, in the pixel circuits P1-0 and P1-1 displaying black, the operation is the same as the operation described with reference to FIG. 9, and therefore, as shown in FIG. Since there is no change in the other gradation at one time, and there is a change in the other gradation when there is no change in one of the gradations, it appears to be mixed for the user looking at the display unit, so it is discontinuous. Smooth optical changes are averaged to make smooth changes, reducing flicker.
In the above description, the rectangular voltage waveform is applied to the first counter electrode 52-1, and the second counter electrode 52-2 is applied with the phase of the rectangular voltage waveform shifted by π radians.
However, the phase shift is not limited to π radians. For example, the phase shift may be shifted by π / 8 to π / 2 radians, or may be better.
For example, if the period during which the voltage difference between the first counter electrode 52-1 and the second counter electrode 52-2 is large becomes long, charged particles migrate in the horizontal direction, and image bleeding tends to occur.
Therefore, the phase shift amount may be set as appropriate so that the effect of erasing the afterimage is obtained and there is no image blur.
Further, the voltage waveform may be a trapezoidal shape, a triangular wave, a sawtooth wave, a stepped wave, a sine wave or the like in addition to the rectangular wave. The voltage waveform shape should be changed depending on the electro-optical characteristics of the optical element. For example, in the case of an electrophoretic element, a high driving voltage is applied at the beginning of the driving period, and particles are peeled off from the counter electrode 52 to facilitate migration. Then, when a relatively low drive waveform is used, a stepped wave is suitable. When the optical element is capacitive, a triangular wave or a sine wave may be suitable to prevent an increase in transient current. is there. Therefore, the voltage waveform shape may be set as appropriate.
Further, the voltage waveforms applied to the first counter electrode 52-1 and the second counter electrode 52-2 do not have to be completely the same shape, and may be included in a part of the drive period.

In the present embodiment, the pixel electrodes 51 of the adjacent pixel circuits P1-0 and P1-1 are at the same potential (15V), but they correspond to the adjacent pixel circuit P1-0 and the pixel circuit P1-1. The potentials of the first counter electrode 52-1 and the second counter electrode 52-2 are different from each other. That is, when the voltage of the first counter electrode 52-1 is 15V, the voltage of the second counter electrode 52-2 is 0V, and when the voltage of the first counter electrode 52-1 is 0V. The voltage of the second counter electrode 52-2 is 15V, which are opposite to each other. Therefore, in the present embodiment, not only the electric field in the direction from the pixel electrode 51 to the first counter electrode 52-1 or the second counter electrode 52-2, that is, the vertical electric field, but also the adjacent first A horizontal electric field is also generated between the counter electrode 52-1 and the second counter electrode 52-2.
As a result, in the present embodiment, the vertical electric field and the horizontal electric field are combined to generate an oblique electric field. In the case of only an electric field in the vertical direction from the pixel electrode to the counter electrode or from the counter electrode to the pixel electrode, the white particles and the black particles may interfere with each other and the movement may not be performed smoothly. As a result, a so-called afterimage may occur in which the previous display image remains thin. However, when an electric field in an oblique direction is generated, the particles at the pixel boundary are driven in the oblique direction, so that there are a plurality of particle movement directions, and the movement is thought to be smooth. Since the movement of the particles becomes smooth as described above, it is possible to perform the erasing operation without generating a so-called afterimage in which the previous display image remains thin.
As described above, in the present embodiment, two types of counter electrodes arranged alternately in the column direction can be used without programming so that the potential difference between each pixel electrode and the counter electrode of the adjacent pixel circuit is different. In addition, since different voltages are applied to each other, an oblique electric field can be generated by a simple method of applying a voltage of, for example, 15 V to the pixel electrodes of all the pixel circuits.

(Comparative example)
In the conventional electrophoretic display device, as described above, a common counter electrode is provided for all the pixel circuits. Therefore, in order to make the potential difference between the pixel electrode and the counter electrode of each adjacent pixel circuit different, the memory of each pixel circuit also has a different voltage applied to the pixel electrodes of each adjacent pixel circuit. It is necessary to program the circuit in advance. When this program is executed, the potentials of all the data lines are always switched between a low level (for example, 0 V) and a high level (for example, 15 V) for each row, so that a large amount of power is consumed due to the parasitic capacitance associated with the data lines. There was a case. Also, it takes time to program the entire screen.

  As is clear from the comparison between the comparative example as described above and the present embodiment, the present embodiment can perform an erasing operation without an afterimage by generating an oblique electric field without programming the entire screen. Therefore, an erasing operation with low power consumption and no afterimage can be performed in a short time.

  As described above, according to the present invention, the counter electrode is divided into the first counter electrode and the second counter electrode, and the first counter electrode and the second counter electrode are alternately arranged in the column direction. And a transient response that changes the display color to the same color in adjacent pixels by providing a control circuit that alternately applies voltages having opposite polarities to each other in a predetermined cycle to the first counter electrode and the second counter electrode. The flicker can be prevented without increasing the frequency of the voltage applied to the counter electrode. Further, it is possible to erase without image lag in a short time with low consumption.

Second Embodiment
Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 11 is a diagram showing the configuration of the first counter electrode 52-1 and the second counter electrode 52-2 in the second embodiment.
As shown in FIG. 11, the first counter electrode 52-1 and the second counter electrode 52-2 in the present embodiment are both formed in a rectangular shape and are arranged in a lattice shape. That is, in the present embodiment, the first counter electrode 52-1 and the second counter electrode 52-2 are alternately arranged in the row direction and also in the column direction. The first counter electrode 52-1 is connected to the first common power line 65, and the second counter electrode 52-2 is connected to the second common power line 66.

  The method of applying a voltage to the first counter electrode 52-1 and the second counter electrode 52-2 is the same as in the first embodiment, and the first common power supply line 65 has a high level voltage and a low level voltage. Is applied with a first common voltage VCOM0 that is alternately switched in a predetermined cycle. Further, the second common power line 66 is applied with a second common voltage VCOM0 whose phase is shifted by a half period from the first common voltage VCOM0 and the high level voltage and the low level voltage are alternately switched at a predetermined period. To do. Thus, by applying a common voltage to the first counter electrode 52-1 and the second counter electrode 52-2, the first counter electrode 52-1 and the second counter electrode adjacent in the row direction and the column direction are adjacent to each other. A voltage whose polarity is inverted can be applied to the electrode 52-2.

  Also in this embodiment, the transient response that changes the display color to the same color in the adjacent pixels can be smoothed, and flickering can be prevented without increasing the frequency of the voltage applied to the counter electrode. Further, it is possible to erase without image lag in a short time with low consumption. In particular, in the present embodiment, it is possible to apply a voltage whose polarity is inverted between the adjacent counter electrodes not only in the row direction but also in the column direction, so that it is more excellent in prevention of flickering and erasing with reduced afterimages. The effect can be demonstrated. Also in the present embodiment, the width and position in the column direction and the row direction of the first counter electrode 52-1 and the second counter electrode 52-2 are the width and position in the column direction and the row direction of the pixel electrode P. Does not have to match.

<Third Embodiment>
Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 12 is a diagram illustrating the configuration of the first counter electrode 52-1 and the second counter electrode 52-2 in the third embodiment. As shown in FIG. 12, in this embodiment as well, as in the second embodiment, the first counter electrode 52-1 and the second counter electrode 52-2 are both formed in a rectangular shape. Arranged in a grid. That is, in the present embodiment, the first counter electrode 52-1 and the second counter electrode 52-2 are alternately arranged in the row direction and also in the column direction. In FIG. 12, the counter electrode displayed in white is the first counter electrode 52-1, and the counter electrode displayed in black is the second counter electrode 52-2.

  However, in the present embodiment, the first counter electrode 52-1 and the second counter electrode 52-2 are each connected on a diagonal line, and a connection line that connects the first counter electrodes 52-1 to each other. The intersection with the connection line connecting the second counter electrodes 52-2 is insulated. In addition, as in the first and second embodiments, the first counter electrode 52-1 is connected to the first common power line 65 (not shown in FIG. 12), and the second counter electrode 52-1 is connected to the second counter electrode 52-1. The electrode 52-2 is connected to a second common power supply line 66 (not shown in FIG. 12).

  The method of applying a voltage to the first counter electrode 52-1 and the second counter electrode 52-2 is the same as in the first and second embodiments, and the first common power line 65 has a high level. A first common voltage VCOM0 is applied so that the low level voltage and the low level voltage are alternately switched at a predetermined cycle. Further, the second common power line 66 is applied with a second common voltage VCOM0 whose phase is shifted by a half period from the first common voltage VCOM0 and the high level voltage and the low level voltage are alternately switched at a predetermined period. To do. Thus, by applying a common voltage to the first counter electrode 52-1 and the second counter electrode 52-2, the first counter electrode 52-1 and the second counter electrode adjacent in the row direction and the column direction are adjacent to each other. A voltage whose polarity is inverted can be applied to the electrode 52-2.

  Also in this embodiment, the transient response that changes the display color to the same color in the adjacent pixels can be smoothed, and flickering can be prevented without increasing the frequency of the voltage applied to the counter electrode. Further, it is possible to erase without image lag in a short time with low consumption. In particular, in the present embodiment, it is possible to apply a voltage whose polarity is inverted between the adjacent counter electrodes not only in the row direction but also in the column direction, so that it is more excellent in prevention of flickering and erasing with reduced afterimages. The effect can be demonstrated. Also in the present embodiment, the width and position in the column direction and the row direction of the first counter electrode 52-1 and the second counter electrode 52-2 are the width and position in the column direction and the row direction of the pixel electrode P. Does not have to match.

  In addition, this embodiment can function not only as an electrophoretic display device but also as a detection element (capacitive input sensor element). For example, in a period in which the display is not changed, the second counter electrode 52-2 displayed in black in FIG. 12 is sequentially selected to supply a predetermined voltage signal, and the first counter displayed in white in FIG. The counter electrode 52-1 group captures a signal due to capacitive coupling. Further, the first counter electrode 52-1 displayed in white in FIG. 12 is sequentially selected to supply a predetermined voltage signal, and the second counter electrode 52-2 group displayed in black in FIG. Then, an operation for capturing a signal by capacitive coupling is performed. Thus, if a potential difference is generated between the first counter electrode 52-1 and the second counter electrode 52-2, a capacitance according to the insulator (derivative) can be obtained. Since the human body has a lot of moisture and is conductive, the capacitance between the finger and the counter electrode increases when approaching the counter electrode. Therefore, the input coordinate can be detected by examining which line in the row direction and the column direction is larger. Thus, according to this embodiment, not only can it function as an electrophoretic display device, but it can also function as a detection element (capacitive input sensor element).

<Modification>
Hereinafter, modified examples of the above-described embodiments will be described. In order to avoid duplication of explanation, differences from the above-described embodiment will be described, and descriptions relating to common configurations will be omitted.
In 1st Embodiment mentioned above, although the shape which formed the shape of the 1st counter electrode 52-1 and the 2nd counter electrode 52-2 in the rectangular shape which makes a row direction a longitudinal direction was demonstrated, this invention. Is not limited to this configuration. For example, the first counter electrode 52-1 and the second counter electrode 52-2 may be formed in a rectangular shape with the column direction as the longitudinal direction.

<Application example>
Examples of electronic devices to which the present invention is applied will be described below. 13 and 14 show the appearance of an electronic apparatus that employs the electrophoretic display device 100 exemplified above.
FIG. 13 is a perspective view of a portable information terminal (electronic book) 310 using the electrophoretic display device 100. As illustrated in FIG. 13, the information terminal 310 includes an operation element 312 operated by a user and an electrophoretic display device 100 that displays an image on a display unit 314. When the operator 312 is operated, the display image on the display unit 314 is changed.
FIG. 14 is a perspective view of an electronic paper 320 using the electrophoretic display device 100. As shown in FIG. 14, the electronic paper 320 includes an electrophoretic display device 100 formed on the surface of a flexible substrate (sheet) 322.
The electronic device to which the present invention is applied is not limited to the above examples. For example, it is possible to employ the electrophoretic display device of the present invention in various electronic devices such as a mobile phone, a clock (watch), a portable sound reproducing device, an electronic notebook, and a touch panel mounted display device.
Further, the display element of the present invention is not limited to the electrophoretic element, and can be applied to a flying powder element, a liquid crystal element, and the like. Therefore, the memory-type display device of the present invention is not limited to the electrophoretic display device, and can also be applied to a liquid crystal display device having a memory property. Examples of electronic devices include information terminals using liquid crystal display devices, mobile phones and watches (watches), portable sound reproduction devices, electronic notebooks, touch panel-mounted display devices, tablets, electronic books, smartphones, etc. The memory type display device of the present invention can be employed in various electronic devices.

DESCRIPTION OF SYMBOLS 10 ... Electrophoresis panel, 13 ... 1st power supply line, 14 ... 2nd power supply line, 20 ... Control circuit, 28 ... Element substrate, 29 ... Counter substrate, 30 ... Display part, 31 ... Adhesive layer, 32 ... Scan line, 3434a, 34b ... data line, 35 ... switch circuit, 36, 37 ... transfer gate, 40 ... drive unit, 42 ... scan line drive circuit, 44 ... data line drive circuit, 44-1 ... shift register, 44- DESCRIPTION OF SYMBOLS 2 ... 1st latch circuit, 44-3 ... 2nd latch circuit, 50 ... Electrophoretic element, 51 ... Pixel electrode, 52 ... Counter electrode, 52-1 ... 1st counter electrode, 52-2 ... 2nd counter Electrode 53 ... Microcapsule 54 ... Dispersion medium 55 ... White particle 56 ... Black particle 57 ... Ion layer 60 ... Signal line 61 ... First power line 62 ... Second power line 65 ... 1st common power supply line, 66 ... 2nd common power supply , 100 ... electrophoretic display device, 310 ... information terminal, 312 ... operating element, 314 ... display unit, 320 ... electronic paper, P, P0_0, P0_1, P1_0, P1_1, ... image circuit, Ts ... selection switch.

Claims (7)

The pixel includes a plurality of pixels arranged in a matrix, and the pixel includes a plurality of pixel electrodes formed for each pixel, a counter electrode facing the pixel electrode, and a gap between the pixel electrode and the counter electrode. A memory type display device comprising a sandwiched display element,
The counter electrode includes a first counter electrode and a second counter electrode,
The first counter electrode and the second counter electrode are alternately arranged in at least one direction of a row direction or a column direction,
A control circuit that applies a voltage waveform of a predetermined period to the first counter electrode, and applies the voltage waveform to the second counter electrode out of phase;
A memory-type display device. The first counter electrode and the second counter electrode are formed in a shape having a row direction as a longitudinal direction,
The memory-type display device according to claim 1. The first counter electrode and the second counter electrode are formed in a rectangular shape and are arranged in a lattice shape.
The memory-type display device according to claim 1. The first counter electrode and the second counter electrode are connected on a diagonal line,
The memory type display device according to claim 3. The first counter electrode and the second counter electrode double as a capacitance type input detection element.
The storage type display device according to claim 4, wherein: The pixel includes a plurality of pixels arranged in a matrix, and the pixel includes a plurality of pixel electrodes formed for each pixel, a counter electrode facing the pixel electrode, and a gap between the pixel electrode and the counter electrode. The counter electrode includes a first counter electrode and a second counter electrode, and the first counter electrode and the second counter electrode are at least in a row direction or a column direction. A driving method of a memory type display device arranged alternately in one direction,
Applying a voltage waveform of a predetermined period to the first counter electrode;
Applying the voltage waveform to the second counter electrode with a phase shift.
A driving method of a memory type display device. An electronic apparatus comprising the memory type display device according to any one of claims 1 to 6.

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