JP2016100352A - Printed wiring board and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve connection reliability between a pad and a solder bump and release strain based on a difference between thermal expansion coefficients of a semiconductor element and a printed wiring board.SOLUTION: A printed wiring board comprises: a resin insulation layer 11 having a first surface 11a and a second surface 11b; a first conductor layer 12 which is formed on the first surface 11a side of the resin insulation layer 11 and includes pads 12c for mounting an electronic component and a wiring pattern 12b; and a second conductor layer 14 formed on the second surface 11b of the resin insulation layer 11. The pad 12c is composed of a base part 12c1 embedded in the resin insulation layer 11 and a post part 12c2 projecting from the resin insulation layer 11, and a width d of the post part 12c2 is smaller than a width w of the base part 12c1 and a surface of the base part 12c1 on the post 12c2 side is flush with the first surface 11a of the resin insulation layer 11. The pad 12c is an electric plated film where the base part 12c1 and the post part 12c2 are integrally formed.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a printed wiring board and a manufacturing method thereof. More particularly, the present invention relates to a printed wiring board having an improved structure of a pad connected to an electrode terminal of a semiconductor element when a semiconductor element or the like is mounted on the surface, and a method for manufacturing the same.

  Patent Document 1 discloses a multilayer substrate on which a semiconductor element is mounted via a solder bump on one surface side. However, in the multilayer substrate described in Patent Document 1, the surface of the pad to which the semiconductor element is connected is flat and has the same height as the surface of the outermost layer around the pad, or is recessed with respect to the surface of the outermost layer. It is out.

JP 2000-323613 A

  If the surface of the pad is flat as shown in Patent Document 1 and the surface is the same as or recessed from the surface around the pad, it is considered difficult to increase the height of the solder bump. For this reason, it is difficult to absorb the stress caused by the difference in thermal expansion coefficient between the semiconductor element and the multilayer substrate with a high solder bump, and it is difficult to fill the underfill resin between the multilayer substrate and the semiconductor element. It is done. Further, since the contact area between the pad and the solder bump is small only at the flat portion, it is considered that the reliability of soldering also decreases.

  An object of the present invention is to improve the reliability of connection between a pad and a solder bump and to form a bump that is easy to relieve stress based on a difference in thermal expansion coefficient between a semiconductor element and a printed wiring board, that is, has a high height. It is providing the printed wiring board which can be manufactured, and its manufacturing method.

  The printed wiring board of the present invention includes a resin insulating layer having a first surface and a second surface opposite to the first surface, and an electronic component formed on the first surface side of the resin insulating layer. A first conductor layer including a pad and a wiring pattern for mounting; a second conductor layer formed on the second surface of the resin insulating layer; and the first conductor formed through the resin insulating layer. And a via conductor connecting the layer and the second conductor layer. The pad includes a base portion embedded in the resin insulating layer and a post portion protruding from the resin insulating layer, and the width of the post portion is smaller than the width of the base portion, and the base The post-side surface of the portion is flush with the first surface of the resin insulating layer, and the pad is an electroplated film in which the base portion and the post portion are integrally formed.

  The method for manufacturing a printed wiring board according to the present invention includes forming a pattern of a first plating resist film on a metal film, and forming an electroplating film on the surface of the metal film exposed from the pattern of the first plating resist film. Forming a barrier layer on the surface of the metal film and the electroplating film exposed by removing the first plating resist film, and removing the first plating resist film; A pattern of a pad is included by forming a pattern of a second plating resist film on the barrier layer and forming an electroplating film on the barrier layer exposed from the pattern of the second plating resist film. Forming the first conductor layer; removing the second plating resist film; and forming the first conductor layer in a gap portion and a surface of the pattern; Forming a resin insulating layer having a conductor layer side as a first surface and a surface opposite to the first surface as a second surface; and forming an opening from the second surface side of the resin insulating layer; Forming a via conductor and forming a second conductor layer connected to the first conductor layer via the via conductor on the second surface of the resin insulation layer; and the metal film and the metal film Removing the electroplated film formed thereon, and removing the barrier layer over the entire surface.

Cross-sectional explanatory drawing of the printed wiring board of one Embodiment of this invention. The figure which shows the manufacturing process of the printed wiring board of FIG. The figure which shows the manufacturing process of the printed wiring board of FIG. The figure which shows the manufacturing process of the printed wiring board of FIG. The figure which shows the manufacturing process of the printed wiring board of FIG. The figure which shows the manufacturing process of the printed wiring board of FIG. The figure which shows the manufacturing process of the printed wiring board of FIG. The figure which shows the manufacturing process of the printed wiring board of FIG. The figure which shows the manufacturing process of the printed wiring board of FIG. The figure which shows the manufacturing process of the printed wiring board of FIG. The figure which shows the manufacturing process of the printed wiring board of FIG. The figure which shows the manufacturing process of the printed wiring board of FIG. The figure which shows the manufacturing process of the printed wiring board of FIG. The figure which shows the manufacturing process of the printed wiring board of FIG. The figure which shows the manufacturing process of the printed wiring board of FIG. The figure which shows the manufacturing process of the printed wiring board of FIG.

  A printed wiring board and a manufacturing method thereof according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a cross-sectional explanatory view of a printed wiring board 1 of the present embodiment. The printed wiring board 1 of the present embodiment is a pad for mounting electronic components on the first surface 11a side of the resin insulating layer 11 having a first surface 11a and a second surface 11b opposite to the first surface 11a. A first conductor layer 12 including 12c, a first pattern 12a, and a wiring pattern 12b is formed. The second conductor layer 14 is formed on the second surface 11 b of the resin insulating layer 11, and further, the via conductor 15 that penetrates the resin insulating layer 11 and connects the first conductor layer 12 and the second conductor layer 14. Is formed. The pad 12c includes a base portion 12c1 embedded in the resin insulating layer 11 and a post portion 12c2 protruding from the resin insulating layer 11, and the width d of the post portion 12c2 is smaller than the width w of the base portion 12c1. In addition, the surface of the base portion 12c1 on the post 12c2 side is flush with the first surface 11a of the resin insulating layer 11, and the pad 12c is an electroplated film in which the base portion 12c1 and the post portion 12c2 are integrally formed. .

  Here, the “width” of the post portion 12c2 and the base portion 12c1 is the cross-sectional shape of the post portion 12c2 and the base portion 12c1 in the plane substantially parallel to the first surface 11a of the resin insulating layer 11, and is the most from end to end. It means the distance of a long part. If the cross section is circular, it means the diameter, if it is rectangular, it means the length of the diagonal, and if it is elliptical, it means the length of the long diameter.

  That is, in the printed wiring board 1 of the present embodiment, the pad 12c of the first conductor layer 12 on which the semiconductor element (not shown) on the first surface side of the resin insulating layer 11 is mounted has the base portion 12c1 and the post portion 12c2. It is formed in a structure and is integrally formed by electroplating. Further, the base portion 12c1 is embedded in the resin insulating layer 11 like the first pattern 12a and the wiring pattern 12b, and only one surface thereof is exposed flush with the first surface 11a of the resin insulating layer 11, and the post The part 12c2 is characterized in that it protrudes from the first surface 11a of the resin insulating layer 11.

  By forming in this structure, when the electrode terminal of the semiconductor element (not shown) is connected to the pad by a solder bump, it is soldered between the upper surface of the post portion 12c2, and therefore the resin insulating layer 11 The distance between the 1st surface 11a and the surface in which the electrode terminal of a semiconductor element is provided can be enlarged. As a result, the stress generated by the difference in thermal expansion coefficient between the printed wiring board 1 and the semiconductor element is easily absorbed. Moreover, it becomes easy to flow the resin layer which makes an underfill into the clearance gap between them. In addition, according to the present embodiment, since the base portion 12c1 and the post portion 12c2 of the pad 12c are integrally formed, for example, if formed by copper plating or the like, the electrical resistance can be extremely reduced, Compared with the case where the surface is nickel-plated or the like, a printed wiring board having excellent electrical characteristics can be obtained.

  Further, since the pad is formed by the base portion 12c1 and the post portion 12c2, and the post portion 12c2 protrudes from the first surface 11a of the resin insulating layer 11, when the soldering is performed, the post portion 12c2 Since the solder is easily wetted on the side surface and the exposed surface of the base portion 12c1 and is bonded in a wide area, the reliability of soldering is improved. Moreover, when the pad 12c is formed of copper, for example, a film such as nickel plating or tin plating having a higher electric resistance than copper is not provided on the surface of the pad 12c. The pad 12c made of copper having a low thickness can be directly bonded, and the electrical resistance of the connection portion with a semiconductor element (not shown) may be reduced.

  Furthermore, the printed wiring board 1 of the present embodiment uses a nickel plating film as the barrier layer 23 (see FIG. 2D) as shown in an embodiment of the manufacturing method described later, but the nickel plating film is etched. In this case, it is used as a barrier layer and is not formed only on the pad portion, but is formed on the entire surface, and is later removed by etching. Therefore, unlike the case where what is formed as a barrier layer on the pad 12c is etched away later, the surface of the base portion 12c1 is not recessed from the first surface 11a of the resin insulating layer 11, and the first of the resin insulating layer 11 It can be formed flush with one surface 11a. That is, for example, a nickel plating film is applied only to the portion of the pad 12c, and when the nickel plating film is finally removed by etching, the nickel plating film is removed from the first surface 11a of the resin insulating layer 11. It will be recessed by the thickness. Since the bump is lowered by the amount of the depression, the gap between the resin insulating layer 11 and the semiconductor element is reduced. However, in the printed wiring board of the present embodiment, the nickel plating film is formed on the entire surface, and the first surface 11a of the resin insulating layer 11 and the surface of the base portion 12c1 of the pad 12c face the same nickel plating film. Even if the nickel plating film is removed by etching, the first surface 11a of the resin insulating layer 11 and the surface of the base portion 12c1 of the pad 12c are flush with each other. As a result, the solder bump does not fall below the first surface 11a of the resin insulating layer 11 even if the solder spreads to the exposed surface of the base portion 12c1. Therefore, the height of the solder bump can be increased.

  The resin insulating layer 11 is an insulating layer having a first surface 11a and a second surface 11b opposite to the first surface 11a. The resin insulating layer 11 may be a core material such as glass fiber impregnated with a resin composition containing a filler, or may be formed only of a resin composition containing a filler without containing a core material. . Further, it may be a single layer or may be formed from a plurality of insulating layers. If the resin insulating layer 11 is formed of a plurality of insulating layers, for example, the coefficient of thermal expansion, flexibility, and thickness can be easily adjusted. Examples of the resin include epoxy. Examples of the thickness of the resin insulating layer 11 include 25 to 100 μm. On the first surface 11 a side, the first conductor layer 12 is embedded and formed in the resin insulating layer 11 so that only one surface is exposed. The second conductor layer 14 is formed on the second surface 11 b of the resin insulating layer 11. Is formed.

  The first conductor layer 12 is a pattern formed by being embedded in the resin insulating layer 11 on the first surface 11 a side of the resin insulating layer 11. As the pattern, a first pattern 12a connected to the via conductor 15 for connecting to the second conductor layer 14, a wiring pattern 12b, a pad 12c for connecting to the above-described semiconductor element, and the like are formed. The method for forming the first conductor layer 12 is not particularly limited. Preferably, the first conductor layer 12 is formed by electroplating. However, other metal foils may be included. If the first conductor layer 12 is mainly an electroplated film, there is an advantage that it is formed as a pure metal film. The material constituting the first conductor layer 12 is exemplified by copper. Copper is easy to electroplat, but has low electrical resistance and is less likely to cause corrosion. As for the thickness of this 1st conductor layer 12, 10-20 micrometers is illustrated.

  The first conductor layer 12 is formed so as to be embedded on the first surface 11a side of the resin insulating layer 11 as will be apparent from an example of a manufacturing method described later. It protrudes from the first surface 11a. As will be described later, a plating film such as nickel is formed on the uneven surface formed by the uneven portion of the base portion 12c1 and the post portion 12c2, the metal film 19 having an opposite pattern, and the electroplating film 22 (see FIG. 2C), It is formed by embedding an electroplating film such as copper in the recess. Accordingly, an inverted T-shaped pad 12c composed of the base portion 12c1 and the post portion 12c2 rising at the center thereof is integrally formed by electroplating.

  The second conductor layer 14 is formed on the second surface 11 b of the resin insulating layer 11. That is, the second conductor layer 14 is not embedded in the resin insulating layer 11 but is formed on the second surface 11b. The method for forming the second conductor layer 14 is not particularly limited. The material constituting the second conductor layer 14 is exemplified by copper. However, it is not limited to this. The configuration of the second conductor layer 14 may be formed of, for example, a metal foil 14a, a metal coating 14b (see FIG. 2J) made of electroless plating, an electroplating film 14c (see FIG. 2K), and the like. There may be no metal foil, and it may be composed of a metal coating 14a and an electroplating film 14c. In this embodiment, it is composed of a copper foil 14a, a metal coating 14b made of electroless copper plating, and an electroplating film 14c. As for the thickness of the 2nd conductor layer 14, 10-20 micrometers is illustrated. In FIG. 1, the second conductor layer 14 is shown as a single layer as these synthetic layers. When the electroplating film is formed, an additive method in which a resist film is previously formed on an unnecessary portion and electroplating is performed may be used, or after the electroplating film is formed on the entire surface, the unnecessary portion is removed by etching. The subtracting method may be used. However, in order to form a fine pitch wiring layer, the additive method is preferable in terms of patterning. In any case, the second conductor layer 14 is formed by forming a desired circuit pattern.

  The via conductor 15 penetrates the resin insulating layer 11 and electrically connects the first conductor layer 12 and the second conductor layer 14. As will be described later in the manufacturing method, the via conductor 15 is formed such that the first conductor layer 12 becomes the bottom surface by processing with laser light irradiation from above the metal foil 14 a provided on the second surface 11 b of the resin insulating layer 11. 11d is formed, and the opening 11d is formed by burying a conductor. As the via conductor 15, for example, copper is exemplified, and in the present embodiment, the via conductor 15 is embedded by copper electroplating simultaneously with the formation of the second conductor layer 14.

  A protective film such as OSP is formed on the pad 12c on which the electronic component (not shown) of the first conductor layer 12 is mounted. Connectivity with solder bumps to be described later is improved. The protective film may be a surface treatment such as Ni / Au, Ni / Pd / Au, Sn, etc. For example, when the pad 12c is formed of copper, as described above, the copper of the pad 12c with good electrical resistance The aforementioned OSP is preferable from the viewpoint that the electrical resistance of the joint portion is lowered by directly joining the solder bump or the like.

  Next, a method for manufacturing the printed wiring board shown in FIG. 1 will be described with reference to FIGS.

  First, as shown in FIG. 2A, a pattern of the first plating resist film 21 is formed on the metal film 19. Specifically, first, the carrier metal foil 18b side of the metal film 19 in which the carrier metal foil 18b such as the carrier copper foil is attached to both surfaces of the dummy substrate 18a is attached to the dummy substrate 18a, and the dummy substrate 18a. Then, a support substrate 18 is formed by the carrier metal foil 18b, and a metal substrate 19 attached to the surface of the support substrate 18 is prepared. In this example, the carrier metal foil 18b and the metal film 19 are bonded first, and then the carrier metal foil 18b is directed to the dummy substrate 18a side and bonded by thermocompression bonding. A plating resist film is provided on the surface of the metal film 19, and a first plating resist film 21 is formed by patterning. Since the first plating resist film 21 is a portion corresponding to the post portion 12c2 of the pad 12c, the first plating resist film 21 is patterned in accordance with the pattern. However, it is formed larger by the thickness of a nickel plating film 23 (see FIG. 2D) described later.

  In the example shown in FIG. 2A, metal films 19 are attached to both surfaces of the support substrate 18 with an adhesive or the like. Since the dummy substrate 18a and the carrier metal foil 18b are removed and discarded later, the metal film 19 is formed on both surfaces of the support substrate 18, thereby effectively using the material. However, it may be manufactured only on one side, or different printed wiring boards may be formed on both sides. In this embodiment, even if the metal film 19 is provided on both surfaces of the support substrate 18, printed circuit boards having the same structure are formed on the upper side and the lower side of the support substrate 18 in the figure. Only the upper side will be described, and the reference numerals in the drawings are appropriately omitted for the lower part. Further, since the support substrate 18 is discarded, the material is not particularly limited, but as the carrier metal foil 18b, for example, copper, nickel or the like is used. Since the carrier metal foil 18b and the metal film 19 are separated later, the entire surface may be adhered by an adhesive that can be easily separated, for example, a thermoplastic resin. By bonding with such an adhesive, the metal film 19 and the support substrate 18 are easily separated by being peeled off by raising the temperature in a later step.

  Or, for example, it may be attached with a normal adhesive only around the support substrate 18. This is because the surroundings are easily separated by cutting and removing. In the embodiment described below, the former method is adopted. Since it is desirable that there is no difference in coefficient of thermal expansion between the support substrate 18 and the metal film 19, if nickel is used for the metal film 19, a metal foil provided on the surface of the support substrate 18 is also used. Nickel is desirable. However, this is not a limitation. In addition, a release layer may be appropriately provided on the surface of the support substrate 18 on which the metal film 19 is provided.

  Next, as shown in FIG. 2B, an electroplating film 22 is formed on the surface of the metal film 19 exposed from the pattern of the first plating resist film 21. Specifically, by performing, for example, copper electroplating using the metal film 19 as a power feeding layer, the electroplating film 22 is formed only in a portion where the metal film 19 is exposed without forming the first plating resist film 21. . This electroplating is performed by a normal method.

  Next, as shown in FIG. 2C, the first plating resist film 21 is removed. Specifically, for example, by immersing in a resist stripping solution, only the first plating resist film 21 is removed, and only the pattern of the electroplating film 22 remains. This pattern is a pattern opposite to the pattern of the first plating resist film 21 described above, that is, the pattern of the electroplating film 22 is formed where there is no pattern of the first plating resist film 21, and the first plating resist is formed. The pattern portion of the film 21 is eliminated.

  Thereafter, as shown in FIG. 2D, a barrier layer 23 is formed on the surfaces of the metal film 19 and the electroplating film 22 exposed by the removal of the first plating resist film 21. Specifically, for example, by performing electroplating of nickel or the like using the electroplating film 22 and the metal film 19 as a power feeding layer, the barrier layer 23 made of a nickel film is formed on the entire exposed surface. The barrier layer 23 prevents the first conductor layer 12 such as the lower pad portion 12c2 from being etched when the electroplating film 22 described later is removed by etching (see FIG. 2N). Even if it is not plating, a material different from that of the electroplating film 22 may be used. Further, it is sufficient that the barrier layer 23 has a thickness of about several μm.

  Thereafter, as shown in FIG. 2E, a pattern of the second plating resist film 24 is formed on the barrier layer 23. The pattern of the second plating resist film 24 forms the pattern of the first conductor layer 12, and is patterned so that the portions where the first pattern 12a, the wiring pattern 12b, and the pad 12c are formed are exposed. The That is, only the pattern portion of the first conductor layer 12 is removed, and the pattern of the second plating resist film 24 is formed only on the portion without the pattern of the first conductor layer 12. Specifically, a plating resist film is formed on the entire surface by laminating or coating a plating resist film, and a desired pattern is formed by photolithography.

  Thereafter, as shown in FIG. 2F, an electroplating film is formed on the barrier layer 23 exposed from the pattern of the second plating resist film 24, whereby the first conductor layer 12 including the pattern such as the pad 12c is formed. It is formed. Specifically, by performing electroplating using the barrier layer 23 as a power feeding layer, the barrier layer 23 is exposed on the exposed surface, that is, in the concave portion of the pattern of the electroplating film 22 and on the surface of the pattern. An electroplating film is formed through the layer 23, and the first conductor layer 12 is formed. As described above, the first conductor layer 12 is formed with the first pattern 12a to which the via conductor 15 is connected, the wiring pattern 12b, and the pad 12c. That is, the pattern of the second plating resist film 24 is formed so that this pattern is formed. As described above, the pattern of the pad 12c is integrally formed by the post portion 12c2 formed in the concave portion of the electroplating film 22 and the base portion 12c1 formed in the same layer as the first pattern 12a and the like. Yes. The electroplated film is preferably copper because of its low electrical resistance, but is not limited to copper.

  Next, as shown in FIG. 2G, the second plating resist film 24 is removed. The removal of the second plating resist film 24 is performed in the same manner as the removal of the first plating resist film 21 described above, whereby only the second plating resist film 22 is easily removed. As a result, as shown in FIG. 2G, the pattern of the first conductor layer 12 becomes obvious.

  Next, as shown in FIG. 2H, a resin insulating layer 11 is formed on the gap portion of the pattern of the first conductor layer 12 and on the surface of the first conductor layer 12, and the first conductor layer 12 side faces the first surface 11a, The resin insulating layer 11 has a second surface 11b opposite to the first surface 11a. Specifically, a resin film-like prepreg and a metal foil 14a that becomes a part of the second conductor layer 14 are laminated and bonded. For bonding the prepreg and the metal foil 14a, a method of applying pressure and heating to bond them together is used. This metal foil 14a may be omitted. Even if it is provided, it may be thin, and a thickness of about 2 to 5 μm is sufficient. In addition, although it is desirable that surfaces such as the first conductor layer 12 on the side facing the resin insulating layer 11 are rough surfaces, they are omitted in the drawing. Examples of the roughening method include a soft etching process and a blackening (oxidation) -reduction process. In addition, before the roughening treatment, an annealing treatment for growing an electroplated copper crystal may be performed in order to stabilize the roughening.

Next, as illustrated in FIG. 2I, an opening 11 d is formed from the second surface 11 b side of the resin insulating layer 11. As a method of forming the opening 11d, a laser beam irradiation method is used. That is, the second metal foil 14 a formed on the portion where the first conductor layer 12 and the second conductor layer 14 provided on both surfaces of the first resin insulating layer 11 are connected and which is a part of the second conductor layer 14. Processing is performed by irradiating CO ₂ laser light or the like from the surface toward the bottom surface of the first pattern 12 a of the first conductor layer 12. As a result, an opening 11 d for the via conductor 15 is formed in the resin insulating layer 11.

  Thereafter, as shown in FIG. 2J, a metal coating 14b such as an electroless plating film is formed on the inner surface of the opening 11d and the second metal foil 14a. This metal coating 14b is used as a power feeding layer for forming an electroplating film on the resin insulation layer 11 in the opening 11d. The metal coating 14b may be formed by sputtering or vacuum vapor deposition instead of the electroless plating method. Then, a resist film 25 is formed on the surface. This resist film 25 is used to cover the electroplating film so that the electroplating film does not adhere to a portion other than the pattern of the second conductor layer 14, and a subtracting method for patterning later is used without using such an additive method. Then, the formation of the resist film 25 is unnecessary.

  After that, as shown in FIG. 2K, the metal coating 14b is used as a power feeding layer on the surface thereof, and via conductors 15 are formed in the openings 11d by, for example, electroplating, and on the surface of the metal coating 14b on the metal foil 14a. A layer of the electroplating film 14c is formed. The electroplating film 14c may be formed, for example, on the entire surface and patterned simultaneously with the formation of the second conductor layer 14, but in this example, as shown in FIG. 2J, a resist film 25 is formed. Only the pattern portion of the second conductor layer 14 is opened, and electroplating is performed only on the opening portion, so that pattern plating is performed. In the present embodiment, the second conductor layer 14 is constituted by the metal foil 14a, the metal coating 14b, and the electroplating film 14c, and these are collectively shown as the second conductor layer 14 in FIG. In FIG. 2K, the metal foil 14a and the metal film 14b are still provided on the entire surface and are not completely patterned, but are the second conductor layer 14 for convenience.

  Thereafter, for example, as shown in FIG. 2L, the support substrate 18 is removed. In addition, although two laminated bodies are obtained by removing the support substrate 18, only the lower laminated body of the support substrate 18 is shown in FIG. 2L. As described above, the support substrate 18 (the carrier copper foil 18b attached to the surface of the dummy substrate 18a) and the metal film 19 can be separated from each other by, for example, increasing the temperature and shifting the thermoplastic resin. Therefore, the supporting substrate 18 can be easily separated simply by increasing the temperature and applying a force. As a result, as shown in FIG. 2L, the bonding surface of the metal film 19 with the support substrate 18 is exposed. When the dummy substrate 18 and the metal film 13 are bonded around the dummy substrate 18, the dummy substrate 18 and the metal film 13 can be easily separated by cutting inside the bonded portion (product group side).

  Next, as shown in FIG. 2M, a protective film 26 made of, for example, a PET film is attached to the entire surface on the second conductor layer 14 side. This is to protect the second conductor layer 14 from being etched when the metal film 19 and the electroplating film 22 are removed by etching in the next step. Therefore, if the 2nd conductor layer 14 is protected from etching liquid, it will not be limited to PET film, The protective film which consists of another material may be sufficient.

  Thereafter, the metal film 19 and the electroplating film 22 formed on the metal film 19 are removed. Specifically, since the metal film 19 and the electroplating film 22 are usually formed of copper, the metal film 19 and the electroplating film 22 are removed by etching, for example, by immersing in an etching solution for etching copper. The copper in the metal film 19 and the electroplating film 22 is dissolved and removed by the etching solution. However, since the underlying barrier layer 23 is formed of a different metal such as nickel, for example, it is not etched and etching stops when the barrier layer 23 is exposed. The barrier layer 23 may not be nickel, but may be other materials as long as the material is different from the material used for the metal film 19 and the electroplating film 22. In short, any material can be used as long as the etching stops at the boundary when the metal film 19 and the electroplating film 22 are etched.

  Thereafter, as shown in FIG. 2O, the barrier layer 23 is removed over the entire surface. Specifically, when the barrier layer 23 is formed of nickel, only the barrier layer 23 is dissolved by etching nickel and not etching copper, for example, by immersing in an etching solution containing sulfuric acid and hydrogen peroxide. The first conductor layer 12 is exposed. Since the first conductor layer 12 is not etched at all, the first surface 11a of the resin insulating layer 11 aligned with the surface of the barrier layer 23 and the exposed surface of each pattern of the first conductor layer 12 are flush with each other and exposed. To do.

  Thereafter, the protective film 26 is peeled off, and the whole is immersed in an etching solution for lightly etching copper. Since the metal foil 14a and the metal coating 14b of the second conductor layer are formed on the entire surface and are connected to the patterns of the second conductor layer, the pattern between the patterns of the second conductor layer 14 is etched. This is for removing and separating each pattern. In this etching, both the metal foil 14a and the metal coating 14b are very thin and are about several μm. Therefore, each pattern is separated and independent by immersing the whole in an etching solution without masking other portions. Can be made. This state is shown in FIG. In FIG. 1, the distinction between the metal foil 14a and the metal coating 14b of the second conductor layer 14 is not shown.

  A resin insulating layer and a conductor layer may be further laminated on the second conductive layer 14 side to form a multilayer printed wiring board. Further, a solder resist layer is provided in the outermost layer, and an opening is formed only in the connection portion, but this is omitted in the above embodiment. A surface treatment such as OSP, Ni / Au, Ni / Pd / Au, or Sn is performed on the exposed surface of the pad 12c or the wiring pattern 12b exposed from the opening of the solder resist layer (not shown). As described above, OSP is preferably applied to the pad 12c.

DESCRIPTION OF SYMBOLS 1 Printed wiring board 11 Resin insulating layer 11a 1st surface 11b 2nd surface 11d Opening 12 1st conductor layer 12a 1st pattern 12b Wiring pattern 12c Pad 12c1 Base part 12c2 Post part 14 2nd conductor layer 14a Metal foil 14b Metal film 14c Electroplating film 15 Via conductor 18 Support substrate 19 Metal film 21 First plating resist film 22 Electroplating film 23 Barrier layer 24 Second plating resist film 25 Resist film 26 Protective film

Claims (11)

A resin insulation layer having a first surface and a second surface opposite to the first surface;
A first conductor layer formed on the first surface side of the resin insulation layer, including a pad and a wiring pattern for mounting an electronic component;
A second conductor layer formed on the second surface of the resin insulation layer;
A via conductor formed through the resin insulating layer and connecting the pad and the second conductor layer;
A printed wiring board having
The pad includes a base portion embedded in the resin insulating layer and a post portion protruding from the resin insulating layer, and the width of the post portion is smaller than the width of the base portion, and The post-side surface is flush with the first surface of the resin insulation layer;
The pad is an electroplated film in which the base portion and the post portion are integrally formed. The printed wiring board according to claim 1, wherein the resin insulating layer includes a core material. 3. The printed wiring board according to claim 1, wherein a surface protective layer is coated on exposed surfaces of the base portion and the post portion of the pad. 4. The printed wiring board according to claim 3, wherein the surface protective layer is made of at least one selected from a tin coating, a solder coating, a nickel coating, and OSP. It is a printed wiring board of any one of Claims 1-4, Comprising: The solder bump is formed in the surface of the said pad. It is a printed wiring board of any one of Claims 1-5, Comprising: The roughening process is performed to the side surface and bottom face of the said base part. A method of manufacturing a printed wiring board,
Forming a pattern of a first plating resist film on the metal film;
Forming an electroplating film on the surface of the metal film exposed from the pattern of the first plating resist film;
Removing the first plating resist film;
Forming a barrier layer on the surface of the metal film and the electroplating film exposed by removing the first plating resist film;
Forming a pattern of a second plating resist film on the barrier layer;
Forming a first conductor layer including a pad pattern by forming an electroplating film on the barrier layer exposed from the pattern of the second plating resist film;
Removing the second plating resist film;
Forming a resin insulation layer formed on a gap and a surface of the pattern of the first conductor layer, the first conductor layer side being a first surface, and a surface opposite to the first surface being a second surface;
An opening is formed from the second surface side of the resin insulating layer, a via conductor is formed in the opening, and the first conductor layer is formed on the second surface of the resin insulating layer via the via conductor. Forming a second conductor layer to be connected;
Removing the metal film and the electroplated film formed on the metal film;
Removing the barrier layer over the entire surface;
including. 8. The method of manufacturing a printed wiring board according to claim 7, wherein the resin insulating layer is formed by press-contacting a prepreg including a core material by hot pressing. The method for manufacturing a printed wiring board according to claim 7 or 8, wherein when forming the resin insulation layer, a metal foil is laminated on the second surface side of the resin insulation layer. It is a manufacturing method of the printed wiring board of any one of Claims 7-9, Comprising: The said metal film is adhere | attached with each of the carrier metal foil adhere | attached on both surfaces of the support plate, The said metal film is The method further includes removing the support plate and the carrier metal foil in a step before removal. It is a manufacturing method of the printed wiring board of any one of Claims 7-10, Comprising: It further has forming a surface protective layer in the exposed surface of the said pad.

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