JP2015102052A - Fuel injection control device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a fuel injection control device which can perform injection control and abnormality detection without using an exclusive IC.SOLUTION: A microcomputer 100 includes: a sequence control part 20 which can execute a plurality of sequences, brings about an electricity-carrying state corresponding to the sequence which is executed on the basis of a current flowing in an injector 200, and changes the electricity-carrying state by switching the sequence to be executed; an ADC 30 which converts the current flowing in the injector 200 to a digital value, outputs it to the sequence control part 20, compares the digital value and an abnormality detection threshold, and performs abnormality detection depending on whether or not the digital value reaches the abnormality detection threshold; and a DMA controller 50 which can change the abnormality detection threshold compared with the digital value at the ADC 30 according to the switching of the sequence by the sequence control part 20. Furthermore, the ADC 30 compares the digital value and the changed abnormality detection threshold.

Description

  The present invention relates to a fuel injection control device.

  Conventionally, as an example of a fuel injection control device, there is a technique disclosed in Patent Document 1. This fuel injection control device performs fuel injection control by controlling energization to an injector for supplying and supplying fuel. The fuel injection control device includes a plurality of transistors, a drive control circuit that controls each transistor, a known microcomputer, and the like.

  The microcomputer generates an injection command signal based on engine operation information detected by various sensors such as the engine speed, the accelerator opening, and the engine water temperature, and outputs the injection command signal to the drive control circuit. Then, the drive control circuit outputs the injection command signal from the microcomputer to the gate of the transistor for driving the injector.

JP 2008-190388 A

  The fuel injection control device disclosed in Patent Document 1 is provided with a drive control circuit in addition to a microcomputer. Normally, a dedicated IC (Integrated Circuit) for the fuel injection control device is employed as the drive control circuit. In such a fuel injection control device, although it is not a prior art, it is conceivable to omit the dedicated IC by mounting a function performed by the dedicated IC in the microcomputer for the purpose of reducing the cost.

  By the way, although it is not a prior art, it is conceivable that the fuel injection control device detects an abnormality such as a power supply short circuit or a ground short circuit of a terminal for driving the injector. When this abnormality detection is performed by the dedicated IC, the fuel injection control device can realize the abnormality detection at high speed and accurately by incorporating the configuration necessary for the abnormality detection into the dedicated IC. However, in this case, an abnormality cannot be detected with the fuel injection control device in which the dedicated IC is omitted.

  Therefore, although it is not a prior art, when performing abnormality detection while omitting a dedicated IC, the fuel injection control device may perform abnormality detection using a microcomputer. In this case, in the fuel injection control device, the microcomputer performs abnormality detection by checking the current waveform by sampling the current value at high speed with software. However, since the microcomputer performs the software process for detecting an abnormality in addition to the generation of the injection command signal, the processing load increases. For this reason, the fuel injection control device may adversely affect the generation of the injection command signal, and the controllability of the injection control may be impaired.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a fuel injection control device capable of realizing injection control and abnormality detection without using a dedicated IC.

In order to achieve the above object, the present invention provides:
A fuel injection control device comprising a microcomputer (100) for controlling fuel injection from a fuel injection unit by changing an energization state to the fuel injection unit based on a current flowing in the fuel injection unit,
The microcomputer
A sequence in which a plurality of sequences can be executed, and based on the current flowing through the fuel injection unit, the energization state corresponding to the sequence being executed is set, and the energization state is changed by switching the sequence to be executed. A control unit (20);
The current flowing through the fuel injection unit is converted from analog to digital value and output to the sequence control unit, and the digital value is compared with the abnormality detection threshold value to determine whether the digital value has reached the abnormality detection threshold value. An AD converter (30) for detecting an abnormality by
A threshold value changing unit (50) capable of changing an abnormality detection threshold value to be compared with a digital value in the AD conversion unit in accordance with switching of the sequence by the sequence control unit,
The AD conversion unit compares the digital value with the abnormality detection threshold value changed by the threshold value changing unit.

  Thus, the present invention controls fuel injection with a microcomputer that includes a sequence control unit, an AD conversion unit, and a threshold value changing unit. The AD conversion unit converts the current flowing through the fuel injection unit from an analog value into a digital value and outputs the converted value to the sequence control unit. Accordingly, the sequence control unit can change the energized state by switching the sequence to be executed while setting the energized state corresponding to the sequence being executed based on the current flowing through the fuel injection unit. That is, according to the present invention, the fuel injection from the fuel injection unit can be controlled by changing the energization state to the fuel injection unit based on the current flowing through the fuel injection unit.

  In addition, the AD conversion unit compares the digital value with the abnormality detection threshold value, and performs abnormality detection depending on whether the digital value has reached the abnormality detection threshold value. However, the present invention changes the energization state to the fuel injection unit by switching the sequence executed by the sequence control unit. When the energization state of the fuel injection unit is changed in this way, the digital value may reach the abnormality detection threshold even though no abnormality has occurred. As a result, the AD conversion unit erroneously detects.

  Therefore, according to the present invention, the threshold value changing unit changes the abnormality detection threshold value according to the sequence switching by the sequence control unit. Then, the AD conversion unit compares the digital value with the abnormality detection threshold value changed by the threshold value changing unit. Thereby, even if it is a case where the electricity supply state to a fuel-injection part is changed, this invention can detect abnormality by AD conversion part. Thus, the present invention can realize injection control and abnormality detection without using a dedicated IC.

  Note that the reference numerals in parentheses described in the claims and in this section indicate a corresponding relationship with specific means described in the embodiments described later as one aspect, and limit the technical scope of the invention. Not what you want.

It is a block diagram which shows schematic structure of ECU in 1st Embodiment. It is a flowchart which shows the processing operation of CPU in 1st Embodiment.

It is a flowchart which shows the sequence control initialization process of CPU in 1st Embodiment. It is a flowchart which shows the ADC initialization process of CPU in 1st Embodiment. It is a flowchart which shows the injection request | requirement process of the fuel-injection control apparatus in 1st Embodiment. It is a flowchart which shows the abnormality detection process of ADC in 1st Embodiment. It is a flowchart which shows the processing operation of the sequence control part in 1st Embodiment. It is a flowchart which shows the processing operation at the time of the upper limit mode of the sequence control part in 1st Embodiment. It is a flowchart which shows the processing operation at the time of the upper / lower limit mode of the sequence control part in 1st Embodiment. It is a flowchart which shows the processing operation of the DMA controller in 1st Embodiment. It is a time chart which shows the processing operation of the fuel-injection control apparatus in 1st Embodiment. It is a time chart which shows the processing operation of the fuel-injection control apparatus in 2nd Embodiment. It is a time chart which shows the processing operation of the fuel-injection control apparatus in 3rd Embodiment. It is a time chart which shows the processing operation of the fuel-injection control apparatus in 4th Embodiment.

  Hereinafter, a plurality of embodiments for carrying out the invention will be described with reference to the drawings. In each embodiment, portions corresponding to the matters described in the preceding embodiment may be denoted by the same reference numerals and redundant description may be omitted. In each embodiment, when only a part of the configuration is described, the other configurations described above can be applied to other portions of the configuration.

  The fuel injection control device of the present invention drives a plurality of injectors 200 that inject and supply fuel to each cylinder of a multi-cylinder engine mounted on a vehicle, for example. More specifically, the fuel injection control device controls the fuel injection from the injector 200 to each cylinder by controlling the energization state to the actuator of each injector 200. The fuel injection control device controls the energization start timing and the energization time as the energized state, for example. Further, the fuel injection control device controls the fuel injection timing and the fuel injection amount to each cylinder, for example, as the fuel injection control. Further, the fuel injection control device may execute a well-known multi-stage injection control as the fuel injection control. The engine may be either a gasoline engine or a diesel engine.

  The injector 200 corresponds to the fuel injection unit in the claims. For example, the injector 200 is constituted by a normally closed solenoid valve, and when each actuator is energized, the injector 200 opens to perform fuel injection. Further, the injector 200 closes and stops fuel injection when the power supply to its own actuator is cut off. Further, in FIG. 1, only the actuator in the injector 200 is illustrated in order to simplify the drawing. The actuator can employ a solenoid coil, a piezo element, or the like. In the following description, unless otherwise specified, the injector 200 indicates an actuator in the injector 200. Therefore, the energization to the injector 200 indicates the energization state to the actuator in the injector 200.

(First embodiment)
Here, a configuration and processing operation in the fuel injection control device of the first embodiment will be described. First, the configuration of the fuel injection control device will be described with reference to FIG. The fuel injection control device includes a microcomputer 100 that controls fuel injection from the injector 200 by changing the energization state of the injector 200 based on the current flowing through the injector 200. In addition to the microcomputer 100, the fuel injection control device includes a first driver 110 to a third driver 130, a normal power supply 140, a boost power supply 150, a first transistor 160 to a third transistor 180, a current detection resistor 190, and the like. It is configured. Further, in the electronic control device, the injector 200 is connected to a pair of ports of the first port p1 and the second port p2. Note that the current flowing through the injector 200 is also referred to as a control current.

  The first driver 110 is connected to the microcomputer 100 and the gate of the first transistor 160. The first driver 110 outputs a drive signal to the first transistor 160 according to an instruction from the microcomputer 100 (in other words, an instruction signal), thereby turning the first transistor 160 on and off. Therefore, the instruction signal includes an on instruction signal for instructing to turn on the first transistor 160 and an off instruction signal for instructing to turn off the first transistor 160. The drive signal includes an on drive signal that instructs the first transistor 160 to turn on and an off drive signal that instructs the first transistor 160 to turn off. The first transistor 160 has a gate connected to the first driver 110, a source connected to the boost power supply 150, and a drain connected to the injector 200 via the first port p1.

  The second driver 120 is connected to the microcomputer 100 and the gate of the second transistor 170. The second driver 120 outputs a drive signal to the second transistor 170 in accordance with an instruction from the microcomputer 100 to turn the second transistor 170 on and off. The second transistor 170 has a gate connected to the second driver 120, a source connected to the normal power supply 140, and a drain connected to the injector 200 via the first port p1.

  The third driver 130 is connected to the microcomputer 100 and the gate of the third transistor 180. The third driver 130 turns on and off the third transistor 180 by outputting a drive signal to the third transistor 180 in accordance with an instruction from the microcomputer 100. The third transistor 180 has a gate connected to the third driver 130, a source connected to the injector 200 via the second port p2, and a drain connected to one terminal of the current detection resistor 190. ing. Each of the first transistor 160 to the third transistor 180 is configured by a switching element such as a MOSFET.

  The normal power supply 140 and the boost power supply 150 apply voltage to the injector 200. The normal power source 140 corresponds to a battery not shown, and can supply a battery voltage that is a battery voltage. Further, the normal power supply 140 can generate (supply) a low voltage obtained by stepping down the battery voltage, and a switching power supply such as a DC / DC converter can also be employed. On the other hand, the boost power source 150 can boost the battery voltage and generate a high voltage obtained by boosting, and can employ a switching power source such as a DC / DC converter. Therefore, the boost power source 150 can be rephrased as a high voltage generator that generates a higher voltage than the normal power source 140. Similarly, the normal power supply 140 can be rephrased as a low voltage generator that generates a lower voltage than the boost power supply 150.

  The current detection resistor 190 is a resistor for detecting a control current. The current detection resistor 190 has one terminal connected to the drain of the third transistor 180 and the other terminal connected to the ground.

  The microcomputer 100 is connected to each of the first driver 110 to the third driver 130 and to the wiring between the current detection resistor 190 and the third transistor 180. In addition, the microcomputer 100 includes a CPU 10, a sequence control unit 20, an ADC 30, a timer 40, a DMA controller 50, a memory 60, and the like. CPU is an abbreviation for Central Processing Unit. ADC is an abbreviation for analog to digital converter (AD converter). DMA is an abbreviation for Direct Memory Access.

  The CPU 10 executes various arithmetic processes according to a program stored in a storage device such as the memory 60. For example, the CPU 10 executes an initialization process of the sequence control unit 20, an initialization process of the ADC 30, and the like. The initialization process of the sequence control unit 20 and the initialization process of the ADC 30 will be described later.

  Further, the CPU 10 issues an injection timing instruction to the timer 40. The CPU 10 calculates the injection timing for each injection and sets the injection timing in the timer 40. Specifically, the CPU 10 sets the injection start time and the injection end time in the timer 40.

  The sequence control unit 20 includes a control data setting unit 21, a comparator 22, an output control unit 23, an AND circuit 24, an output unit 25, and the like. The sequence control unit 20 is capable of executing a plurality of sequences. Based on the control current, the sequence control unit 20 sets the energization state corresponding to the sequence being executed, and changes the energization state by switching the sequence to be executed. In addition to the control current, the sequence control unit 20 can switch a sequence to be executed depending on time. In the present embodiment, as an example, a sequence control unit 20 that can execute three sequences of a first sequence, a second sequence, and a third sequence is employed. Further, the sequence control unit 20 instructs the DMA controller 50 to change the abnormality detection threshold at the timing of switching the sequence to be executed. Note that the control data setting unit 21 in the sequence control unit 20 gives an instruction to change the abnormality detection threshold.

  The control data setting unit 21 includes a sequencer and a register. Control data from the CPU 10 is set in the register. In the register, a value indicating each sequence and a control value corresponding to each sequence are set in association with each other as control data. For example, the control data setting unit 21 is provided with a register for each sequence in which a value indicating a sequence and a control value corresponding to the sequence are stored in association with each other. The sequencer can use a control value corresponding to the sequence to be executed by selecting a register corresponding to the sequence to be executed.

  The control value is a value corresponding to the control current, and is an upper limit value or a lower limit value for controlling the control current when each sequence is executed. In other words, the control value is a control threshold value. The value indicating the first sequence is associated with the first control upper limit value as the control value. For the value indicating the second sequence, the second control upper limit value and the second control lower limit value are associated as control values. For the value indicating the third sequence, the third control upper limit value and the third control lower limit value are associated as control values. The relationship between these control values is, for example, first control upper limit value> second control upper limit value> second control lower limit value and second control lower limit value ≧ third control upper limit value> third control lower limit value. Yes.

  Furthermore, an AD upper limit value that is an upper limit threshold value for determining whether or not the control current is an abnormal value can be set in the register. That is, the register may store the AD upper limit value. This AD upper limit is a value larger than the first upper limit threshold. The control data setting unit 21 instructs the DMA controller 50 to change the abnormality detection threshold.

  The comparator 22 compares the digital value output from the ADC 30 described later with the control value set in the register of the control data setting unit 21, and outputs the comparison result.

  The output control unit 23 outputs a signal corresponding to the comparison result acquired from the comparator 22 to the control data setting unit 21 and the AND circuit 24. In other words, the output control unit 23 sets the output to the control data setting unit 21 and the AND circuit 24 to a high level or a low level according to the comparison result acquired from the comparator 22. Since the digital value is a result of AD conversion by the conversion unit 31 of the ADC 30, it may be described as an AD value in the following description and drawings.

  In the AND circuit 24, the timer 40 and the output control unit 23 are connected to the input terminals, and the output terminal is connected to the output unit 25. The AND circuit 24 sets the output to a high level or a low level according to the output of the timer 40 and the output of the output control unit 23. In other words, the AND circuit 24 outputs a logical product signal of the output of the timer 40 and the output of the output control unit 23.

  The timer 40 measures time and outputs a signal to the AND circuit 24 and the ADC 30 when the measured time reaches a predetermined time. For example, the timer 40 outputs an enable signal to the AND circuit 24 when the time measured by the timer 40 coincides with the injection start time set by the CPU 10. When the time measured by the timer 40 coincides with the injection end time set by the CPU 10, the timer 40 outputs a disable signal to the AND circuit 24.

  The timer 40 outputs an activation signal to the ADC 30 when the time measured by the timer 40 coincides with the AD cycle timing set by the CPU 10. In other words, the timer 40 generates a start event. In other words, the timer 40 instructs the ADC 30 to perform AD conversion at a predetermined timing set by the CPU 10.

  The output unit 25 outputs an instruction signal to each of the first driver 110 to the third driver 130 according to the output of the control data setting unit 21 and the output of the AND circuit 24. When the first sequence is being executed, the output unit 25 outputs an ON instruction signal to all of the first transistor 160 to the third transistor 180. In addition, when the second sequence and the third sequence are being executed, the output unit 25 continues to output the ON instruction signal to the third transistor 180 and continues to output the OFF instruction signal to the first transistor 160. It will be. Further, when the second sequence and the third sequence are being executed, the output unit 25 alternately outputs an on instruction signal and an off instruction signal to the second transistor 170.

  The ADC 30 includes a conversion unit 31, an analog watchdog unit 32, a register 33, and the like. FIG. 1 employs a drawing in which one injector 200 is connected to the fuel injection control device. However, the fuel injection control apparatus may have a plurality of injectors 200 connected thereto. In this case, the ADC 30 receives a control current in each of the plurality of injectors 200. For example, in the fuel injection control device, one ADC 30 is provided for a plurality of injectors. In addition, the ADC 30 is provided with a selection unit such as a multiplexer between the conversion unit 31 and each injector 200, for example. This selection unit selects which injector 200 of the plurality of injectors 200 is to output the control current to the conversion unit 31. It can be said that the selection unit selects one channel from a plurality of channels. And the conversion part 31 receives the control current of the channel selected by the selection part among the control currents of the injectors 200. That is, the conversion unit 31 individually receives the control current of each injector 200 via the selection unit.

  The conversion unit 31 converts an analog value of the control current into an AD value and outputs the AD value to the sequence control unit 20 every time a start signal from the timer 40 is input. Specifically, the conversion unit 31 converts the control current into an AD value, and outputs the converted AD value to the comparator 22 of the sequence control unit 20. The conversion unit 31 outputs the converted AD value to the analog watchdog unit 32.

  The analog watchdog unit 32 compares the AD value with the abnormality detection threshold value and performs abnormality detection depending on whether or not the AD value has reached the abnormality detection threshold value. Note that the abnormality detection threshold is set in the register 33. Therefore, the analog watchdog unit 32 compares the AD value acquired from the conversion unit 31 with the abnormality detection threshold value read from the register 33. The analog watchdog unit 32 determines that the AD value is not abnormal when the AD value has not reached the abnormality detection threshold, and determines that the AD value is abnormal when the AD value has reached the abnormality detection threshold. Further, when it is determined that the analog watchdog unit 32 is abnormal, the analog watchdog unit 32 may notify the CPU 10 of the abnormality. The analog watchdog unit 32 can detect an abnormality such as a power supply short circuit or a ground short circuit of the first port p1 or the second port p2 to which the injector 200 is connected. Thus, since the analog watchdog unit 32 performs abnormality detection, it can be rephrased as an abnormality detection unit.

  The register 33 is configured to be able to set, for example, a first upper limit threshold, a first lower limit threshold, and a second lower limit threshold as the abnormality detection threshold. The relationship between these threshold values is first upper limit threshold> second lower limit threshold> first lower limit threshold. Therefore, the analog watchdog unit 32 compares the upper threshold value of the abnormality detection threshold value with the AD value, and compares the lower threshold value of the abnormality detection threshold value with the AD value. It should be noted that the present invention can be employed even when one of the comparison between the upper threshold value and the AD value and the comparison between the lower threshold value and the AD value are performed.

  As described above, the ADC 30 has an AD conversion function that converts a control current into an AD value, and an abnormality detection function that detects an abnormality based on the control current. Furthermore, the ADC 30 can change the abnormality detection threshold used when abnormality detection is performed.

  The DMA controller 50 corresponds to a threshold value changing unit in the claims. The DMA controller 50 sets the abnormality detection threshold value stored in the memory 60 in the register 33 of the ADC 30 in accordance with an instruction from the control data setting unit 21. At this time, the DMA controller 50 can set the abnormality detection threshold value stored in the memory 60 in the register 33 of the ADC 30 without using the CPU 10. As described above, the DMA controller 50 can change the abnormality detection threshold value to be compared with the AD value in the ADC 30 in accordance with the sequence switching by the sequence control unit 20.

  As the memory 60, for example, a flash ROM or the like can be adopted. As described above, the memory 60 stores the abnormality detection threshold. That is, the memory 60 stores the above-described first upper limit threshold, first lower limit threshold, and second lower limit threshold. Note that ROM is an abbreviation for Read Only Memory.

  Next, the processing operation of the fuel injection control device will be described with reference to FIGS. First, the processing operation of the CPU 10 will be described with reference to FIG. The CPU 10 is activated when the supply of power to the CPU 10 is started, and executes the processing shown in the flowchart of FIG. Further, the CPU 10 executes the process of the flowchart shown in FIG. 2 while the power supply to itself continues, and ends the process of the flowchart shown in FIG. 2 when the power supply to itself is stopped.

  In step S10, initialization processing of the sequence control unit 20 is performed. The initialization process of the sequence control unit 20 will be described with reference to FIG. In step S11, control data is written. The CPU 10 writes control data in a register provided in the sequence control unit 20. The CPU 10 writes a value indicating each sequence and a control value corresponding to each sequence in association with each other. For example, when the sequence control unit 20 has a register for each sequence, the CPU 10 writes a control value corresponding to each sequence in a register corresponding to each sequence.

  In step S12, output setting is performed. At this time, the CPU 10 sets an output value corresponding to each sequence. That is, the CPU 10 sets the instruction signal output from the output unit 25 in each sequence. In other words, the CPU 10 sets a combination of on and off in each of the first transistor 160 to the third transistor 180 corresponding to each sequence. For example, the CPU 10 writes an instruction signal (output value) corresponding to each sequence in a register provided in the sequence control unit 20.

  In step S20, the ADC 30 is initialized. The initialization process of the ADC 30 will be described with reference to FIG. In step S21, ADC setting is performed. CPU10 sets the order etc. which perform AD conversion in a some channel so that AD conversion of the control current of a some channel may be carried out in order. At this time, the CPU 10 performs ADC setting by writing the order of AD conversion in a plurality of channels, for example, in a register provided in the timer 40.

  In step S22, the starting cycle of the ADC 30 is set. The CPU 10 sets the AD cycle timing for starting the ADC 30 in the timer 40 so that the AD conversion by the conversion unit 31 of the ADC 30 is periodically performed. Therefore, the AD cycle timing can be restated as an AD conversion timing by the conversion unit 31 or a sampling cycle in which the conversion unit 31 performs AD conversion. Further, the conversion unit 31 outputs the converted AD value to the comparator 22 of the sequence control unit 20 every time AD conversion is completed. Therefore, the AD cycle timing can be rephrased as an AD value output timing to the comparator 22 by the conversion unit 31. Note that the CPU 10 sets the AD cycle timing in the timer 40 by writing the AD cycle timing in a register provided in the timer 40, for example.

  The CPU 10 performs an initialization process in steps S10 and S20. When the initialization process is completed, the CPU 10 performs an injection process in steps S30 and S40. CPU10 performs the process by step S30, S40 for every injection timing. That is, the CPU 10 repeatedly executes steps S30 and S40 while the power supply to itself continues.

  In step S30, the injection time is calculated. The calculation of the injection time is a well-known technique and will not be described. In step S40, an injection request is made. This injection request will be described with reference to FIG. In step S41, the injection start time is set in the timer 40. In step S42, the injection end time is set in the timer 40. In other words, the CPU 10 can be rephrased as instructing the injection timing. At this time, the CPU 10 writes the injection start time and the injection end time in, for example, a register provided in the timer 40.

  Next, the abnormality detection process of the ADC 30 will be described with reference to FIG. The ADC 30 is activated when the activation signal from the timer 40 is input, and starts the processing of the flowchart shown in FIG. That is, the ADC 30 is activated at the AD cycle timing set in step S22, and starts the processing of the flowchart shown in FIG.

  In step S51, the conversion unit 31 performs AD conversion. In step S52, it is determined whether or not there is an abnormality. At this time, the analog watchdog unit 32 determines whether or not there is an abnormality by comparing the AD value converted by the conversion unit 31 with the abnormality detection threshold value set in the register 33.

  For example, the analog watchdog unit 32 determines that there is an abnormality when the AD value reaches the first upper limit threshold value when the first sequence is executed as shown at the timing t2 in FIG. In other words, the analog watchdog unit 32 determines that there is an abnormality when the AD value is equal to the first upper limit threshold or greater than the first upper limit threshold. Note that the analog watchdog unit 32 determines that there is an abnormality when the AD value reaches the first upper limit threshold even when the second sequence or the third sequence is being executed.

  Further, as shown at timings t4 and t6 in FIG. 11, the analog watchdog unit 32 has an abnormality when the AD value reaches the second lower limit threshold when the second sequence or the third sequence is executed. Is determined. In other words, the analog watchdog unit 32 determines that the AD value is abnormal when the AD value is equal to or smaller than the second lower limit threshold value.

  The analog watchdog unit 32 determines that there is an abnormality when the AD value reaches the first lower limit threshold when the first sequence is being executed. In addition, 0V etc. are employable as a 1st lower limit threshold value. Therefore, it can be said that the analog watchdog unit 32 determines that it is normal when the AD value is 0V. In addition, by adopting 0V as the first lower limit threshold in this way, it is possible to suppress erroneous detection that the control current waveform rises in the first region, although it is normal, it is abnormal. That is, by doing so, the analog watchdog unit 32 can perform ground short-circuit and open detection.

  If the analog watchdog unit 32 determines that there is no abnormality, the analog watchdog unit 32 ends the process of the flowchart shown in FIG. Note that the abnormality detection threshold value used for the determination in step S52 is a value corresponding to the currently executed sequence written in the register 33 by the DMA controller 50.

  In step S53, the analog watchdog unit 32 notifies the CPU 10 of an abnormality. Thus, the CPU 10 can know an abnormality such as a power supply short circuit or a ground short circuit of the first port p1 or the second port p2 to which the injector 200 is connected. Note that the CPU 10 may stop energization of the injector 200 when there is an abnormality notification from the analog watchdog unit 32 (stop instruction unit). For example, the CPU 10 instructs the sequence control unit 20 to stop energization of the injector 200. When the stop of energization to the injector 200 is instructed, the sequence control unit 20 stops energization of the injector 200 even when any one of the first sequence to the third sequence is being executed. Note that the sequence control unit 20 can stop energization of the injector 200 by turning off the third transistor 180. By doing so, the fuel injection control apparatus can be expected to suppress abnormal torque fluctuations and suppress abnormalities occurring in the circuits and the injectors 200 constituting the fuel injection control apparatus.

  Next, the processing operation of the sequence control unit 20 will be described with reference to FIG. The sequence control unit 20 starts the process of the flowchart shown in FIG. 7 every time the AD value output from the ADC 30 is input.

  In step S61, mode confirmation is performed. The sequence control unit 20 determines whether it is operating in the upper limit mode or the upper / lower limit mode based on the sequence being executed. As will be described later, the sequence control unit 20 operates so that the AD value reaches the control upper limit by executing the first sequence. For this reason, the sequence control unit 20 determines that the operation is being performed in the upper limit mode when the first sequence is being executed. On the other hand, the sequence control unit 20 operates so that the AD value is between the control upper limit and the control lower limit by executing the second sequence or the third sequence. For this reason, the sequence control unit 20 determines that the operation is being performed in the upper / lower limit mode when the second sequence or the third sequence is being executed. When the first sequence is being executed, the sequence control unit 20 determines that the operation is being performed in the upper limit mode and proceeds to step S62. When the second sequence or the third sequence is being performed, the sequence control unit 20 is operating with the upper and lower limit modes. And the process proceeds to step S63.

  In step S62, processing in the upper limit mode is executed. The upper limit mode, that is, the processing operation in the first sequence will be described with reference to FIGS. First, it demonstrates using FIG.

  As indicated at timing t1, when the execution of the first sequence is started, the sequence control unit 20 outputs an on instruction signal so that all of the first transistor 160 to the third transistor 180 are turned on.

  Further, as shown at timings t1 to t3, the sequence control unit 20 keeps all of the first transistor 160 to the third transistor 180 on until the AD value reaches the first control upper limit during the execution of the first sequence. An ON instruction signal is output so as to continue. That is, the sequence control unit 20 outputs an on instruction signal so that all of the first transistor 160 to the third transistor 180 continue to be on while the output of the output control unit 23 is at a high level. As a result, each of the first port p1, the boost power supply 150, and the normal power supply 140 is turned on.

  Further, as indicated by timing t3, the sequence control unit 20 determines that the sequence is switched when the AD value reaches the first control upper limit during execution of the first sequence. That is, the sequence control unit 20 determines that it is the switching timing from the first sequence to the second sequence when the output of the output control unit 23 changes from the high level to the low level.

  When the sequence control unit 20 determines that the switching to the second sequence is made, the sequence control unit 20 outputs an off instruction signal so that the first transistor 160 and the second transistor 170 are turned off, and the third transistor 180 is kept on. The ON instruction signal is output as follows. As a result, the first port p1 continues to be in an on state, and each of the boost power source 150 and the normal power source 140 is in an off state. Note that the first sequence is defined to operate in this way.

  As a result, the first region in which the first sequence is executed is between the timings t1 to t3. In addition, the fuel injection control device performs boost control for quickly opening the injector 200 when the sequence control unit 20 executes the first sequence.

  Next, a description will be given with reference to FIG. In step S621, it is determined whether AD value ≧ control upper limit. The control upper limit here is a first control upper limit. If the sequence control unit 20 determines that AD value ≧ control upper limit, the sequence control unit 20 proceeds to step S622. If the sequence control unit 20 determines that the AD value is not greater than the control upper limit, the sequence control unit 20 returns to the process of the flowchart shown in FIG. 7 and proceeds to step S64 without performing the processes in steps S622 and S623.

  That is, when no abnormality has occurred, the sequence control unit 20 determines that AD value ≧ control upper limit is not reached until the timing t3 is reached. However, the sequence control unit 20 may determine that AD value ≧ control upper limit before timing t3 when an abnormality has occurred.

  In step S622, the sequence is updated. At this time, the sequence control unit 20 changes the sequence to be executed to the second sequence. In step S623, the output value is updated. The sequence control unit 20 updates the output value corresponding to the second sequence. That is, the sequence control unit 20 sets so as to use an output value corresponding to the second sequence.

  In step S63, processing in the upper / lower limit mode is executed. Processing operations in the upper / lower limit mode, that is, the second sequence and the third sequence will be described with reference to FIGS.

  First, it demonstrates using FIG. As shown at timings t3 to t5, when the sequence control unit 20 starts executing the second sequence, the sequence control unit 20 outputs an off signal so that the first transistor 160 continues to be in the off state. In addition, when the sequence control unit 20 starts executing the second sequence, the sequence control unit 20 outputs an on instruction signal so that the third transistor 180 is kept on. As a result, the first port p1 continues to be on, and the booster power supply 150 continues to be off.

  Further, when the sequence control unit 20 starts executing the second sequence, the second transistor 170 is turned off and off in order to set the AD value to a value between the second control upper limit and the second control lower limit. An on instruction signal and an off instruction signal are output. Specifically, when the AD value increases and the second control upper limit is reached, the sequence control unit 20 is turned off so that the second transistor 170 is turned off in response to the output of the output control unit 23 being low level. An instruction signal is output. Then, the sequence control unit 20 outputs an ON instruction signal so that the second transistor 170 is turned on in response to the high level of the output of the output control unit 23 when the AD value decreases and reaches the second control lower limit. Output. As a result, the normal power supply 140 is switched between an on state and an off state. In other words, the sequence control unit 20 duty-drives the second transistor 170 according to the output of the output control unit 23.

  Then, the sequence control unit 20 determines that it is a switching timing from the second sequence to the third sequence when a predetermined time has elapsed after the execution of the second sequence is started. When the sequence control unit 20 determines that the switching to the third sequence is performed, the sequence control unit 20 outputs an off instruction signal so that the first transistor 160 and the second transistor 170 are turned off, and the third transistor 180 is kept on. Outputs the ON instruction signal. The second sequence is defined to operate in this way.

  As a result, the second region in which the second sequence is executed is between the timings t3 and t5. In addition, the fuel injection control device performs pickup control for smoothly moving the injector 200 to a predetermined valve opening position when the sequence control unit 20 executes the second sequence.

  Further, as indicated by timings t6 to t7, when the sequence control unit 20 starts executing the third sequence, the sequence control unit 20 outputs an off signal so that the first transistor 160 continues to be in the off state. In addition, when the sequence control unit 20 starts executing the third sequence, the sequence control unit 20 outputs an ON instruction signal so that the third transistor 180 continues to be in the ON state. As a result, the first port p1 continues to be on, and the booster power supply 150 continues to be off.

  Furthermore, when the sequence control unit 20 starts executing the third sequence, the second transistor 170 is turned off and off in order to set the AD value to a value between the third control upper limit and the third control lower limit. An on instruction signal and an off instruction signal are output. Specifically, when the AD value increases and the third control upper limit is reached, the sequence control unit 20 turns off so that the second transistor 170 is turned off in response to the low level of the output of the output control unit 23. An instruction signal is output. The sequence control unit 20 outputs an ON instruction signal so that the second transistor 170 is turned on in response to the high level of the output of the output control unit 23 when the AD value decreases and reaches the third control lower limit. Output. As a result, the normal power supply 140 is switched between an on state and an off state. In other words, the sequence control unit 20 duty-drives the second transistor 170 according to the output of the output control unit 23.

  The timer 40 outputs a disable signal to the AND circuit 24 when the time measured by the timer 40 coincides with the injection end time set by the CPU 10. As a result, as shown at the timing t7, all of the first transistor 160 to the third transistor 180 are turned off. That is, the sequence control unit 20 ends the third sequence that has been executed. Note that the third sequence is defined to operate in this way.

  As a result, the third region in which the third sequence is executed is between the timings t6 and t7. Further, the fuel injection control device performs hold control for holding the valve-open state of the injector 200 when the sequence control unit 20 executes the third sequence.

  Next, a description will be given with reference to FIG. In step S631, it is determined whether AD ≧ control upper limit. The control upper limit here is different between when the second sequence is being executed and when the third sequence is being executed. When the second sequence is being executed, the control upper limit is the second control upper limit value. On the other hand, when the third sequence is being executed, the control upper limit is the third control upper limit value. If the sequence control unit 20 determines that AD value ≧ control upper limit, the sequence control unit 20 proceeds to step S632. If the sequence control unit 20 determines that AD value ≧ control upper limit is not satisfied, the sequence control unit 20 proceeds to step S633.

  In step S633, it is determined whether AD ≦ the control lower limit. Here, the lower control limit differs between when the second sequence is being executed and when the third sequence is being executed. When the second sequence is being executed, the control lower limit is the second control lower limit value. On the other hand, when the third sequence is being executed, the control lower limit is the limit value for the third control. If the sequence control unit 20 determines that AD value ≦ the control lower limit, the sequence control unit 20 proceeds to step S634. If the sequence control unit 20 determines that AD value ≦ the control lower limit is not satisfied, the sequence control unit 20 proceeds to step S635.

  In step S632, the output is turned off. At this time, the sequence controller 20 outputs an off instruction signal so that the second transistor 170 is turned off. On the other hand, in step S634, the output is turned on. The sequence controller 20 outputs an on instruction signal so that the second transistor 170 is turned on. In step S635, the output is held. That is, when the sequence control unit 20 makes a NO determination in both step S631 and step S633, it is considered that the second transistor 170 need not be turned on and the second transistor 170 need not be turned on. For this reason, the sequence control unit 20 continues to output the current instruction signal. Then, when the processing of steps S632, S634, and S635 ends, the sequence control unit 20 returns to the processing of the flowchart shown in FIG. 7 and proceeds to step S64.

  In step S64, sequence switching is determined. The sequence control unit 20 determines whether to switch the sequence to be executed. Then, the sequence control unit 20 proceeds to step S65 if it is determined to switch, and proceeds to step S66 if it is determined to continue.

  In step S65, a DMA event notification process is performed. At this time, the sequence control unit 20 instructs the DMA controller 50 to switch the abnormality detection threshold set in the register 33 of the ADC 30. Then, when an instruction to switch the abnormality detection threshold is given, the DMA controller 50 executes the processing of the flowchart shown in FIG. That is, when an instruction to switch the abnormality detection threshold is given, the DMA controller 50 sets the abnormality detection threshold stored in the memory 60 in the register 33 of the ADC 30.

  For example, the abnormality detection threshold value is sequentially stored in the memory 60. The DMA controller 50 reads out the abnormality detection threshold stored in the memory 60 and writes it in the register 33 of the ADC 30 each time an instruction to switch the abnormality detection threshold is given. As a result, the DMA controller 50 can set the abnormality detection threshold value that matches the sequence in the register 33 of the ADC 30.

  In this way, the first upper limit threshold and the first lower limit threshold are set in the register 33 of the ADC 30 during execution of the first sequence. When the first sequence is switched to the second sequence, the first upper limit threshold and the second lower limit threshold are set in the register 33 of the ADC 30. That is, when the first sequence is switched to the second sequence, the register 33 of the ADC 30 is switched from the first lower limit threshold to the second lower limit threshold. When the second sequence is switched to the third sequence, the first upper limit threshold and the second lower limit threshold are set in the register 33 of the ADC 30.

  In step S65, the sequence control unit 20 may instruct the DMA controller 50 to start up. The DMA controller 50 is activated when an activation instruction is issued, and sets the abnormality detection threshold value stored in the memory 60 in the register 33 of the ADC 30. That is, the sequence control unit 20 issues an activation instruction as an instruction to switch the abnormality detection threshold.

  In step S66, end determination is performed. The sequence control unit 20 makes an end determination based on whether or not a disable signal is output from the timer 40. The sequence control unit 20 determines the end when the disable signal is output from the timer 40. In this case, the sequence control unit 20 ends the execution of the sequence. Further, the sequence control unit 20 determines to continue when the disable signal is not output from the timer 40, that is, when the enable signal is output. In this case, the sequence control unit 20 starts the process of the flowchart shown in FIG. 7 with the next input of the AD value.

  As described so far, in the first region, the fuel injection control device starts operation by setting the upper limit threshold of the abnormality detection threshold as the first upper limit threshold and the lower limit threshold as the first lower limit threshold. For this reason, in the first region, the region between the first upper limit threshold and the first lower limit threshold is a normal region. That is, in the first region, it can be considered normal if the AD value is between the first upper limit threshold and the first lower limit threshold, and the AD value is not between the first upper limit threshold and the first lower limit threshold. It can be regarded as abnormal.

  Further, when the injection waveform reaches the first control upper limit, the fuel injection control apparatus changes from the first area to the second area, and also performs a DMA event notification. The fuel injection control device rewrites the upper limit threshold of the abnormality detection threshold to the first upper limit threshold and the lower limit threshold to the second lower limit threshold by this DMA event notification. For this reason, in the second region, the region between the first upper limit threshold and the second lower limit threshold is a normal region. That is, in the second region, it can be considered normal if the AD value is between the first upper limit threshold and the second lower limit threshold, and the AD value is not between the first upper limit threshold and the second lower limit threshold. It can be regarded as abnormal.

  Then, when a predetermined time elapses in the second area, the fuel injection control device changes from the second area to the third area, and also performs a DMA event notification. The fuel injection control device rewrites the upper limit threshold of the abnormality detection threshold to the first upper limit threshold and the lower limit threshold to the second lower limit threshold by this DMA event notification. In the present embodiment, the same abnormality detection threshold is adopted in the second region and the third region. For this reason, in the third area, the area between the first upper limit threshold and the second lower limit threshold is a normal area, as in the second area.

  As described above, the fuel injection control device controls the fuel injection by the microcomputer 100 configured to include the sequence control unit 20, the ADC 30, and the DMA controller 50. The ADC 30 converts the control current from analog to AD value and outputs it to the sequence control unit 20. Accordingly, the sequence control unit 20 can change the energization state by switching the sequence to be executed while setting the energization state corresponding to the sequence being executed based on the control current. That is, the fuel injection control device can control the fuel injection from the injector 200 by changing the energization state to the injector 200 based on the control current.

  Further, the ADC 30 compares the AD value with the abnormality detection threshold value, and performs abnormality detection depending on whether or not the AD value has reached the abnormality detection threshold value. However, the fuel injection control device changes the energization state of the injector 200 by switching the sequence executed by the sequence control unit 20. In this way, when the energization state of the injector 200 is changed, the AD value may reach the abnormality detection threshold even though no abnormality has occurred. As a result, the ADC 30 erroneously detects.

  Therefore, in the fuel injection control device, the DMA controller 50 changes the abnormality detection threshold according to the sequence switching by the sequence control unit 20. Then, the ADC 30 compares the AD value with the abnormality detection threshold value changed by the DMA controller 50. Thereby, even if it is a case where the energization state to the injector 200 is changed, the fuel injection control apparatus can detect abnormality by the ADC 30. Thus, the fuel injection control device can realize injection control and abnormality detection without using a dedicated IC.

  In the present embodiment, a fuel injection control device that can execute three sequences of the first sequence to the third sequence is employed. However, the present invention is not limited to this. The fuel injection control device of the present invention can be adopted as long as it can execute a plurality of sequences. Therefore, the fuel injection control device of the present invention can achieve the object even if it executes two sequences or executes four or more sequences. For example, when two sequences are executed, the fuel injection control device of the present invention can employ a boost control by executing the first sequence and a hold control by executing the second sequence.

  In the present embodiment, an example in which the DMA controller 50 changes the abnormality detection threshold is adopted. However, the present invention is not limited to this. The present invention can achieve the object as long as the abnormality detection threshold value to be compared with the AD value in the ADC 30 can be changed according to the sequence switching by the sequence control unit 20.

  The preferred embodiments of the present invention have been described above. However, the present invention is not limited to the embodiments described above, and various modifications can be made without departing from the spirit of the present invention.

  Hereinafter, Embodiments 2 to 4 of the present invention will be described. In addition, although Embodiment 1-4 can also each be implemented independently, it is also possible to implement combining suitably. The present invention is not limited to the combinations shown in the embodiments, and can be implemented by various combinations.

(Second Embodiment)
Next, the fuel injection control apparatus in the second embodiment will be described with reference to FIG. Note that the fuel injection control device of the present embodiment has the same configuration as the fuel injection control device of the first embodiment. Therefore, the block diagram in the fuel injection control device of this embodiment is omitted. The fuel injection control device of the present embodiment is different from the fuel injection control device of the first embodiment in the processing content for changing the abnormality detection threshold. In the memory 60 of the second embodiment, the second upper limit threshold is stored in addition to the first upper limit threshold, the first lower limit threshold, and the second lower limit threshold.

  When the execution of the first sequence is started, the sequence control unit 20 operates as indicated by timings t11 to t12, similarly to the operation described in the first embodiment. At this time, the abnormality detection threshold of the register 33 is set such that the upper limit threshold is the first upper limit threshold and the lower limit threshold is the first lower limit threshold. Then, as indicated by the timing t12, the sequence control unit 20 determines that it is the switching timing from the first sequence to the second sequence when the AD value reaches the first control upper limit. At this time, the sequence control unit 20 instructs the DMA controller 50 to switch the abnormality detection threshold set in the register 33 of the ADC 30.

  When instructed to switch the abnormality detection threshold value, the DMA controller 50 sets the abnormality detection threshold value stored in the memory 60 in the register 33 of the ADC 30. Accordingly, the abnormality detection threshold value of the register 33 during execution of the second sequence is rewritten to the first upper limit threshold value and the lower limit threshold value to the second lower limit threshold value. By doing so, while the second sequence is being executed, the analog watchdog unit 32 compares the AD value with the first upper limit threshold value, and also compares the AD value with the second lower limit threshold value. .

  Then, as indicated by timings t12 to t13, when the sequence control unit 20 starts executing the second sequence, the sequence control unit 20 outputs an off signal so that the first transistor 160 and the second transistor 170 continue to be in the off state. In addition, when the sequence control unit 20 starts executing the second sequence, the sequence control unit 20 outputs an on instruction signal so that the third transistor 180 is kept on. As a result, the first port p1 continues to be on, and the boost power supply 150 and the normal power supply 140 continue to be off.

  In addition, the sequence control unit 20 determines that it is a switching timing from the second sequence to the third sequence when a predetermined time has elapsed after the execution of the second sequence is started. When the sequence control unit 20 determines that the switching to the third sequence is performed, the sequence control unit 20 outputs an off instruction signal so that the first transistor 160 continues the off state. When the sequence control unit 20 determines that the sequence is to be switched, the sequence control unit 20 outputs an on instruction signal so that the second transistor 170 is turned on. When the sequence control unit 20 determines that the sequence is to be switched, the sequence control unit 20 outputs an on instruction signal so that the third transistor 180 is kept on.

  Further, when the sequence control unit 20 determines to switch to the third sequence, it instructs the DMA controller 50 to switch the abnormality detection threshold value set in the register 33 of the ADC 30.

  When instructed to switch the abnormality detection threshold value, the DMA controller 50 sets the abnormality detection threshold value stored in the memory 60 in the register 33 of the ADC 30. Thus, the abnormality detection threshold value of the register 33 during execution of the third sequence is rewritten to the second upper limit threshold value and the lower limit threshold value to the upper limit threshold value. That is, in the present embodiment, both the upper threshold and the lower threshold are changed. Note that the second sequence of the present embodiment is defined to operate in this way.

  As a result, the second region in which the second sequence is executed is between the timings t12 and t13. In addition, the fuel injection control device performs off control to stop energization of the injector 200 when the sequence control unit 20 executes the second sequence.

  In this way, while the third sequence is being executed, the analog watchdog unit 32 compares the AD value with the second upper limit threshold and also compares the AD value with the second lower limit threshold. become. Although the detailed description is omitted, the analog watchdog unit 32 compares the AD value with the second upper limit threshold and also compares the AD value with the second lower limit threshold even while the fourth sequence is being executed. become.

  Note that the third region (timing t13 to t14) in FIG. 12 is a region in which the third sequence of this embodiment is executed. The third sequence of the present embodiment is the same as the second sequence of the first embodiment. However, the upper limit value of the abnormality detection threshold is different between the third sequence of the present embodiment and the second sequence of the first embodiment. Further, the fourth area (timing t14 to t15) in FIG. 12 is an area in which the fourth sequence of the present embodiment is executed. And the 4th sequence of this embodiment is corresponded to the 3rd sequence of 1st Embodiment. However, the upper limit value of the abnormality detection threshold is different between the fourth sequence of the present embodiment and the third sequence of the first embodiment. For this reason, detailed description related to the third sequence and the fourth sequence is omitted.

  Accordingly, in the first region, the normal region is between the first upper limit threshold and the first lower limit threshold. In the second region, the normal region is between the first upper limit threshold and the second lower limit threshold. In the third region and the fourth region, a region between the second upper limit threshold and the second lower limit threshold is a normal region.

  As in the second embodiment, by increasing the chance of changing the abnormality detection threshold, erroneous detection in the analog watchdog unit 32 can be suppressed, and more accurate abnormality detection can be realized.

  The DMA controller 50 may change the abnormality detection threshold value to a different value corresponding to each sequence each time the sequence by the sequence control unit 20 is switched. For example, in FIG. 12, the abnormality detection threshold is also changed when the third sequence is switched to the fourth sequence. Thereby, the accuracy of abnormality detection can be further improved.

(Third embodiment)
Next, the fuel injection control apparatus in the third embodiment will be described with reference to FIG. Note that the fuel injection control device of the present embodiment has the same configuration as the fuel injection control device of the first embodiment. Therefore, the block diagram in the fuel injection control device of this embodiment is omitted. The fuel injection control apparatus according to the present embodiment is different from the fuel injection control apparatus according to the first embodiment in that abnormality detection is also performed by the sequence control unit 20 in addition to the ADC 30. Further, the description will be given with reference to the flowchart shown in FIG.

  The sequence control unit 20 performs an AD upper limit check every time the AD value output from the ADC 30 is input. For example, when starting the processing of the flowchart shown in FIG. 7, the sequence control unit 20 first performs an AD upper limit check.

  Note that, as shown in FIG. 13, the AD upper limit value is larger than the first upper limit threshold and is the maximum upper limit value. In addition, the AD upper limit value is usually a value that exceeds the value that the AD value can take. That is, the AD upper limit value is a value that is larger than any one of the first upper limit threshold value, the first lower limit threshold value, and the second lower limit threshold value. Therefore, when the AD value reaches the AD upper limit value, it is desirable that the fuel injection control device stops the energization of the injector 200 as soon as possible.

  Therefore, the sequence control unit 20 compares the AD value with the AD upper limit value. In other words, the sequence control unit 20 confirms that the AD value has not reached the AD upper limit value. If the sequence control unit 20 determines that the AD value has reached the AD upper limit value, the sequence control unit 20 proceeds to step S61. When the sequence control unit 20 determines that the AD value has reached the AD upper limit value, the sequence control unit 20 stops energization of the injector 200. The sequence control unit 20 can stop energization of the injector 200 by turning off the third transistor 180.

  As described above, in the fuel injection control device, the CPU 10 can stop energization of the injector 200 in response to the abnormality notification from the analog watchdog unit 32. However, in this case, in the fuel injection control device, the CPU 10 instructs the sequence control unit 20 to stop energizing the injector 200 in response to the abnormality notification from the analog watchdog unit 32. In the fuel injection control device, the sequence control unit 20 stops energization of the injector 200 in response to an instruction from the CPU 10.

  On the other hand, when stopping energization to the injector 200 according to the result of the AD upper limit check, in the fuel injection control device, the sequence control unit 20 compares the AD value with the AD upper limit value. Then, the sequence control unit 20 stops energization of the injector 200 on the condition that the AD value has reached the AD upper limit value. In this case, the fuel injection control device can stop the energization to the injector 200 earlier than the energization to the injector 200 according to the abnormality detection result by the analog watchdog unit 32. Therefore, the fuel injection control device of this embodiment can improve the reliability of the abnormality detection function.

(Fourth embodiment)
Next, a fuel injection control apparatus according to the fourth embodiment will be described with reference to FIG. Note that the alternate long and short dash line in FIG. 14 shows the waveform of the control current and the state of the boosting power supply when the second port p2 is shorted to ground, for example.

  Further, the fuel injection control device of the present embodiment has the same configuration as the fuel injection control device of the above-described embodiment. Therefore, the block diagram in the fuel injection control device of this embodiment is omitted. The fuel injection control device of this embodiment is different from the fuel injection control device of the above-described embodiment in that abnormality detection by pulse width is performed in addition to abnormality detection by comparing the AD value and the threshold value.

  As described above, the sequence control unit 20 energizes the injector 200 by executing the first sequence until the AD value reaches the first control upper limit, and when the AD value reaches the first control upper limit, the injector 200 The power supply to is stopped.

Furthermore, the sequence controller 20 has a pulse width detection function. In other words, the sequence control unit 20 has a function of detecting the energization time during which the injector 200 is energized. In other words, the sequence control unit 20 has a function of detecting the time during which the first transistor 160 or the second transistor 170 is kept on. In other words, the sequence control unit 20 has a waveform check function of a boost power supply or a normal power supply.

  The sequence control unit 20 detects an abnormality depending on whether the energization time during which the injector 200 is energized has reached a predetermined value. The sequence control unit 20 determines that the energization time has not reached the predetermined value and determines that it is normal, and determines that it is abnormal when the energization time reaches the predetermined value. This predetermined value can also be referred to as a pulse width threshold. The pulse width threshold is a value indicating a time longer than the energization time during normal boost control.

  For example, as indicated by a one-dot chain line in FIG. 14, for example, when the second port p2 is short-circuited to the ground, the control current does not reach the first control upper limit, and thus the on-state of the boost power supply continues. That is, the energization time exceeds the normal time and reaches the pulse width threshold. In such a case, the sequence control unit 20 detects that the energization time has reached the pulse width threshold and determines that it is abnormal.

  Note that the predetermined value used for the abnormality detection can be stored in a register or the like. Therefore, the sequence control unit 20 detects the energization time during which the injector 200 is energized, reads the pulse width threshold value from the register, and compares them.

  Thus, the fuel injection control device can detect an open abnormality when executing a sequence corresponding to boost control.

  10 CPU, 20 sequence control unit, 21 control data setting unit, 22 comparator, 23 output control unit, 24 AND circuit, 25 output unit, 30 ADC, 31 conversion unit, 32 analog watchdog unit, 33 register, 40 timer, 50 DMA controller, 60 memory, 100 microcomputer, 110 first driver, 120 second driver, 130 third driver, 140 normal power supply, 150 step-up power supply, 160 first transistor, 170 second transistor, 180 third transistor, 190 current Detection resistor, 200 injector, p1 first port, p2 second port

Claims (6)

A fuel injection control device including a microcomputer (100) for controlling fuel injection from the fuel injection unit by changing a state of energization to the fuel injection unit based on a current flowing in the fuel injection unit. ,
The microcomputer is
A plurality of sequences can be executed, and the energization state corresponding to the sequence being executed is set based on the current flowing through the fuel injection unit, and the energization is performed by switching the sequence to be executed. A sequence control unit (20) for changing the state;
The current flowing through the fuel injection unit is converted from analog to digital value and output to the sequence control unit, and the digital value is compared with the abnormality detection threshold value so that the digital value becomes the abnormality detection threshold value. An AD conversion unit (30) for detecting an abnormality depending on whether or not it has reached,
A threshold changing unit (50) capable of changing the threshold for abnormality detection to be compared with the digital value in the AD conversion unit in response to switching of the sequence by the sequence control unit,
The AD conversion unit compares the digital value with the abnormality detection threshold value changed by the threshold value changing unit. The AD conversion unit compares the digital value with a threshold value on the upper limit side of the current flowing through the fuel injection unit as the abnormality detection threshold value, and flows into the fuel injection unit as the abnormality detection threshold value. The threshold value on the lower limit side of the current is compared with the digital value,
The fuel injection control device according to claim 1, wherein the threshold value changing unit changes both the upper limit side threshold value and the lower limit side threshold value.   3. The fuel according to claim 1, wherein the threshold value changing unit changes the abnormality detection threshold value to a different value corresponding to each sequence every time the sequence is switched by the sequence control unit. Injection control device.   The sequence control unit compares the maximum upper limit value, which is a value larger than the upper limit side threshold value, with the digital value, and performs abnormality detection depending on whether the digital value has reached the maximum upper limit value. The fuel injection control device according to any one of claims 1 to 3.   When executing one of the plurality of sequences, the sequence control unit energizes the fuel injection unit until the digital value reaches a control upper limit value that is a control threshold value, and the digital value is the control value. When the upper limit is reached, energization to the fuel injection unit is stopped, and abnormality detection is performed based on whether or not the energization time for energizing the fuel injection unit has reached a predetermined value, The fuel injection control device according to any one of claims 1 to 4, wherein when the energization time reaches the predetermined value, it is determined to be abnormal.   6. A stop instructing unit (10) for stopping energization of the fuel injection unit when an abnormality is detected by the abnormality detection by the AD conversion unit. The fuel injection control device according to one item.

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