JP2009158800A - Solid-state imaging element, and imaging device using it - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To detect a focal point with a pixel having a photoelectric conversion part divided into two, and to further improve focal point detection accuracy. <P>SOLUTION: This solid-state imaging element is provided with a plurality of two-dimensionally arranged pixels on a substrate 51. Each of partial pixels 20H has a first photoelectric conversion part 42 and a second photoelectric conversion part 43 respectively present in one-side region and the other-side region divided by a division line in a plan view viewed from the normal direction of the substrate 51, and respectively subjecting incident light to photoelectric conversion. A space 91 is formed on interlayer films 56-58 formed on the substrate 51 along the division line in the plan view. A space 71 is formed between a semiconductor region constituting the photoelectric conversion part 42 and a semiconductor region constituting the photoelectric conversion part 43. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention

  In recent years, imaging devices such as video cameras and electronic still cameras have been widely used. These cameras use a solid-state imaging device such as a CCD type or an amplification type. In these solid-state imaging devices, a plurality of pixels having photoelectric conversion units that generate signal charges according to the amount of incident light are arranged in a matrix. In an amplification type solid-state imaging device, signal charges generated and accumulated in a photoelectric conversion unit of a pixel are guided to an amplification unit provided in the pixel, and a signal amplified by the amplification unit is output from the pixel.

  In an imaging device such as a camera, it is necessary to detect the focus adjustment state of the photographing lens in order to realize automatic focus adjustment. Conventionally, a focus detection element has been provided separately from the solid-state imaging element. However, in that case, the cost increases or the size of the apparatus increases by the amount of the focus detection element and the focus detection optical system that guides light to the focus detection element.

  Therefore, in recent years, a so-called pupil division phase difference method (sometimes called a pupil division method or a phase difference method) is adopted as a focus detection method, and solid-state imaging configured to be used as a focus detection element. An element has been proposed (for example, Patent Document 1 below). The pupil division phase difference method detects the defocus amount of the photographing lens by forming a pair of divided images by dividing the light beam passing through the photographing lens into pupils and detecting the pattern shift (phase shift amount). is there.

  In the solid-state imaging device disclosed in Patent Document 1, a plurality of pixels each having a photoelectric conversion unit divided into two are provided. A floating diffusion is arranged between one part and the other part of the two-divided photoelectric conversion unit, and the photoelectric conversion unit is divided into two by this floating diffusion. On such a photoelectric conversion unit, microlenses are provided on a one-to-one basis with respect to pixels. The two-divided photoelectric conversion unit is disposed at a position that is substantially image-formed (ie, substantially conjugate) with the exit pupil of the photographing lens by the microlens. From the relationship described above, in each pixel, one part of the photoelectric conversion unit divided into two is a light beam from a region that is a part of the exit pupil of the photographing lens and decentered in a predetermined direction from the center of the exit pupil. Is selectively received and photoelectrically converted. Further, in each pixel, the other part of the photoelectric conversion unit divided into two is selectively a light beam from a region that is a part of the exit pupil of the photographing lens and decentered in the opposite direction from the center of the exit pupil. Light is received and photoelectrically converted.

  In the solid-state imaging device disclosed in Patent Document 1, at the time of focus detection, the signal of one part and the signal of the other part of the two-divided photoelectric conversion unit of each pixel having the photoelectric conversion unit divided into two are floating at different timings. It is transferred to the diffusion and read out individually. Then, according to the principle of the pupil division phase difference method, the focus adjustment state of the photographing lens is detected based on these signals.

  By the way, in the following Patent Document 2, in a normal solid-state imaging device in which the photoelectric conversion unit of each pixel is not divided into two and does not have a focus detection function, a substrate is provided to increase the light collection efficiency to the photoelectric conversion unit. A solid-state imaging device is disclosed in which a gap is formed in an interlayer film formed thereon so as to surround the photoelectric conversion unit in a plan view as viewed from the normal direction of the substrate.

Patent Document 3 listed below is a solid-state imaging device in which the photoelectric conversion unit of each pixel is not divided into two parts and does not have a focus detection function, and all the pixels simultaneously emit electrons with a constant exposure time of each pixel. In order to realize the shutter operation, a solid-state imaging device is disclosed in which a charge storage unit that temporarily accumulates charges from the photoelectric conversion unit is provided between the photoelectric conversion unit and the amplification unit in each pixel. In the solid-state imaging device disclosed in Patent Document 3, in order to reduce the light incident on the charge storage portion and suppress the generation of a false signal due to the light incidence, a gap is formed in an interlayer film formed on the substrate. Is formed so as to surround the charge storage portion in a plan view as viewed from the normal direction of the substrate.
JP 2003-244712 A JP 2003-60179 A JP 2007-157912 A

  However, as a result of the inventor's research, in the solid-state imaging device as disclosed in Patent Document 1, the separation of the optical signal and the separation of the electrical signal is not necessarily sufficient between each part of the photoelectric conversion unit divided into two. However, it has been found that the focus detection accuracy is reduced due to this.

  That is, in the photoelectric conversion unit as disclosed in Patent Document 1, one part of the photoelectric conversion unit divided into two parts should receive only light from one side of the exit pupil of the photographing lens. Light from the other side of the exit pupil is also received as leakage light, stray light, etc. Similarly, the other part of the photoelectric conversion unit divided into two receives only light from the other side of the exit pupil of the photographing lens. However, since light from one side of the exit pupil is also received as leakage light, stray light, etc., the separation of the optical signal is not always sufficient between the two parts of the photoelectric conversion unit divided into two. As a result, the focus detection accuracy decreases.

  In the photoelectric conversion unit as disclosed in Patent Document 1, electrons generated by photoelectric conversion of one part of the two-divided photoelectric conversion unit are only accumulated in the charge storage layer of the one part. In other words, it is also accumulated in the charge storage layer of the other part of the photoelectric conversion unit divided into two as a crosstalk component. Similarly, the electrons generated by photoelectric conversion of the other part of the photoelectric conversion unit divided into two are In addition to being stored in the charge storage layer of the other part, it is also stored in the charge storage layer of one part of the photoelectric conversion unit divided into two as a crosstalk component. The separation of the electrical signals between the parts is not always sufficient, and as a result, the focus detection accuracy decreases.

  In the solid-state imaging devices disclosed in Patent Documents 1 and 2, light is reflected by the gap formed in the interlayer film to increase the light collection efficiency and suppress the generation of false signals. It is premised on a solid-state imaging device that does not have (a solid-state imaging device in which the photoelectric conversion unit of each pixel is not divided into two), and cited references 1 and 2 devise such a gap formation position. However, it does not disclose or suggest any points that can contribute to improvement of focus detection accuracy.

  The present invention solves the problems of the solid-state imaging device newly disclosed as a result of the above-described research of the present inventor, that is, the photoelectric conversion divided into two. An object of the present invention is to provide a solid-state imaging device that can detect a focus by including a pixel having a portion and can further improve focus detection accuracy. It is another object of the present invention to provide an imaging apparatus using such a solid-state imaging device.

  In order to solve the above-described problem, the solid-state imaging device according to the first aspect of the present invention includes a plurality of pixels arranged in a two-dimensional shape on a substrate, and at least some of the plurality of pixels include: A first photoelectric conversion unit and a second photoelectric conversion unit that respectively exist in one region and the other region divided by a dividing line in a plan view viewed from the normal direction of the substrate, and each photoelectrically converts incident light. A gap is formed along the dividing line in the plan view in the interlayer film having the conversion portion and formed on the substrate.

  In the solid-state imaging device according to the second aspect of the present invention, the at least some of the pixels are provided with a microlens, and the microlens has an exit pupil of an optical system that forms a subject image on the solid-state imaging device. The image is formed at a height position near the end of the light incident side in the gap.

  The solid-state imaging device according to a third aspect of the present invention is the solid-state imaging device according to the first or second aspect, wherein a gap is formed in the interlayer film formed on the substrate in the planar view. In addition to the portions along the dividing line, they are formed so as to surround the effective light receiving regions of the first and second photoelectric conversion units, respectively.

  A solid-state imaging device according to a fourth aspect of the present invention is the solid-state imaging device according to any one of the first to third aspects, wherein in at least some of the pixels, the semiconductor region constituting the first photoelectric conversion unit and the second A gap is formed between the semiconductor region constituting the photoelectric conversion portion.

  The solid-state imaging device according to a fifth aspect of the present invention is the solid-state imaging device according to any one of the first to third aspects, wherein the at least some pixels include the semiconductor region constituting the first photoelectric conversion unit and the second. A separation portion made of an insulating material is formed between the semiconductor region constituting the photoelectric conversion portion.

  The solid-state imaging device according to the sixth aspect of the present invention includes a plurality of pixels arranged two-dimensionally on a substrate, and at least some of the plurality of pixels are arranged in a normal direction of the substrate. Each having a first photoelectric conversion unit and a second photoelectric conversion unit that photoelectrically convert incident light respectively in one region and the other region divided by a dividing line in a plan view as viewed, In at least some of the pixels, a gap is formed between the semiconductor region forming the first photoelectric conversion unit and the semiconductor region forming the second photoelectric conversion unit.

  A solid-state imaging device according to a seventh aspect of the present invention includes a plurality of pixels arranged two-dimensionally on a substrate, and at least some of the plurality of pixels are located in a normal direction of the substrate. Each having a first photoelectric conversion unit and a second photoelectric conversion unit that photoelectrically convert incident light respectively in one region and the other region divided by a dividing line in a plan view as viewed, In at least some of the pixels, a separation portion made of an insulating material is formed between a semiconductor region constituting the first photoelectric conversion portion and a semiconductor region constituting the second photoelectric conversion portion. .

  The solid-state imaging device according to an eighth aspect of the present invention is the solid-state imaging device according to the sixth or seventh aspect, wherein at least some of the pixels are provided with a microlens, and the microlens has a subject image on the solid-state imaging device. The exit pupil of the optical system to be imaged is imaged at a height position near the first and second photoelectric conversion units.

  A solid-state imaging device according to a ninth aspect of the present invention is the solid-state imaging device according to any one of the sixth to eighth aspects, wherein a gap is formed in the interlayer film formed on the substrate in the plan view. The pixel is formed so as to surround the effective light receiving regions of the first and second photoelectric conversion units of the at least some of the pixels, except for the location along the dividing line of the pixels.

  An imaging apparatus according to a tenth aspect of the present invention includes a solid-state imaging element according to any one of the first to ninth aspects, an optical system that forms a subject image on the solid-state imaging element, and the at least some pixels. A detection processing unit that outputs a detection signal indicating a focus adjustment state of the optical system based on a signal from the first photoelectric conversion unit and a signal from the second photoelectric conversion unit; and from the detection processing unit And an adjusting unit that adjusts the focus of the optical system based on the detection signal.

  According to the present invention, it is possible to provide a solid-state image pickup device that can detect a focus by providing a pixel having a photoelectric conversion unit divided into two and can further improve the focus detection accuracy, and an image pickup apparatus using the same. be able to.

  Hereinafter, a solid-state imaging device and an imaging apparatus according to the present invention will be described with reference to the drawings.

  [First Embodiment]

  FIG. 1 is a schematic block diagram showing an electronic camera 1 as an imaging apparatus according to the first embodiment of the present invention. A photographing lens 2 is attached to the electronic camera 1. The photographing lens 2 is driven by a lens control unit 2a for focus and diaphragm. In the image space of the photographic lens 2, the imaging surface of the solid-state imaging device 3 is arranged.

  The solid-state imaging device 3 is driven by a command from the imaging control unit 4 and outputs a signal. The signal output from the solid-state imaging device 3 is either an image signal or a focus detection signal. In any case, the signal is processed through the signal processing unit 5 and the A / D conversion unit 6 and then temporarily stored in the memory 7. The memory 7 is connected to the bus 8. The bus 8 is also connected with a lens control unit 2a, an imaging control unit 4, a microprocessor 9, a focus calculation unit (detection processing unit) 10, a recording unit 11, an image compression unit 12, an image processing unit 13, and the like. The microprocessor 9 is connected to an operation unit 9a such as a release button. A recording medium 11a is detachably attached to the recording unit 11 described above. The operation of the electronic camera 1 will be described later with reference to FIG.

  FIG. 2 is a circuit diagram showing a schematic configuration of the solid-state imaging device 3 in FIG. The solid-state imaging device 3 includes a plurality of pixels 20 arranged in a matrix and a peripheral circuit for outputting a signal from the pixels 20. In the figure, the number of pixels indicates 16 pixels of 4 rows horizontally and 4 rows vertically. However, it is not limited to this. In this embodiment, there are five types of pixels 20R, 20G, 20B, 20V, and 20H, which will be described later, as pixels, but in FIG. Yes. These pixels 20 output either an imaging signal or a focus detection signal in accordance with a peripheral circuit drive signal. Further, the exposure time and timing of all the pixels 20 can be made the same by simultaneously resetting the photoelectric conversion unit.

  The peripheral circuit includes a vertical scanning circuit 21, a horizontal scanning circuit 22, driving signal lines 23 and 24 connected thereto, a vertical signal line 25 for receiving a signal from a pixel, and a constant current source 26 connected to the vertical signal line 25. And a correlated double sampling circuit (CDS) 27, a horizontal signal line 28 for receiving a signal output from the correlated double sampling circuit 27, an output amplifier 29, and the like.

  The vertical scanning circuit 21 and the horizontal scanning circuit 22 output drive signals based on a command from the imaging control unit 4 of the electronic camera 1. Each pixel 20 is driven by receiving a drive signal output from the vertical scanning circuit 21 from a predetermined drive signal line 23, and outputs an imaging signal or a focus detection signal to the vertical signal line 25. There are a plurality of drive signals output from the vertical scanning circuit 21, and accordingly, a plurality of drive wirings 23. These will be described later.

  FIG. 3 is a schematic plan view schematically showing the solid-state imaging device 3 (particularly, its effective pixel region 31) in FIG. In the present embodiment, as shown in FIG. 3, the effective pixel region 31 of the solid-state imaging device 3 includes two focus detection regions 32 and 33 having a cross shape disposed in the center, and 2 disposed on both sides. Two focus detection areas 34 and 35 and two focus detection areas 36 and 37 arranged above and below are provided. As shown in FIG. 3, an X axis, a Y axis, and a Z axis that are orthogonal to each other are defined. The direction of the arrow in the X-axis direction is called the + X direction or + X side, and the opposite direction is called the -X direction or -X side, and the same applies to the Y-axis direction. A plane parallel to the XY plane coincides with the imaging surface (light receiving surface) of the solid-state imaging device 3. The arrangement in the X-axis direction is a row, and the arrangement in the Y-axis direction is a column. Incident light is incident from the front side of the drawing in FIG. These points are the same for the drawings described later. In the present specification, the X-axis direction may be referred to as the left-right direction, the + X side as the right side, the -X side as the left side, the Y-axis direction as the up-down direction, the + Y side as the upper side, and the -Y side as the lower side.

  FIG. 4 is a schematic enlarged view in which the vicinity of the focus detection region 35 in FIG. 3 is enlarged, and schematically shows the pixel arrangement. FIG. 5 is a schematic enlarged view in which the vicinity of the focus detection area 36 in FIG. 3 is enlarged, and schematically shows the pixel arrangement. As described above, the solid-state imaging device 3 has the five types of pixels 20R, 20G, 20B, 20V, and 20H as the pixels 20. 4 and 5, the pixels 20R, 20G, 20B, 20V, and 20H are denoted by reference signs “R”, “G”, “B”, “V”, and “H”, respectively.

  The pixels 20 </ b> R, 20 </ b> G, and 20 </ b> B are imaging pixels that output imaging signals for forming an image signal indicating a subject image formed by the photographing lens 2. In the present embodiment, each of the pixels 20R, 20G, and 20B is provided with a corresponding color filter (not shown), so that the pixel 20R has a red imaging signal, the pixel 20G has a green imaging signal, The pixels 20B are configured to output blue imaging signals. On the other hand, the pixels 20V and 20H are focus detection pixels (hereinafter referred to as “AF pixels”) that output a focus detection signal for detecting the focus adjustment state of the photographic lens 2, and are connected to the pixels 20V and 20H. Is not provided with a color filter. In order to increase the incident light quantity with respect to the AF pixels 20V and 20H and increase the focus detection accuracy, it is preferable that the pixels 20V and 20H are not provided with a color filter, but the present invention is not necessarily limited thereto.

  In the present embodiment, as shown in FIGS. 4 and 5, the imaging pixels 20R, 20G, and 20B are basically arranged according to the Bayer array, and every other pixel in the focus detection area 35 extending in the Y-axis direction. AF pixels 20V are arranged, and AF pixels 20H are arranged every other pixel in the focus detection region 36 extending in the X-axis direction. The focus detection areas 33 and 34 are the same as the focus detection area 35, and the focus detection areas 32 and 37 are the same as the focus detection area 36. However, the arrangement is not limited to such an arrangement. For example, all the pixels in the focus detection areas 33 to 35 are AF pixels 20V, and all the pixels in the focus detection areas 32, 36, and 37 are AF pixels 20H. Also good. Further, in the present invention, it may be configured for black and white, and in that case, it is not necessary to provide a color filter for the imaging pixels. Further, even when configured for color, it is not limited to the Bayer arrangement as described above.

  FIG. 6 is a circuit diagram showing the imaging pixels 20R, 20G, and 20B of the solid-state imaging device 3 in FIG. These pixels have the same circuit configuration. Each of the imaging pixels 20R, 20G, and 20B includes a photodiode 41 as a photoelectric conversion unit that generates and accumulates charges according to incident light, a floating diffusion unit 44 as a predetermined portion, and the photodiode 41 to the floating diffusion unit 44. A transfer transistor 45 for transferring charges to the pixel, a pixel amplifier 48 as an amplifier for outputting a signal corresponding to the amount of charge in the floating diffusion 44, and a reset transistor 49 as a reset for discharging the charge in the floating diffusion 44. And a selection transistor 50 as a selection switch for outputting a signal of the pixel amplifier 48 from the pixel. In FIG. 6, VDD is a power supply, and 235 is a power supply wiring for connecting to the power supply VDD.

  FIG. 7 is a circuit diagram showing the AF pixels 20V and 20H of the solid-state imaging device 3 in FIG. These pixels have the same circuit configuration. 7, elements that are the same as or correspond to the elements in FIG. 6 are given the same reference numerals, and redundant descriptions thereof are omitted. The AF pixels 20V and 20H are different from the imaging pixels 20R, 20G, and 20B in terms of circuit configuration in that two photodiodes are divided into two instead of one photodiode 41 as one photoelectric conversion unit. The only point is that it has two photodiodes 42 and 43 as a photoelectric conversion unit, and accordingly, there are two transfer transistors 46 and 47 that can operate independently of each other, instead of one transfer transistor 45. . The transfer transistor 46 transfers charge from the photodiode 42 to the floating diffusion 44, and the transfer transistor 47 transfers charge from the photodiode 43 to the floating diffusion 44.

  In this embodiment, the transfer transistors 45 to 47, the pixel amplifier 48, the reset transistor 49, and the selection transistor 50 are all configured by NMOS transistors.

  The gate electrodes of the transfer transistors 45 of the imaging pixels 20R, 20G, and 20B and one of the transfer transistors 46 of the AF pixels 20V and 20H are connected in common to each pixel row, and are connected to the drive wiring 23 from the vertical scanning circuit 21. The drive signal φTGA is supplied through the wiring 231. The gate electrodes of the other transfer transistors 47 of the AF pixels 20V and 20H are connected in common to each pixel row, and the drive signal φTGB is supplied from the vertical scanning circuit 21 via the wiring 232 of the drive wiring 23. .

  The gate electrodes of the selection transistors 50 of the pixels 20R, 20G, 20B, 20V, and 20H are connected in common to each pixel row, and the drive signal φS is supplied from the vertical scanning circuit 21 via the wiring 233 of the drive wiring 23. Is done. The gate electrodes of the reset transistors 49 of the pixels 20R, 20G, 20B, 20V, and 20H are commonly connected to each pixel row, and the drive signal φR is supplied from the vertical scanning circuit 21 via the wiring 234 of the drive wiring 23. Is done.

  6 and 7, one terminal of the photodiodes 41, 42, and 43 and one terminal of the floating diffusion portion 44 are described as ground for convenience. However, in this embodiment, the potential is actually the potential of the P-type well layer 52 as understood from FIGS. 9 and 11 described later.

  FIG. 8 is a schematic plan view schematically showing the main part of the AF pixel 20H of the solid-state imaging device 3 in FIG. In order to facilitate understanding, in FIG. 8, the microlens 66 is indicated by a one-dot chain line, and the gaps 71 to 77 are hatched. FIG. 9 is a schematic cross-sectional view along the line A-A ′ in FIG. 8. FIG. 9 also shows a typical light beam.

As shown in FIG. 9, a P-type well 52 is formed on an N-type silicon substrate 51. Photodiodes 42 and 43 are formed by forming an N-type layer (N ⁺ ) 53 as a charge storage layer in the P-type well 52. These photodiodes 42 and 43 have a structure in which a high-concentration P-type layer (P ⁺⁺ ) 54 is added to the substrate surface side, and are photodiodes. The same applies to the photodiodes 41 of the imaging pixels 20R, 20G, and 20B. Although not shown in the drawing, in the P-type well 52, the above-described source / drain of the transistor, the floating diffusion portion 44, and the like are formed.

  As shown in FIG. 8, the two photodiodes 42 and 43 are divided by a dividing line BB ′ in the Y-axis direction in a plan view as viewed from the normal direction (Z-axis direction) of the substrate 51. And the region on the + X side. As shown in FIGS. 8 and 9, one microlens 66 that guides incident light to the photodiodes 42 and 43 is disposed. In the present embodiment, as shown in FIG. 9, the microlens 66 forms an image of the exit pupil of the photographing lens 2 in FIG. 1 at a height position (Z-axis direction position) near the photodiodes 42 and 43. Designed to let you. As shown in FIG. 8, the microlens 66 is arranged so that its optical axis passes through the intersection of the dividing line B-B ′ and the center line of the photodiodes 42 and 43 in the Y-axis direction. Therefore, the incident light guided from the microlens 66 is divided into pupils and is incident on the photodiodes 42 and 43. That is, in the pixel 20H, the photodiode 42 selectively receives light flux from the exit pupil region decentered to the + X side from the center of the exit pupil of the photographing lens 2, and the photodiode 43 The light beam from the exit pupil region decentered from the center of the exit pupil toward -X side is selectively received effectively. For example, in the pixel at the center of the effective pixel region, the micro lens 66 is arranged so that its optical axis passes through the intersection point, while in the pixel at the peripheral portion of the effective pixel region, the micro lens 66 has its optical axis as the optical axis. You may arrange | position so that it may pass through the position shifted | deviated from the said intersection.

  In this embodiment, as shown in FIGS. 8 and 9, a gap 71 is formed between the semiconductor region constituting the photodiode 42 and the semiconductor region constituting the photodiode 43 in the AF pixel 20 </ b> H. Has been. As shown in FIG. 8, the gap 71 is formed along the parting line B-B ′ in a plan view viewed from the Z-axis direction. The depth of the gap 71 from the silicon surface (depth in the Z-axis direction) can be, for example, about 1 μm, about 5 μm, about 10 μm, and the like. The width of the gap 71 may be, for example, 0.1 μm or more. In the present embodiment, air is present in the gap 71 or is in a state close to a vacuum. However, in the present invention, an insulating material such as silicon oxide may be embedded in the gap 71 (the same applies to second and third described later). In this case, the insulating material becomes a separation portion that electrically separates the semiconductor region constituting the photodiode 42 and the semiconductor region constituting the photodiode 43.

  As shown in FIG. 9, on the substrate 51, a silicon oxide film 55 to be a gate insulating film and the like, and interlayer films 56 to 58 made of, for example, a silicon oxide film are sequentially formed from the lower side (substrate 51 side). ing. Although not shown in the drawing, between the silicon oxide film 55 and the interlayer film 56, the gate electrode of the transistor described above is formed. Further, as shown in FIG. 9, a first aluminum wiring layer 59, a second aluminum wiring layer 60, and a third aluminum wiring layer 61 are formed, and thereby the wiring of the circuit shown in FIG. Has been made. The third aluminum wiring layer 61 is a light shielding film that covers the area other than the effective light receiving area of each pixel.

  In the present embodiment, as shown in FIGS. 8 and 9, gaps 72 to 76 are formed in the interlayer films 56 to 58. As shown in FIG. 8, the gap 72 is formed along the left side of the photodiode 42 in a plan view as viewed from the Z-axis direction, and the gap 73 is formed along the upper side of the photodiode 42 in the plan view. Is formed along the lower side of the photodiode 42 in a plan view viewed from the Z-axis direction, and the gap 75 is formed along the right side of the photodiode 43 in a plan view viewed from the Z-axis direction. The gap 77 is formed along the lower side of the photodiode 43 in a plan view as viewed from the Z-axis direction. As described above, the gaps 72 to 77 surround the effective light receiving regions of the photodiodes 42 and 43, respectively, except for the portions along the dividing line B-B '.

  In the present embodiment, as shown in FIG. 9, an insulating film 62 such as a silicon nitride film, planarization layers 63 and 65, and a microlens 66 are provided at a position above the third aluminum wiring layer 61. It has been. In the AF pixel 20H, no color filter is provided between the planarization layers 63 and 65.

  The structure of the pixel 20H (see FIG. 5) of the solid-state imaging device 3 in FIG. 1 has been described above. The structure of the pixel 20V (see FIG. 4) of the solid-state imaging device 3 in FIG. 1 is basically the pixel 20H rotated by 90 ° around the Z-axis direction, and thus detailed description thereof is omitted. To do.

  Next, the structure of the imaging pixels 20R, 20G, and 20B (see FIGS. 4 and 5) of the solid-state imaging device 3 in FIG. 1 will be described. FIG. 10 is a schematic plan view schematically illustrating main parts of the imaging pixels 20R, 20G, and 20B, and corresponds to FIG. 11 is a schematic cross-sectional view taken along line C-C ′ in FIG. 10 and corresponds to FIG. 9. 10 and 11, the same or corresponding elements as those in FIGS. 8 and 9 are denoted by the same reference numerals, and redundant description thereof is omitted.

  The imaging pixels 20R, 20G, and 20B are mainly different from the AF pixel 20H only in the points described below. In the imaging pixels 20 </ b> R, 20 </ b> G, and 20 </ b> B, the two photodiodes 42 and 43 that have been divided into two are combined into one photodiode 41. Accordingly, in the imaging pixels 20R, 20G, and 20B, the gap 71 formed in the semiconductor region along the dividing line B-B ′ in the AF pixel 20H is not formed. In the imaging pixels 20R, 20G, and 20B, gaps 81 to 84 corresponding to the gaps 72 to 77 of the AF pixel 20H are formed in the interlayer films 56 to 58. As shown in FIG. 10, the gap 81 is formed along the left side of the photodiode 41 in a plan view as viewed from the Z-axis direction, and the gap 82 is formed along the right side of the photodiode 41 in the plan view. Is formed along the upper side of the photodiode 41 in the plan view, and the gap 84 is formed along the lower side of the photodiode 41 in the plan view. Further, in the imaging pixels 20R, 20G, and 20B, a color filter 64 of a corresponding color is provided between the flattening layers 63 and 65.

  The solid-state imaging device 3 according to the present embodiment can basically be manufactured using a semiconductor manufacturing process in the same manner as a conventional solid-state imaging device. As for the gap 71, for example, after forming the N-type layer 53 of the photodiodes 41 to 43 in the P-type well layer 52, a resist is formed on the entire surface, and a portion corresponding to the gap 71 in this resist is formed by photolithography etching. Using this resist as a mask, the gap 71 is formed by dry etching, and then the resist is removed. Thereafter, the silicon oxide film 55 is formed by a normal method. At this time, the gap 71 can be prevented from being filled with the material by appropriately narrowing the width of the gap 71 or appropriately setting the film forming conditions of the material to be formed thereafter. However, in the case of an insulating material, even if it enters the gap 71, there is no problem because the function of blocking the movement of electrons is not affected. As described above, when the present embodiment is modified to embed an insulating material such as silicon oxide in the gap 71, the width of the gap 71 is made relatively wide and the film forming conditions of the insulating material are appropriately set. By setting, the insulating material can be embedded in the gap 71.

  With respect to the gaps 72 to 77, after forming up to the interlayer film 58, a resist is formed on the entire surface of the interlayer film 58, and only a portion corresponding to the gaps 72 to 77 in the resist is removed by a photolithography etching method. After forming the gaps 72 to 77 by dry etching as a mask, the resist is removed, and then the insulating film 62 may be formed by a normal method. At this time, the width of the gaps 72 to 77 and the film formation conditions for the insulating film 62 are set so that the material of the insulating film 62 does not enter the gaps 72 to 77.

  Needless to say, the method of forming the gaps 71 to 77 is not limited to the dry etching as described above.

  Next, each example of the driving procedure of the solid-state imaging device 3 will be described with reference to FIGS. 12 and 13. FIG. 12 is a timing chart showing a driving procedure of the solid-state image sensor 3 in the focus detection mode (operation mode for reading a focus detection signal from the solid-state image sensor 3). FIG. 13 is a timing chart showing a driving procedure of the solid-state image sensor 3 in the image-capturing mode (an operation mode for reading an imaging signal from the solid-state image sensor 3). Note that a transistor included in each pixel is an NMOS transistor, and is turned on in response to a high level (high) driving signal.

  First, a driving procedure in the focus detection mode will be described with reference to FIG. First, in the period T1, φTGA and φTGB of all rows are set to high, and the transfer transistors 45 to 47 of all the pixels 20R, 20G, 20B, 20V, and 20H are turned on. At this time, φR of all rows is set high and the reset transistors 49 of all the pixels 20R, 20G, 20B, 20V, and 20H are turned on. Therefore, in the period T1, all the pixels 20R, 20G, 20B, 20V, and 20H are turned on. The photodiodes 41 to 43 and the floating diffusion portion 44 are reset. ΦTGA and φTGB of all the rows are set to low after the period T1, and the transfer transistors 45 to 47 of all the pixels 20R, 20G, 20B, 20V, and 20H are turned off.

  In a period T2 after the period T1, a mechanical shutter (not shown) is opened. This period T2 is an exposure period.

  Next, in a period T3, φS in the first row is set high. As a result, the selection transistor 50 in the first row is turned on, row selection in the first row is started, and source follower readout by the pixel amplifier 48 in the first row is started.

  The period T11 is started after a predetermined period has elapsed since the start of the period T3. In the period T11, φR in the first row is set low, the reset transistor 49 in the first row is turned off, and the reset of the floating diffusion portion 44 in the first row is completed. Between the start time of the period T11 and the start time of the period T14, the dark level of the first row (the signal output from the pixel amplifier 48 of the first row corresponding to the reset state of the floating diffusion portion 44) is a pixel. Clamped (stored) in the CDS circuit 27 from the amplifier 48 via the vertical signal line 25. This dark level is due to the signal charge transferred from the photodiodes 41 and 42 (indicated as PDA in FIG. 12) in response to the φTGA in the first row, so that the next read signal is the photodiode. Used as a dark level for 41 and 42 (PDA).

  In period T14, φTGA in the first row is set high, and the transfer transistors 45 and 46 in the first row are turned on. Thereby, the signal charge accumulated in the photodiode 41 of the imaging pixels 20R, 20G, and 20B in the first row and the signal charge accumulated in one photodiode 42 of the AF pixels 20V and 20H in the first row. Is transferred to the floating diffusion 44 of the pixel. Then, at the end of the period T14, φTGA in the first row is set low, and the transfer transistors 45 and 46 in the first row are turned off. Between the end time of the period T14 and the end time of the period T11 (start time of the period T12), the potential fluctuation due to the charge transferred to the floating diffusion portion 44 in the first row is transmitted from the pixel amplifier 48 via the vertical signal line 25. And is clamped to the CDS circuit 27. That is, signal reading of the photodiodes 41 and 42 (PDA) is performed. Then, the CDS circuit 27 acquires a difference signal between this signal relating to the photodiodes 41 and 42 (PDA) and the previous dark level relating to the photodiodes 41 and 42 (PDA). Of these difference signals, only the one relating to the photodiode 42 of the AF pixels 20V and 20H is used as a focus detection signal.

  In period T12, φR in the first row is set high, the reset transistor 49 in the first row is turned on, and the floating diffusion portion 44 in the first row is reset.

  Period T13 starts from the end of period T12. In period T13, φR in the first row is set low, the reset transistor 49 in the first row is turned off, and the reset of the floating diffusion portion 44 is completed. Between the start time of the period T13 (end time of the period T12) and the start time of the period T15, the dark level of the first row (output from the pixel amplifier 48 of the first row corresponding to the reset state of the floating diffusion portion 44) Signal) is clamped (stored) from the pixel amplifier 48 to the CDS circuit 27 via the vertical signal line 25. This dark level is due to the signal charge transferred from the photodiode 43 (denoted as PDB in FIG. 12) in response to the φTGB in the first row for the next read signal. Used as dark level for PDB).

  In period T15, φTGB in the first row is set high, and the transfer transistor 47 in the first row is turned on. Thereby, the signal charge accumulated in the other photodiode 43 of the AF pixels 20V, 20H in the first row is transferred to the floating diffusion portion 44 of the pixel. Then, at the end of the period T15, φTGB in the first row is set low and the transfer transistor 47 in the first row is turned off. Between the end point of the period T15 and the end point of the period T13 (end point of the period T3), the potential fluctuation due to the charge transferred to the floating diffusion portion 44 in the first row is transmitted from the pixel amplifier 48 via the vertical signal line 25. And is clamped to the CDS circuit 27. That is, signal reading of the photodiode 43 (PDB) is performed. Then, the CDS circuit 27 acquires a difference signal between this signal related to the photodiode 43 (PDB) and the previous dark level related to the photodiode 43 (PDB). This difference signal is used as a focus detection signal.

  Thereafter, at the end of the period T3 (end of the period T13), φR in the first row is set high, the reset transistor 49 in the first row is turned on, and resetting of the floating diffusion portion 44 in the first row is started. At the same time, φS in the first row is set low, the selection transistor 50 in the first row is turned off, and the row selection in the first row is completed.

  Next, the process proceeds to the selection operation period T4 of the next second row through the horizontal blanking period. Since the same operation as the first line is repeated in the second and subsequent lines, the description thereof is omitted here. In this way, when signals are read from all rows, the focus detection mode is terminated.

  Next, a driving procedure in the imaging mode will be described with reference to FIG. In the imaging mode, the signal from the photodiodes 43 of the AF pixels 20V and 20H is not used and has no meaning, so φTGB may be arbitrary. Therefore, FIG. 13 does not describe φTGB.

  In the imaging mode, first, in a period T21, φTGA of all the rows is set high, and the transfer transistors 45 and 46 of all the pixels 20R, 20G, 20B, 20V, and 20H are turned on. At this time, φR of all rows is set high, and the reset transistors 49 of all the pixels 20R, 20G, 20B, 20V, and 20H are turned on. Therefore, at least in the period T21, the photodiodes 41 of the pixels 20R, 20G, and 20B are turned on. And the floating diffusion 44 is reset. ΦTGA of all rows is set to low after period T21, and the transfer transistors 45 and 46 of the pixels 20R, 20G, 20B, 20V, and 20H are turned off.

  In a period T22 after the period T21, a mechanical shutter (not shown) is opened. This period T22 is an exposure period.

  Next, in a period T23, φS in the first row is set high. As a result, the selection transistor 50 in the first row is turned on, row selection in the first row is started, and source follower readout by the pixel amplifier 48 in the first row is started.

  The period T31 is started after a predetermined period has elapsed since the start of the period T23. In period T31, φR in the first row is set low, the reset transistor 49 in the first row is turned off, and resetting of the floating diffusion portion 44 in the first row is completed. Between the start time of the period T31 and the start time of the period T32, the dark level of the first row (the signal output from the pixel amplifier 48 of the first row corresponding to the reset state of the floating diffusion portion 44) is the pixel. Clamped (stored) in the CDS circuit 27 from the amplifier 48 via the vertical signal line 25. This dark level is due to the signal charge transferred from the photodiodes 41 and 42 (indicated as PDA in FIG. 12) in response to the φTGA in the first row, so that the next read signal is the photodiode. Used as a dark level for 41 and 42 (PDA).

  In the period T32, φTGA in the first row is set high, and the transfer transistors 45 and 46 in the first row are turned on. Thereby, the signal charge accumulated in the photodiode 41 of the imaging pixels 20R, 20G, and 20B in the first row and the signal charge accumulated in one photodiode 42 of the AF pixels 20V and 20H in the first row. Is transferred to the floating diffusion 44 of the pixel. Then, at the end of the period T32, φTGA in the first row is set to low, and the transfer transistors 45 and 46 in the first row are turned off. Between the end point of the period T32 and the end point of the period T31 (end point of the period T23), potential fluctuation due to the charge transferred to the floating diffusion portion 44 in the first row is transmitted from the pixel amplifier 48 via the vertical signal line 25. And is clamped to the CDS circuit 27. That is, signal reading of the photodiodes 41 and 42 (PDA) is performed. Then, the CDS circuit 27 acquires a difference signal between this signal relating to the photodiodes 41 and 42 (PDA) and the previous dark level relating to the photodiodes 41 and 42 (PDA). Of these differential signals, only those relating to the photodiodes 41 of the imaging pixels 20R, 20G, and 20B are used as imaging signals.

  Thereafter, at the end of the period T23 (end of the period T31), φR in the first row is set high, the reset transistor 49 in the first row is turned on, and resetting of the floating diffusion portion 44 in the first row is started. At the same time, φS in the first row is set low, the selection transistor 50 in the first row is turned off, and the row selection in the first row is completed.

  Next, the process proceeds to the selection operation period T24 of the second row through the horizontal blanking period. Since the same operation as the first line is repeated in the second and subsequent lines, the description thereof is omitted here. In this way, when signals are read from all rows, the imaging mode is terminated.

  Here, an example of the operation of the electronic camera 1 according to the present embodiment will be described with reference to FIGS. FIG. 14 is a schematic flowchart showing the operation of the electronic camera 1 according to the present embodiment.

  When the half-press operation of the release button of the operation unit 9a is performed (step S1), the microprocessor 9 in the electronic camera 1 drives the imaging control unit 4 in synchronization with the half-press operation. The imaging control unit 4 reads out an imaging signal for subject confirmation from all the pixels of the imaging pixels 20R, 20G, and 20B or a predetermined pixel by a known method that is predetermined for confirming the subject, and stores it in the memory 7. accumulate. At this time, when all the pixels are read out, for example, an operation similar to the operation shown in FIG. 13 is performed. Then, the image processing unit 13 recognizes the subject from the signal using an image recognition technique (step S2). For example, in the face recognition mode, a face is recognized as a subject. At this time, the image processing unit 13 obtains the position and shape of the subject.

  Thereafter, the microprocessor 9 should be used for focus detection, which is optimal for accurately detecting the focus adjustment state for the subject from the focus detection regions 32 to 37 according to the position and shape of the subject obtained in step 2. A focus detection area corresponding to the autofocus line sensor is set (step S3). Further, the microprocessor 9 sets shooting conditions (aperture, focus adjustment state, shutter time, etc.) for focus detection based on the recognition result in step S2 (step S4).

  Subsequently, the microprocessor 9 operates the lens control unit 2a so as to satisfy the conditions such as the diaphragm set in step S4, and the focus detection region set in step S3 under the conditions such as the shutter time set in step S4. By driving the imaging control unit 4 according to the coordinates of the pixel row of the AF pixel 20V or 20H, the focus detection signal is read out and stored in the memory 7 (step S5). At this time, the focus detection signal is read out by the same operation as that shown in FIG.

  Next, the microprocessor 9 picks up a focus detection signal from the AF pixel 20V or 20H in the focus detection area set in step S3 from all the pixel signals acquired in step S5 and stored in the memory 7. Then, the focus detection calculation unit 10 is made to calculate the defocus amount by causing the focus detection calculation unit 10 to perform calculation (focus adjustment state detection processing) according to the pupil division phase difference method based on these signals ( Step S6).

  Next, the microprocessor 9 causes the lens control unit 2a to adjust the photographing lens 2 so as to be in focus according to the defocus amount calculated in step S6. Subsequently, the microprocessor 9 sets shooting conditions (aperture, shutter time, etc.) for the main shooting (step S8).

  Next, the microprocessor 9 operates the lens control unit 2a so as to satisfy the conditions such as the aperture set in step S8, and the shutter set in step S9 in synchronization with the full pressing operation of the release button of the operation unit 9a. By driving the imaging control unit 4 under conditions such as time, an image signal is read out and actual imaging is performed (step S9). At this time, the imaging signal is read out by the same operation as that shown in FIG. The imaging control unit 4 accumulates the imaging signal in the memory 7.

  Thereafter, the microprocessor 9 performs a desired process in the image processing unit 13 or the image compression unit 12 as necessary based on a command from the operation unit 9a, and outputs a processed signal to the recording unit to the recording medium 11a. Record.

  In the present embodiment, as described above, the gap 71 is formed between the semiconductor region forming the photodiode 42 and the semiconductor region forming the photodiode 43 in the AF pixel 20H. Therefore, electrons generated by photoelectric conversion of the photodiode 42 (electrons generated in the region of the P-type well 52 below the charge storage layer 53 of the photodiode 42) are directed toward the charge storage layer 53 of the photodiode 43. Even if it tries to move, the movement is blocked by the gap 71, and the electrons are not captured by the charge storage layer 53 of the photodiode 43. Similarly, electrons generated by photoelectric conversion of the photodiode 43 (electrons generated in the region of the P-type well 52 below the charge storage layer 53 of the photodiode 43) are transferred to the charge storage layer 53 of the photodiode 42. Even if the movement is attempted, the movement is blocked by the gap 71 and the electrons are not captured by the charge storage layer 53 of the photodiode 43. For this reason, according to the present embodiment, the crosstalk component due to the movement of electrons between the photodiodes 42 and 43 is reduced, and the separation of the electrical signals between the photodiodes 42 and 43 is enhanced. The same applies to the AF pixel 20V. Therefore, according to the present embodiment, focus detection accuracy is increased. A similar advantage can be obtained when an insulating material is embedded in the gap 71.

  Further, according to the present embodiment, the gaps 72 to 77 are formed with respect to the AF pixel 20H. In the gaps 72 to 77, air exists or is in a state close to a vacuum, but in any case, the refractive index in the gaps 72 to 77 is approximately 1.0. On the other hand, since the interlayer films 56 to 58 are, for example, silicon oxide films, the refractive index is relatively large. For this reason, the critical angle at the walls of the gaps 72 to 77 becomes small. Therefore, the wall portions of the gaps 72 to 77 act as total reflection surfaces with respect to most of the light entering the gaps 72 to 77 from the interlayer films 56 to 58. Therefore, in the AF pixel 20H, the light incident on the wall portions of the gaps 72 to 77 after passing through the microlens 66 is totally reflected by the wall portions, and does not become stray light or leakage light. 43 is incident. For this reason, the condensing efficiency to the photodiodes 42 and 43 increases. The same applies to the AF pixel 20V. Therefore, according to the present embodiment, it is possible to obtain a focus detection signal with a high S / N ratio, and from this point, it is possible to improve focus detection accuracy.

  Further, according to the present embodiment, since the gaps 81 to 84 are formed for the imaging pixels 20R, 20G, and 20B, the wall portions of the gaps 81 to 84 are all the same as the wall portions of the gaps 72 to 77. Acts as a reflective surface. Therefore, with respect to the imaging pixels 20R, 20G, and 20B, the light condensing efficiency to the photodiode 41 is increased, whereby a high-quality image can be obtained.

  Note that the present embodiment may be modified as follows. That is, the gaps 72 to 77 are not necessarily formed in the AF pixels 20H and 20V, and the gaps 81 to 84 are not necessarily formed in the imaging pixels 20R, 20G, and 20B. In this case, it is impossible to improve the light condensing rate to the photodiodes 42 and 43 of the AF pixels 20H and 20V and to improve the light condensing rate to the photodiode 41 of the imaging pixels 20R, 20G and 20B. The gap 71 can enhance the separation of electrical signals between the photodiodes 42 and 43.

  [Second Embodiment]

  FIG. 15 is a schematic cross-sectional view schematically showing the main part of the AF pixel 20H of the solid-state imaging device of the electronic camera according to the second embodiment of the present invention, and corresponds to FIG. 15, elements that are the same as or correspond to those in FIG. 9 are given the same reference numerals, and redundant descriptions thereof are omitted.

  The difference between the present embodiment and the first embodiment is that in the first embodiment, in the AF pixel 20H, two gaps 71a and 71b arranged in parallel are replaced by one gap 71. It is only a point formed along the dividing line BB ′ (see FIG. 8) in a plan view viewed from the Z-axis direction. Also in this embodiment, the same advantages as those in the first embodiment can be obtained.

  [Third Embodiment]

  FIG. 16 is a schematic plan view schematically showing the main part of the AF pixel 20H of the solid-state imaging device of the electronic camera according to the third embodiment of the present invention, and corresponds to FIG. FIG. 17 is a schematic cross-sectional view taken along line D-D ′ in FIG. 16 and corresponds to FIG. 9. FIG. 18 is a schematic plan view schematically showing main parts of the imaging pixels 20R, 20G, and 20B of the solid-state imaging device of the electronic camera according to the third embodiment of the present invention, and corresponds to FIG. . FIG. 19 is a schematic cross-sectional view taken along line E-E ′ in FIG. 18 and corresponds to FIG. 11.

  16 to 19, the same or corresponding elements as those in FIGS. 8 to 11 are denoted by the same reference numerals, and redundant description thereof is omitted. The present embodiment is different from the first embodiment only in the points described below.

  In the present embodiment, as shown in FIGS. 16 and 17, in the AF pixel 20 </ b> H, a gap 91 is also formed in the interlayer films 56 to 58. The gap 91 is formed along the parting line B-B ′ in a plan view viewed from the Z-axis direction. The same applies to the AF pixel 20V.

  In the first embodiment, as shown in FIG. 9, the microlens 66 is configured so that the exit pupil of the photographing lens 2 in FIG. 1 is positioned at a height position near the photodiodes 42 and 43 (Z-axis direction). In this embodiment, as shown in FIG. 17, the microlens 66 is configured so that the exit pupil of the photographic lens 2 is positioned at the upper end (+ Z side end) of the gap 91. Is formed at a height position (position in the Z-axis direction) (that is, near the upper surface of the interlayer film 58). The same applies to the AF pixel 20V.

  Furthermore, in the present embodiment, as shown in FIG. 19, the microlens 66 of the imaging pixels 20R, 20G, and 20B is also designed to have the same imaging characteristics as the microlens 66 of the AF pixels 20H and 20V. ing.

  In the present embodiment, as in the case of the gaps 72 to 77, both wall portions of the gap 91 act as total reflection surfaces. Therefore, according to the present embodiment, in the AF pixel 20H, the total reflection action of both wall portions of the gap 91 causes the exit from the one side of the exit pupil of the photographing lens 2 as compared with the first embodiment. It is reduced that the photodiode 42 that should receive only light receives light from the other side of the exit pupil, and similarly, only light from the other side of the exit pupil of the photographing lens 2 should be received. The photodiode 43 is reduced from receiving light from one side of the exit pupil. Therefore, according to the present embodiment, the separation of the optical signal between the photodiodes 42 and 43 is enhanced in the AF pixel 20H. The same applies to the AF pixel 20V. Therefore, according to the present embodiment, the focus detection accuracy is further increased.

  In the present embodiment, as in the first embodiment, the advantage that the separation of electric signals between the photodiodes 42 and 43 is increased by the gap 71, and the photodiodes 42, 77 by the gaps 72 to 77 are increased. The advantage that the light collection efficiency to 43 is increased is obtained.

  Note that the present embodiment may be modified as follows. That is, the gaps 72 to 77 are not necessarily formed in the AF pixels 20H and 20V, and the gaps 81 to 84 are not necessarily formed in the imaging pixels 20R, 20G, and 20B. In this case, it is impossible to improve the light condensing rate to the photodiodes 42 and 43 of the AF pixels 20H and 20V and to improve the light condensing rate to the photodiode 41 of the imaging pixels 20R, 20G and 20B. The separation of electrical signals between the photodiodes 42 and 43 can be enhanced by the gap 71, and the separation of optical signals between the photodiodes 42 and 43 can be enhanced by the gap 91.

  [Fourth Embodiment]

  FIG. 20 is a schematic cross-sectional view schematically showing the main part of the AF pixel 20H of the solid-state imaging device of the electronic camera according to the fourth embodiment of the present invention, and corresponds to FIG. 20, elements that are the same as or correspond to those in FIG. 17 are given the same reference numerals, and redundant descriptions thereof are omitted.

  This embodiment differs from the third embodiment only in that no gap 71 is formed between the semiconductor region of the photodiode 42 and the semiconductor region of the photodiode 43 in the AF pixel 20H. is there. According to the present embodiment, since the gap 71 is not formed, it is not possible to enhance the separation of electric signals between the photodiodes 42 and 43, but the other advantages are the same as those of the third embodiment. Is obtained.

  Note that the present embodiment may be modified as follows. That is, the gaps 72 to 77 are not necessarily formed in the AF pixels 20H and 20V, and the gaps 81 to 84 are not necessarily formed in the imaging pixels 20R, 20G, and 20B. In this case, it is impossible to improve the light condensing rate to the photodiodes 42 and 43 of the AF pixels 20H and 20V and to improve the light condensing rate to the photodiode 41 of the imaging pixels 20R, 20G and 20B. The separation of the optical signal between the photodiodes 42 and 43 can be enhanced by the gap 91.

  As mentioned above, although each embodiment of this invention and those modifications were demonstrated, this invention is not limited to these.

  For example, in each of the embodiments described above, in the imaging mode, the signals from the AF pixels 20H and 20V are not used as imaging signals. However, the AF pixels 20H and 20V are also provided with color filters, and the imaging mode In FIG. 7, the transfer transistors 46 and 47 (see FIG. 7) are simultaneously turned on, so that both charges of the photodiodes 42 and 43 are transferred to the floating diffusion unit 44 at the same time. The added signal can be used as an imaging signal.

  Further, in each of the above-described embodiments, in the AF pixels 20H and 20V, the division direction of the two photodiodes 42 and 43 is vertical or horizontal, but the division direction may be 45 degrees obliquely or the like. .

It is a schematic block diagram which shows the electronic camera as an imaging device which concerns on the 1st Embodiment of this invention. It is a circuit diagram which shows schematic structure of the solid-state image sensor in FIG. It is a schematic plan view which shows typically the solid-state image sensor in FIG. FIG. 4 is a schematic enlarged view in which the vicinity of a predetermined focus detection region in FIG. 3 is enlarged. FIG. 4 is a schematic enlarged view in which the vicinity of another focus detection region in FIG. 3 is enlarged. It is a circuit diagram which shows the pixel for an imaging of the solid-state image sensor in FIG. It is a circuit diagram which shows the pixel for AF of the solid-state image sensor in FIG. FIG. 2 is a schematic plan view schematically showing a main part of an AF pixel of the solid-state imaging device in FIG. 1. It is a schematic sectional drawing in alignment with the A-A 'line in FIG. It is a schematic plan view which shows typically the principal part of the pixel for imaging of the solid-state image sensor in FIG. It is a schematic sectional drawing in alignment with the C-C 'line in FIG. It is a timing chart which shows the drive procedure of the solid-state image sensor in FIG. 1 at the time of focus detection mode. It is a timing chart which shows the drive procedure of the solid-state image sensor in FIG. 1 at the time of imaging mode. It is a schematic flowchart which shows operation | movement of the electronic camera by 1st Embodiment. It is a schematic sectional drawing which shows typically the principal part of the pixel for AF of the solid-state image sensor of the electronic camera by the 2nd Embodiment of this invention. It is a schematic plan view which shows typically the principal part of the pixel for AF of the solid-state image sensor of the electronic camera by the 3rd Embodiment of this invention. It is a schematic sectional drawing in alignment with the D-D 'line in FIG. It is a schematic plan view which shows typically the principal part of the imaging pixel of the solid-state image sensor of the electronic camera by the 3rd Embodiment of this invention. It is a schematic sectional drawing in alignment with the E-E 'line in FIG. It is a schematic sectional drawing which shows typically the principal part of the pixel for AF of the solid-state image sensor of the electronic camera by the 4th Embodiment of this invention.

Explanation of symbols

1 Electronic camera 3
20 pixels 20V, 20H Focus detection pixels (AF pixels)
20R, 20G, 20B Imaging pixels 42, 43 Photodiode 51 Substrate 56-58 Interlayer film 71-77, 81-84, 91 Gap

Claims (10)

A plurality of pixels arranged two-dimensionally on a substrate;
At least some of the plurality of pixels are respectively present in one region and the other region divided by the dividing line in a plan view as viewed from the normal direction of the substrate, and each of them has incident light. Having a first photoelectric conversion unit and a second photoelectric conversion unit for photoelectric conversion;
A solid-state imaging device, wherein a gap is formed in the interlayer film formed on the substrate along the dividing line in the plan view. The at least some pixels are provided with microlenses,
2. The microlens forms an image of an exit pupil of an optical system that forms a subject image on the solid-state image sensor at a height position near an end portion on a light incident side in the gap. Solid-state image sensor.   In the interlayer film formed on the substrate, the gap is formed in the dividing line so as to surround the effective light receiving regions of the first and second photoelectric conversion units of the at least some pixels, respectively, in the plan view. The solid-state imaging device according to claim 1, wherein the solid-state imaging device is formed in a portion other than the portion along the line.   The gap is formed between the semiconductor region constituting the first photoelectric conversion unit and the semiconductor region constituting the second photoelectric conversion unit in the at least some pixels. The solid-state imaging device according to any one of 1 to 3.   In at least some of the pixels, a separation portion made of an insulating material is formed between a semiconductor region constituting the first photoelectric conversion portion and a semiconductor region constituting the second photoelectric conversion portion. The solid-state image sensor according to any one of claims 1 to 3, wherein A plurality of pixels arranged two-dimensionally on a substrate;
At least some of the plurality of pixels are respectively present in one region and the other region divided by the dividing line in a plan view as viewed from the normal direction of the substrate, and each of them has incident light. Having a first photoelectric conversion unit and a second photoelectric conversion unit for photoelectric conversion;
A solid-state imaging, wherein a gap is formed between a semiconductor region forming the first photoelectric conversion unit and a semiconductor region forming the second photoelectric conversion unit in at least some of the pixels. element. A plurality of pixels arranged two-dimensionally on a substrate;
At least some of the plurality of pixels are respectively present in one region and the other region divided by the dividing line in a plan view as viewed from the normal direction of the substrate, and each of them has incident light. Having a first photoelectric conversion unit and a second photoelectric conversion unit for photoelectric conversion;
In at least some of the pixels, a separation portion made of an insulating material is formed between a semiconductor region constituting the first photoelectric conversion portion and a semiconductor region constituting the second photoelectric conversion portion. A solid-state imaging device. The at least some pixels are provided with microlenses,
The microlens forms an image of an exit pupil of an optical system that forms a subject image on the solid-state imaging device at a height position near the first and second photoelectric conversion units. The solid-state image sensor according to 6 or 7.   The interlayer film formed on the substrate has a gap between the first and second of the at least some pixels except for a portion along the dividing line of the at least some pixels in the plan view. The solid-state imaging device according to claim 6, wherein the solid-state imaging device is formed so as to surround each of the effective light receiving regions of the photoelectric conversion unit. A solid-state imaging device according to any one of claims 1 to 9,
An optical system for forming a subject image on the solid-state imaging device;
A detection processing unit that outputs a detection signal indicating a focus adjustment state of the optical system based on a signal from the first photoelectric conversion unit and a signal from the second photoelectric conversion unit of at least some of the pixels; ,
An adjusting unit that adjusts the focus of the optical system based on the detection signal from the detection processing unit;
An imaging apparatus comprising:

Images