JP2007227608A - Semiconductor device and method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To stably seal a semiconductor chip while reducing the warpage of a package. <P>SOLUTION: A first resin 8 is arranged on a carrier substrate 1 inside a semiconductor chip 5 and the semiconductor chip 5 is facedown-mounted on the carrier substrate 1, thereby fixing the semiconductor chip 5 on the carrier substrate 1 with the first resin 8. Then, a second resin 9 is injected into the vicinity of the first resin 8 below the facedown-mounted semiconductor chip 5, thereby filling the second resin 9 into the vicinity of the first resin 8 below the semiconductor chip 5. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device, and is particularly suitable for application to a method for reducing warpage of a semiconductor package.

In a conventional semiconductor device, there is a method in which a resin called an under-chip filler is filled between a semiconductor chip and a substrate in order to seal the surface of a semiconductor chip face-down mounted on the substrate via a bump electrode.
Further, for example, in Patent Document 1, in order to improve connection reliability between a semiconductor device and a circuit board, a protruding electrode of the semiconductor device and an electrode pad of the circuit board are connected via a conductive paste, and the semiconductor device A method of disposing a first resin in the central portion and a second resin in the peripheral portion is disclosed between the circuit board and the circuit board.
JP-A-10-270833

However, in the conventional method of manufacturing a semiconductor device, if a resin having a strong adhesive force is used so that the semiconductor chip can be stably sealed on the substrate, the curing shrinkage of the resin increases and the package warps. There is a problem that the semiconductor chip is generated or a crack of the semiconductor chip due to thermal stress occurs.
Accordingly, an object of the present invention is to provide a semiconductor device and a semiconductor device manufacturing method capable of stably sealing a semiconductor chip while reducing warpage of the package.

  In order to solve the above-described problem, according to a semiconductor device of one embodiment of the present invention, a semiconductor chip on which an electrode pad is formed and the semiconductor chip faced through a protruding electrode disposed on the electrode pad. A carrier substrate mounted down, a first resin filled between the semiconductor chip and the carrier substrate without protruding from the semiconductor chip, and filled around the first resin, the first resin And a second resin having a smaller linear expansion coefficient than that of the resin.

  Accordingly, the semiconductor chip can be stably fixed on the carrier substrate, and the semiconductor chip can be sealed while reducing the difference in thermal expansion coefficient between the carrier substrate and the resin. For this reason, it is possible to suppress the warpage of the package, to prevent the package from being hindered, and to prevent the semiconductor chip from being cracked due to thermal stress. Can be made thinner.

  In addition, according to the semiconductor device of one aspect of the present invention, a semiconductor chip on which an electrode pad is formed, a carrier substrate on which the semiconductor chip is mounted face-down via a protruding electrode disposed on the electrode pad, The first resin filled between the semiconductor chip and the carrier substrate without protruding from the semiconductor chip, and filled around the first resin, having a viscosity smaller than that of the first resin. And a second resin.

  As a result, the semiconductor chip can be stably fixed on the carrier substrate, and the resin can easily enter between the semiconductor chip and the carrier substrate, so that the semiconductor chip can be stably sealed. It becomes. Therefore, it is possible to select a resin having a small difference in thermal expansion coefficient from the carrier substrate, it is possible to suppress package warpage, and prevent cracks in the semiconductor chip due to thermal stress. Thus, the semiconductor chip can be thinned.

In the semiconductor device according to one embodiment of the present invention, the protruding electrodes are arranged so that the arrangement pitch is equal, and the interval between the first resin and the protruding electrode is equal.
Accordingly, the second resin can be uniformly filled between the semiconductor chip and the carrier substrate, and the sealing performance of the semiconductor chip can be improved.

Further, according to the semiconductor device of one aspect of the present invention, the protruding electrodes are arranged so as to have portions having different arrangement pitches, and the smaller the arrangement pitch, the more the interval between the first resin and the protruding electrodes is It is characterized by being narrow.
Thereby, the smaller the arrangement pitch of the protruding electrodes, the closer the first resin can be to the end of the semiconductor chip, and the less the distance required to inject the second resin under the semiconductor chip. Therefore, even when the arrangement pitch of the protruding electrodes is different, the sealing performance of the semiconductor chip can be ensured.

Further, according to the semiconductor device of one aspect of the present invention, the first resin is disposed around the central portion of the semiconductor chip along the inside of the protruding electrode, and extends from the end of the semiconductor chip. A gap leading to the central portion of the semiconductor chip is provided.
Thereby, even when the first resin is arranged around the central portion of the semiconductor chip, the second resin can be inserted into the central portion of the semiconductor chip, and the warpage of the package can be suppressed while suppressing the warpage of the package. Sealability can be improved.

According to the method for manufacturing a semiconductor device of one embodiment of the present invention, the step of disposing the first resin on the carrier substrate inside the semiconductor chip to be face-down mounted, and the first resin through the first resin Mounting the semiconductor chip face down on the carrier substrate, and filling a second resin having a smaller linear expansion coefficient than the first resin around the first resin under the semiconductor chip. It is characterized by providing.
As a result, it is possible to seal the semiconductor chip while reducing the difference in thermal expansion coefficient between the carrier substrate and the resin, it is possible to suppress the warpage of the package, and the semiconductor chip caused by thermal stress. Cracks can be prevented.

According to the method for manufacturing a semiconductor device of one embodiment of the present invention, the step of disposing the first resin on the carrier substrate inside the semiconductor chip to be face-down mounted, and the first resin through the first resin Mounting the semiconductor chip facedown on the carrier substrate, and filling a second resin having a lower viscosity than the first resin around the first resin under the semiconductor chip. It is characterized by.
This makes it possible to select a resin having a small difference in thermal expansion coefficient with the carrier substrate, to suppress package warpage, and to prevent cracking of the semiconductor chip due to thermal stress. Can do.

Hereinafter, a semiconductor device and a manufacturing method thereof according to embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a cross-sectional view showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.
In FIG. 1A, lands 3 are formed on the surface of the carrier substrate 1, lands 2 are formed on the back surface of the carrier substrate 1, and internal wiring 4 is formed in the carrier substrate 1. In addition, an electrode pad 6 is formed on the semiconductor chip 5, and a protruding electrode 7 is formed on the electrode pad 6. As the carrier substrate 1, for example, a double-sided substrate, a multilayer wiring substrate, a build-up substrate, a tape substrate, or a film substrate can be used. Examples of the material of the carrier substrate 1 include polyimide resin, glass epoxy resin, BT resin, aramid and epoxy composite, ceramic, or the like can be used. Further, as the protruding electrode 7, for example, an Au bump, a Cu bump or Ni bump covered with a solder material, a solder ball, or the like can be used.

  When the semiconductor chip 5 is face-down mounted on the carrier substrate 1, the first resin 8 is disposed on the carrier substrate 1 inside the semiconductor chip 5. In other words, when the semiconductor chip 5 is mounted on the carrier substrate 1, the first resin 8 is formed on the carrier substrate 1 inside the region (region overlapping the semiconductor chip 5) of the carrier substrate 1 where the semiconductor chip 5 is mounted. Place. Here, as the first resin 8, for example, a thermosetting resin such as an epoxy resin can be used. Moreover, as a method of disposing the first resin 8 on the carrier substrate 1, the film-like first resin 8 may be pasted on the carrier substrate 1, or the semi-solid first resin. 8 may be applied on the carrier substrate 1. Note that the first resin 8 may be provided on the semiconductor chip 5 side.

  Next, as shown in FIG. 1B, after positioning the semiconductor chip 5 and the carrier substrate 1, the semiconductor chip 5 is face-down mounted on the carrier substrate 1, thereby forming the first resin 8. The semiconductor chip 5 is fixed on the carrier substrate 1 and the protruding electrode 7 is bonded on the land 3. Note that when the protruding electrode 7 is bonded onto the land 3, for example, metal bonding such as solder bonding or alloy bonding may be used, such as ACF (Anisotropic Conductive Film) bonding, NCF (Nonconductive Film) bonding, ACP ( You may make it use press-contact joining, such as an Anisotropic Conductive Paste joining and NCP (Nonductive Paste) joining.

  Next, as shown in FIG. 1C, the second resin 9 is injected around the first resin 8 under the face-down mounted semiconductor chip 5, so that the first resin under the semiconductor chip 5 is injected. A second resin 9 is filled around the resin 8. As the second resin 9, a material having a smaller linear expansion coefficient than that of the first resin 8 may be used, or a material having a lower viscosity than that of the first resin 8 may be used. As the second resin 9, for example, a thermosetting resin such as an epoxy resin can be used.

Next, as illustrated in FIG. 1D, the protruding electrode 10 for mounting the carrier substrate 1 on the mother substrate is formed on the land 2 provided on the back surface of the carrier substrate 1. As the protruding electrode 10, for example, an Au bump, a Cu bump coated with a solder material, a Ni bump, a solder ball, or the like can be used.
As a result, the semiconductor chip 5 can be stably fixed on the carrier substrate 1 and the semiconductor chip 5 can be sealed while reducing the difference in thermal expansion coefficient between the carrier substrate 1 and the second resin 9. It becomes possible to do. For this reason, it is possible to suppress the warpage of the carrier substrate 1 on which the semiconductor chip 5 is mounted face down, and it is possible to prevent the mounting of the carrier substrate 1 from being hindered, and due to thermal stress. The crack of the semiconductor chip 5 can be prevented, and the semiconductor chip 5 can be thinned.

FIG. 2 is a plan view showing a method for arranging an adhesive layer according to an embodiment of the present invention.
In FIG. 2A, protruding electrodes 22 are formed on the semiconductor chip 21 along the four sides of the semiconductor chip 21. Here, the protruding electrodes 22 are arranged along the four sides so that the arrangement pitch (distance between adjacent protruding electrodes 22) is equal. In this case, the first resin 23 disposed on the inner side of the semiconductor chip 21 can be formed so that the distance from the protruding electrode 22 is equal. In this case, the distance between the first side of the semiconductor chip 21 and the side of the first resin 23 facing the first side is a1, and the second side orthogonal to the first side of the semiconductor chip 21 When the distance from the side of the first resin 23 facing the second side is b1, the first resin 23 may be formed so that a1 and b1 are equal.
Accordingly, the second resin can be uniformly filled between the semiconductor chip and the carrier substrate, and the sealing performance of the semiconductor chip can be improved.

  In FIG. 2B, the protruding electrode 32 is formed on the semiconductor chip 31 along two opposing sides of the semiconductor chip 31. Here, the protruding electrodes 32 are arranged along two sides so that the arrangement pitch is different from each other. In this case, the first resin 33 disposed on the inner side of the semiconductor chip 31 can be formed such that the interval between the protruding electrodes 32 is narrowed as the arrangement pitch is small. In this case, the distance between the first side of the semiconductor chip 32 and the side of the first resin 33 facing the first side where the arrangement pitch of the protruding electrodes 32 is the smallest is along a2 and the first side. The distance between the second side of the semiconductor chip 32 where the protruding electrodes 32 having a pitch wider than the pitch of the protruding electrodes 32 arranged side by side and the side of the first resin 33 facing the second side is b2, the second. The distance between the third side of the semiconductor chip 32 in which the protruding electrodes 32 having a pitch wider than the pitch of the protruding electrodes 32 arranged along the side of the first resin 33 face the third side Where c2 may be narrower than b2, and b2 may be narrower than C2.

  As a result, the smaller the arrangement pitch of the protruding electrodes 32, the closer the first resin 33 is to the end of the semiconductor chip 31, and the distance required to inject the second resin under the semiconductor chip 31 is reduced. Therefore, even when the arrangement pitch of the protruding electrodes 32 is different, the sealing performance of the semiconductor chip 31 can be ensured.

In FIG. 2C, the semiconductor chip 41 is provided with protruding electrodes 42 along the four sides of the semiconductor chip 41. Here, the first resin 43 is disposed around the central portion of the semiconductor chip 41 along the inside of the protruding electrode 42, and a gap 44 is provided from the end of the semiconductor chip 41 to the central portion of the semiconductor chip 41. ing.
Thereby, even when the first resin 43 is arranged around the central portion of the semiconductor chip 41, the second resin can be allowed to enter the central portion of the semiconductor chip 41, while suppressing warping of the package. The sealing performance of the semiconductor chip 41 can be improved.

2D, the semiconductor chip 51 has protruding electrodes 52 formed along the four sides of the semiconductor chip 51, respectively. Here, the first resin 53 is arranged around the center of the semiconductor chip 51 along the inside of the protruding electrode 52, and a gap 54 is provided from the end of the semiconductor chip 51 to the center of the semiconductor chip 51. ing. Further, the protruding electrode 52 is disposed not only on the outside of the first resin 53 but also on the inside of the first resin 53.
As a result, even when the first resin 53 is disposed around the central portion of the semiconductor chip 51, the second resin can be inserted into the central portion of the semiconductor chip 51, while suppressing warping of the package. The sealing performance of the semiconductor chip 51 can be improved and the arrangement density of the protruding electrodes 52 can be improved.

FIG. 3 is a view showing an example of physical properties of a resin according to an embodiment of the present invention.
3, for example, ACF can be used as the first resin 8 in FIG. 1, and an underchip filler can be used as the second resin 9 in FIG. In this case, the viscosity of the first resin 8 can be set to about several tens of thousands times the viscosity of the second resin 9, and the semiconductor chip 5 is stably fixed on the carrier substrate 1 with the first resin 8. In addition, the second resin 9 can easily enter between the semiconductor chip 5 and the carrier substrate 1, and the semiconductor chip 5 can be stably sealed.

Sectional drawing which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The top view which shows the arrangement | positioning method of the contact bonding layer which concerns on one Embodiment of this invention. The figure which shows the physical property example of resin which concerns on one Embodiment of this invention.

Explanation of symbols

  1 Carrier substrate, 2, 3 land, 4 Internal wiring, 5, 21, 31, 41, 51 Semiconductor chip, 6 Electrode pad, 7, 10, 22, 32, 42, 52 Protruding electrode, 8, 23, 33, 43 53 First resin, 9 Second resin

Claims (7)

A semiconductor chip on which electrode pads are formed;
A carrier substrate on which the semiconductor chip is mounted face down via protruding electrodes disposed on the electrode pads;
A first resin filled between the semiconductor chip and the carrier substrate without protruding from the semiconductor chip;
A semiconductor device comprising: a second resin filled around the first resin and having a smaller linear expansion coefficient than the first resin. A semiconductor chip on which electrode pads are formed;
A carrier substrate on which the semiconductor chip is mounted face down via protruding electrodes disposed on the electrode pads;
A first resin filled between the semiconductor chip and the carrier substrate without protruding from the semiconductor chip;
A semiconductor device comprising: a second resin filled around the first resin and having a viscosity lower than that of the first resin.   3. The semiconductor device according to claim 1, wherein the protruding electrodes are arranged to have an equal arrangement pitch, and a distance between the first resin and the protruding electrode is equal.   3. The semiconductor device according to claim 1, wherein the protruding electrodes are arranged so as to have portions having different arrangement pitches, and a distance between the first resin and the protruding electrodes is narrowed as the arrangement pitch is small. .   The first resin is disposed around the center of the semiconductor chip along the inside of the protruding electrode, and a gap is provided from the end of the semiconductor chip to the center of the semiconductor chip. The semiconductor device according to claim 1, wherein the semiconductor device is characterized in that: Placing a first resin on a carrier substrate inside a semiconductor chip to be face-down mounted;
Mounting the semiconductor chip face down on the carrier substrate via the first resin;
Filling the periphery of the first resin under the semiconductor chip with a second resin having a smaller linear expansion coefficient than that of the first resin. Placing a first resin on a carrier substrate inside a semiconductor chip to be face-down mounted;
Mounting the semiconductor chip face down on the carrier substrate via the first resin;
Filling the periphery of the first resin under the semiconductor chip with a second resin having a viscosity lower than that of the first resin.

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