JP2007208817A - Solid-state imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of area reduction and a data reading method thereof. <P>SOLUTION: A solid-state imaging apparatus is provided on a semiconductor substrate 1 and comprises a plurality of pixels including a photo-detection unit 2 for performing photoelectric conversion on incident light and a plurality of lenses 5 for converging incident light L1 onto the photo-detection unit 2, wherein each of the lenses 5 has a fixed curvature ratio on an incident plane of the incident light L1 and top-most vertices P1 on the incident plane of the lens 5 are located in a center C1 on bottom faces of the lenses 5 and at different positions in the direction horizontal to the bottom faces. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device. In particular, the present invention relates to a microlens that collects light incident on pixels in a solid-state imaging device.

  To reduce the size of an electronic camera, it is effective to reduce the size of the optical system by reducing the image area. For this reason, shrinkage of the pixel size of the CMOS sensor is required. Conventionally, in order to perform pixel size shrinking, attempts have been made to reduce the number of transistors per photodiode by sharing the transistors in the pixel with a plurality of photodiodes (see, for example, Patent Document 1).

  The conventional CMOS sensor includes a microlens that collects incident light and a photodiode that converts incident light collected by the microlens into electric charges. Usually, the cross-sectional shape of the microlens is bilaterally symmetric (see, for example, Patent Document 2). Therefore, the position of the focal point is located immediately below the apex of the microlens, that is, almost directly below the center of the bottom surface of the microlens.

However, with the above configuration, since the microlenses are arranged at equal intervals, the positions of the focal points are also equal. As a result, incident light is blocked by the gate of the MOS transistor adjacent to the photodiode, and the photosensitivity of the CMOS area sensor is lowered.
JP-A-10-150182 Japanese Patent Publication No. 60-59752

  The present invention provides a solid-state imaging device capable of suppressing a decrease in photosensitivity.

  A solid-state imaging device according to a first aspect of the present invention is provided on a semiconductor substrate and condenses the incident light on a plurality of pixels including a light detection unit that photoelectrically converts incident light and the light detection unit. A plurality of lenses, the lens having a constant curvature at the incident surface of the incident light, and the vertex of the incident surface of the lens is horizontal to the center of the bottom surface of the lens and the bottom surface In different directions.

  A solid-state imaging device according to a second aspect of the present invention is provided on a semiconductor substrate, includes a pixel including a light detection unit that photoelectrically converts incident light, and a light receiving surface on which the plurality of pixels are two-dimensionally arranged. A plurality of lenses that are provided on the light receiving surface and collect the incident light on the light detection unit, and each of the lenses has a constant curvature on the incident surface on which the incident light is incident. In addition, the curvature of the lens located at the center of the light receiving surface is larger than the curvature of the lens located at the periphery of the light receiving surface.

  ADVANTAGE OF THE INVENTION According to this invention, the solid-state imaging device which can suppress the fall of photosensitivity can be provided.

  Embodiments of the present invention will be described below with reference to the drawings. In the description, common parts are denoted by common reference symbols throughout the drawings.

  A solid-state imaging device according to a first embodiment of the present invention will be described with reference to FIGS. 1 and 2 are a cross-sectional view and a plan view of the solid-state imaging device according to the present embodiment, respectively, particularly showing the central portion of the image area of the solid-state imaging device. 1 corresponds to a cross-sectional view taken along line X1-X1 'in FIG.

  As shown in the figure, a plurality of photodiodes 2 are provided in the surface of the semiconductor substrate 1. The photodiode 2 is formed by introducing impurities having a conductivity type opposite to that of the semiconductor substrate 1 into the surface of the semiconductor substrate 1 by a method such as ion implantation. On the semiconductor substrate 1 between adjacent photodiodes 2, a gate electrode 3 is provided with a gate insulating film interposed. An insulating film 4 is provided on the semiconductor substrate 1 so as to cover the photodiode 2 and the gate electrode 3. Microlenses 5 are provided on the insulating film 4 so as to correspond to the respective photodiodes 2. In the above structure, a plurality of pixels are formed, each including one photodiode.

  The apex P1 of the microlens 5 according to the present embodiment is located at a distance d1 from one end of the microlens 5 and at a distance d2 (≠ d1) from the other end of the microlens 5. Accordingly, the position of the vertex P1 is different from the center C1 of the bottom surface in the horizontal direction with respect to the bottom surface of the microlens 5. In other words, the apex P1 of the microlens 5, that is, the focal point F1, exists at a position shifted by d3 from the perpendicular to the bottom surface including the center C1 of the bottom surface of the microlens 5 (see FIG. 2). In other words, as shown in FIG. 1, the microlens 5 has a left-right asymmetric cross-sectional shape. The vertex P1 is defined as the position where the film thickness is the largest in the microlens 5. The microlens 5 has a uniform curvature on the incident surface on which the incident light L1 is incident, and the curvature is set so that the focal point F1 is located on the surface of the photodiode 2.

  The apex P1 of the microlens 5 is positioned so as to face the gate electrode 3 across the center C1 of the microlens 5 in the direction in which the photodiode 2 and the gate electrode 3 are arranged. That is, the apex P1 of the microlens 5 is the farther of the end (one end) closer to the gate electrode 3 and the far end (the other end) in the direction in which the photodiode 2 and the gate electrode 3 are arranged. Is provided on the end side. That is, in FIG. 2, the apex P <b> 1 is provided so that P <b> 1, C <b> 1 and the gate electrode 3 are arranged in this order along the direction in which the photodiode 2 and the gate electrode 3 are arranged.

  In the above configuration. When the incident light L1 reaches the microlens 5, the incident light L1 is refracted according to Snell's law. The refracted incident light L1 forms an image on the photodiode 2 corresponding to each microlens 5. The photodiode 2 converts the incident light L1 into electric charge by photoelectric conversion.

According to the above configuration, the following effect (1) can be obtained.
(1) A decrease in light sensitivity of the solid-state imaging device can be suppressed (part 1).
With the configuration according to the present embodiment, the apex of the microlens is shifted from the center of the bottom surface in a direction horizontal to the bottom surface of the microlens that collects incident light on the photodiode. Accordingly, it is possible to suppress a decrease in light sensitivity of the solid-state imaging device. This effect will be described in detail below.

  FIG. 3 is a cross-sectional view of a conventional solid-state imaging device. As shown in the figure, a photodiode 102 is provided on the surface of a semiconductor substrate 101, and a gate electrode 103 is provided on the semiconductor substrate 101 between adjacent photodiodes 102. An insulating film 104 is provided on the semiconductor substrate 101 so as to cover the photodiode 102 and the gate electrode 103, and a microlens 105 is provided on the insulating film 104. The microlens 105 in the conventional configuration has a cross-sectional shape that is symmetrical with respect to the vertex P101. That is, the apex P101 of the microlens 105 is located at an equal distance from both ends of the microlens 105 in the direction in which the photodiode 102 and the gate electrode 103 are arranged. Accordingly, all of the vertex P101, the center C101 of the bottom surface, and the focal point F101 of the microlens 105 are located on a perpendicular line from the surface of the photodiode 102.

  Then, since the microlenses 105 are arranged at equal intervals, the positions of the focal points F101 are also equal. On the other hand, the photodiodes 102 are not arranged at regular intervals, the intervals are wide in the region sandwiching the gate electrode 103, and the intervals are narrow in the region not sandwiching the gate electrode. As a result, part of the incident light L101 collected by the microlens 105 is blocked by the gate electrode 103 (region A101 in FIG. 3). Therefore, there has been a problem that the photosensitivity of the solid-state imaging device is lowered.

  On the other hand, in the configuration according to the present embodiment, the apex P1 of the microlens 5 is in the horizontal direction with respect to the bottom surface of the microlens 5 (that is, in the horizontal direction with respect to the surface of the photodiode 2). 5 is at a position shifted from the center C1 of the bottom surface. Therefore, although the microlenses 5 are arranged at equal intervals, the focal positions of the microlenses 5 are not equally spaced. More specifically, as described with reference to FIG. 2, the apex P1 of the microlens 5 is in the direction in which the photodiode 2 and the gate electrode 3 are arranged, and the end (one end) closer to the gate electrode 3 and the far end. Of the end portions (the other end), it is provided on the far end side. Therefore, the focal position of the microlens 5 is far from the gate electrode 3 as compared with the conventional case. Therefore, the incident light L1 collected by the microlens 5 enters the photodiode 2 so as to avoid the corner portion (region A1 in FIG. 1) of the gate electrode 3. Moreover, even if it is obstructed, the amount is smaller than in the conventional case. As a result, more light is incident on the photodiode 2, and a decrease in light sensitivity of the solid-state imaging device can be suppressed.

  Next, a solid-state imaging device according to a second embodiment of the present invention will be described with reference to FIG. FIG. 4 is a cross-sectional view of the solid-state imaging device according to this embodiment. This embodiment relates to a case where a metal wiring layer is provided in the insulating film 4 in the first embodiment.

  As shown in the drawing, the solid-state imaging device according to the present embodiment further includes a plurality of metal wiring layers 6 provided in the insulating film 4 in the configuration of FIG. 1 described in the first embodiment. It is assumed that the metal wiring layer 6 is formed so as to extend in the direction perpendicular to the paper on which the drawing is illustrated. In FIG. 4, the gate electrode 3 is not shown. The apex P2 of the microlens 5 according to the present embodiment is located at a distance d4 from one end of the microlens 5 and at a distance d5 (> d4) from the other end of the microlens 5. 5 and FIG. 6 are enlarged views of one pixel in FIG. 4 and show a cross section and a planar structure, respectively, and FIG. 5 corresponds to a cross section along the line X2-X2 'in FIG.

  As shown in FIGS. 5 and 6, in the horizontal direction with respect to the bottom surface of the microlens 5, the apex P <b> 2 of the microlens 5, that is, the focal point F <b> 2 is from a perpendicular line V <b> 1 to the bottom surface of the microlens 5 including the center C <b> 2 of the bottom surface of the microlens 5. It exists at a position shifted by a distance d6. That is, as in the first embodiment, the microlens 5 has a left-right asymmetric cross-sectional shape. Of course, the microlens 5 has a uniform curvature on the incident surface on which the incident light L2 is incident.

  Further, when the distance between the perpendicular line V1 of the two metal wiring layers 6 located across the perpendicular line V1 is d7 and d8 (d7 <d8), the one metal wiring layer 6 close to the perpendicular line V1 is the wiring W1 and the distant metal wiring. The layer 6 will be referred to as a wiring W2. Then, the apex P2 of the micro lens 5 is positioned so as to face the wiring W1 with the perpendicular V1 interposed therebetween. In other words, the straight line V2 connecting the vertex P2 of the microlens 5 and the focal point F2 is located between the wiring W2 and the perpendicular line V1.

According to the above configuration, the following effect (2) can be obtained.
(2) A decrease in light sensitivity of the solid-state imaging device can be suppressed (part 2).
With the configuration according to the present embodiment, the apex P2 of the microlens 5 is shifted from the center C2 of the bottom surface of the microlens 5 in the horizontal direction with respect to the bottom surface of the microlens 5 as in the first embodiment. is there. Therefore, although the microlenses 5 are arranged at equal intervals, the focal positions of the microlenses 5 are not equally spaced. More specifically, as described with reference to FIGS. 5 and 6, the apex P2 of the microlens 5 in the horizontal direction with respect to the bottom surface of the microlens 5 is two metal wirings located across a perpendicular line V1 passing through the center of the pixel. The layer 6 is provided so as to be close to the wiring W2 far from the vertical line V1. Therefore, the focal position of the microlens 5 is far from the wiring W1 as compared with the conventional case. Therefore, the incident light L2 collected by the microlens 5 is incident on the photodiode 2 so as to avoid the metal wiring layer 6, particularly the corner of the wiring W1. Moreover, even if it is obstructed, the amount is smaller than in the conventional case. As a result, more light is incident on the photodiode 2, and a decrease in light sensitivity of the solid-state imaging device can be suppressed.

  That is, the incident light L2 is prevented from being blocked by the metal wiring layer 6 by the same action as in the first embodiment. However, the metal wiring layer 6 is usually at a level above the gate electrode described in the first embodiment, that is, at a position closer to the microlens 5. Therefore, the metal wiring layer 6 is easier to block the incident light L2 than the gate electrode. Therefore, using the microlens 5 according to the present embodiment is more effective than the case of the first embodiment.

  Next, a solid-state imaging device according to a third embodiment of the present invention will be described. In the present embodiment, the microlens 5 described in the first and second embodiments is applied to a solid-state imaging device in which two photodiodes share an amplification transistor. FIG. 7 is a block diagram of the solid-state imaging device.

As illustrated, the solid-state imaging device 10 includes a clamp circuit 11, a sample hold circuit 12, a vertical direction selection circuit 13, a horizontal direction selection circuit 14, and a light receiving unit 20.
The light receiving unit 20 includes a plurality of unit cells 21 that perform photoelectric conversion of incident light. In FIG. 7, only (2 × 3) unit cells 21 are shown, but the number is not particularly limited. The plurality of unit cells 21 are arranged in a matrix and commonly connected to the vertical signal line 22 for each column. The unit cells 21 in the same row are commonly connected to the same address signal line AD, reset signal line RS, and read signal lines RD1 and RD2. The address signal line AD, the reset signal line RS, and the read signal lines RD1 and RD2 are selected by the vertical direction selection circuit 13.

  The clamp circuit 11 is connected to one end of each vertical signal line 22 and clamps the signal read out to the vertical signal line 22. The other end of the vertical signal line 22 is connected to the ground potential via the load transistor 23.

  The sample hold circuit 12 samples and holds the signal clamped by the clamp circuit 11. The signal held by the sample hold circuit 12 is output to the output node OUT via the read transistor 24. The gate of the reading transistor 24 is controlled by the horizontal direction selection circuit 14.

  Next, the configuration of the unit cell 21 will be described with reference to FIG. FIG. 8 is a circuit diagram of one unit cell 21 in FIG. As illustrated, the unit cell 21 includes two pixels 25 and 25 and one signal output unit 27. Each of the pixels 25 includes a read transistor 28 and a photodiode 29. The gates of the two readout transistors 28 included in the same unit cell 21 are connected to the readout signal lines RD1 and RD2, respectively, and the drain is connected to the anode of the photodiode 29 in the corresponding pixel 25. The cathode of the photodiode 29 is grounded.

  The signal output unit 26 includes an amplification transistor 30, an address transistor 31, and a reset transistor 32. The amplification transistor 30 has a gate connected to the source of the transistor 28 in the two pixels 25, a source connected to the vertical signal line 22, and a drain connected to the source of the transistor 31. The address transistor 31 has a gate connected to the address signal line AD and a drain connected to the power supply potential VDD. The reset transistor 32 has a gate connected to the reset signal line RS, a source connected to the sources of the transistors 28 in the two pixels 25, and a drain connected to the power supply potential VDD. That is, one signal output unit 26 is shared by the two pixels 25.

  FIG. 9 is a plan view of the unit cell 21 shown in FIG. As shown in the drawing, two photodiodes 29 are arranged along the first direction. A transistor 28 is provided between the two photodiodes 29 so as to sandwich the signal output unit 26 along the first direction, and a gate 33 of the transistor 28 is formed along a second direction orthogonal to the first direction. In FIG. 9, the details of the signal output unit 26 are omitted.

  FIG. 10 is a cross-sectional view taken along the line X3-X3 'in FIG. The cross-sectional configuration is substantially the same as in the first embodiment. That is, as shown in the drawing, a plurality of photodiodes 29 are provided in the surface of the semiconductor substrate 40. On the semiconductor substrate 40 between adjacent photodiodes, the gate electrodes 33 of the two transistors 28 are provided with a gate insulating film interposed therebetween. Further, the source regions 41 of the two transistors 28 are provided in the semiconductor substrate 40 between the adjacent gate electrodes 33. In FIG. 10, the signal output unit 26 is not shown. An insulating film 42 is provided on the semiconductor substrate 40 so as to cover the photodiode 29 and the transistor 28. Microlenses 34 are provided on the insulating film 42 so as to correspond to the respective pixels 25. Accordingly, two microlenses 34 are included per unit cell 21.

  The microlens 34 included in the solid-state imaging device according to the present embodiment has the same relationship as that of the first embodiment between the apex P3 (focal point F3) and the center C3 of the bottom surface. That is, the apex P3 of the microlens 34, that is, the focal point F3, is located at a position shifted from the gate electrode 33 by d9 from the perpendicular line including the center C3 of the bottom surface of the microlens 34. In other words, as shown in FIG. 10, the microlens 34 has an asymmetric cross-sectional shape.

  Next, the operation of the solid-state imaging device having the above configuration will be briefly described. First, any unit cell 21 is selected in the light receiving unit 20. In this selection operation, the address transistor 31 in any unit cell 21 is turned on by the address signal AD output from the vertical direction selection circuit 13, and the load transistor 23 connected to any vertical signal line 22 is turned on. It is done by being in a state.

  In addition, a reset operation is performed in which the vertical signal line 22 is set to a constant reference potential. The reset operation is performed by turning on the reset transistor 32 in the selected unit pixel when the vertical direction selection circuit 13 asserts the reset signal RS. When the reset transistor 32 is turned on, VDD is supplied to the gate of the amplification transistor 30 through the current path of the transistor 32, and the transistor 30 is turned on. Then, since the address transistor 31 is in the on state, the vertical signal line 22 is set to a constant reference potential by a path reaching the vertical signal line 22 from the power supply potential VDD through the current paths of the transistors 31 and 30.

  Then, the vertical direction selection circuit 13 selects one of the read signal lines RD1 and RD2. Then, the read transistor 28 connected to one of the selected read signal lines RD1 and RD2 is turned on. Accordingly, in the pixel 25 in which the transistor 28 is turned on, the electric charge generated according to the incident light in the photodiode 29 reaches the gate of the amplification transistor 30 through the current path of the transistor 28. As a result, the potential of the vertical signal line 22 varies according to the result of photoelectric conversion in the photodiode 29. That is, an image signal is given to the vertical signal line 22 in accordance with the charge obtained by the photodiode 29. The image signal is read out to the output node OUT via the clamp circuit 11, the sample hold circuit 12, and the readout transistor 24.

  As described above, the solid-state imaging device according to this embodiment can achieve the effect (1) described in the first embodiment. This effect (1) is particularly remarkable when the signal output unit 26 is shared by a plurality of pixels as in the present embodiment. As shown in FIGS. 9 and 10, when the signal output unit 26 is shared by the two pixels 25, the transistor 28 and the signal output unit 26 are disposed between the two pixels 25. Accordingly, the shape of each pixel 25 is asymmetrical in the direction shown in FIG. 10 and is a pattern in which the gate electrode 33 is located on one end side of the pixel 25. Therefore, the position of the center of the pixel 25 (that is, the center of the microlens 5) is different from the position of the center of the photodiode 29, and incident light is likely to be blocked by the gate electrode 33.

  However, in the present embodiment, in the horizontal direction with respect to the bottom surface of the microlens 34 that collects incident light on the photodiode 29, the apex P3 of the microlens 34 is at a position shifted from the center C3 of the bottom surface. Therefore, it is possible to prevent the incident light from being blocked by the gate electrode, and to suppress a decrease in light sensitivity of the solid-state imaging device as described in the first embodiment.

  Next, a solid-state imaging device according to a fourth embodiment of the present invention will be described. In the third embodiment, one unit cell 21 includes four pixels 25 in the third embodiment, and the light receiving unit 20 includes RD3 and RD4 in addition to the read signal lines RD1 and RD2. Read signal lines RD1 to RD4 are selected by a vertical direction selection circuit. FIG. 11 is a circuit diagram of the unit cell 21 included in the solid-state imaging device according to this embodiment.

  As illustrated, the unit cell 21 includes four pixels 25-1 to 25-4 and one signal output unit 26. The configurations of the pixels 25-1 to 25-4 and the signal output unit 26 are as described in the third embodiment. The signal output unit 26 is shared by the four pixels 25-1 to 25-4. Therefore, the source of the readout transistor 28 included in each of the four pixels 25-1 to 25-4 is commonly connected to the gate of the amplification transistor 30 and the source of the reset transistor 32 in the signal output unit 26. The gates of the read transistors 28 included in the four pixels 25-1 to 25-4 are connected to the read signal lines RD1 to RD4, respectively. The read signal lines RD1 to RD4 are selected by the vertical direction selection circuit 13 similarly to the address signal line AD and the reset signal line RS. In the above configuration, the pixels 25-1 to 25-4 include color filters (not shown), and detect incident light of green (Gr), red (R), blue (B), and green (Gb), respectively.

  FIG. 12 is a plan view of four unit cells 21 according to the present embodiment, and FIG. 13 is a cross-sectional view taken along line X4-X4 'in FIG. As shown in the figure, four pixels 25-1 to 25-4 are arranged in a (2 × 2) matrix in one unit cell 21, and pixels 25-1 are arranged in odd columns in the light receiving unit 20. 25-3 are arranged, and pixels 25-2 and 25-4 are arranged in the even-numbered columns. In the same unit cell 21, the pixels 25-1 and 25-2 and the pixels 25-3 and 25-4 adjacent in the first direction are arranged so that the read transistors 28 are close to each other. The micro lens 34 described in the third embodiment is provided for each of the pixels 25-1 to 25-4. As described in the third embodiment, in the microlens 34, the straight line connecting the apex P3 and the focal point F3 is at a different position shifted from the center C3 of the bottom surface of the microlens 34 by the distance d9.

  In the solid-state imaging device having the above-described configuration, the photodiodes 29 of the pixels 25-1 and 25-3 in the odd columns and the photodiodes 29 of the pixels 25-2 and 25-4 in the even columns in the light receiving unit 20 In each of the pixels 25-1 to 25-4, it is arranged so as to be separated from the corresponding signal output unit 26. The apex P3 of the microlens 34 corresponding to each pixel is located so as to face the adjacent pixel along the first direction with the center C3 interposed therebetween. Accordingly, in the example of FIG. 12, the vertex P3 of the microlens 34 corresponding to each of the pixels 25-1 and 25-3 in the light receiving unit 20 is located on the right side of the center C3, and these are along the second direction. Located in the same column. Further, the apex P3 of the microlens 34 corresponding to each of the pixels 25-2 and 25-4 is located on the left side of the center C3, and these are located in the same column along the second direction.

  Even in the above-described solid-state imaging device, the effect (1) described in the first and third embodiments can be obtained.

  Next, a solid-state imaging device according to a fifth embodiment of the present invention will be described. In the present embodiment, the microlens 5 described in the first and second embodiments is applied to Japanese Patent Application No. 2005-118752. FIG. 14 is a plan view of a light receiving unit included in the solid-state imaging device.

  The solid-state imaging device according to the present embodiment is obtained by changing the position of the gate 33 of the read transistor 28 in the configuration of FIGS. 7 to 9 described in the third embodiment. FIG. 14 is a plan view of the light receiving unit 20 of the solid-state imaging device according to the present embodiment. As illustrated, in the light receiving unit 20, a plurality of pixels 25 are arranged in a matrix.

  As shown in the figure, the unit cell 21 has the same configuration as that of FIG. 9 described in the third embodiment, and includes two pixels 25 adjacent in the first direction. In the light receiving unit 20, the plurality of pixels 25 are arranged in a checkered pattern so that the unit cells 21 in the odd columns are shifted from the unit cells 21 in the even columns by one pixel. The signal output unit 26 in a certain unit cell 21 is arranged from between two pixels 25 in the unit cell 21 to between two unit cells 21 adjacent in the second direction.

  That is, in the pixel 25 adjacent to the pixel 25 in the odd direction in FIG. 14 and having the gate 33 below the photodiode 29 in the second direction, the gate 33 is above the photodiode 29. On the contrary, in the pixel 25 adjacent to the pixel 25 in the odd direction and having the gate 33 above the photodiode 29 in the second direction, the gate 33 is below the photodiode 29.

  Even in the configuration described above, the microlens 34 described in the third embodiment can be used. Then, since the gates 33 of the pixels 25 adjacent in the second direction are alternately arranged in the first direction across the center of the pixel 25, the position of the vertex P3 of the microlens 34, that is, the focal point F3 is also the second direction. In the first direction between the adjacent pixels 25. Even with the configuration according to the present embodiment, the effect (1) described in the first and third embodiments can be obtained.

  Next, a solid-state imaging device according to a sixth embodiment of the present invention will be described. In the present embodiment, the light sensitivity of the solid-state imaging device is improved by changing the curvature of the microlens according to the position in the light receiving unit.

  The configuration of the solid-state imaging device is as shown in FIG. 7 described in the first embodiment. FIG. 15 is a diagram showing a cross-sectional configuration of the light receiving unit 20 and the curvature of the microlens. As shown in the drawing, a microlens 43 is provided for each pixel above the photodiode 29 with an insulating film 42 interposed therebetween. The curvature of the light incident surface in each microlens 43 is constant for each microlens 43. In addition, the curvature of each microlens 43 is highest at the center of the light receiving unit 20 and decreases toward the end. In FIG. 15, the gate electrode 33 is not shown for simplification of the drawing.

With this configuration, the following effect (3) can be obtained.
(3) A decrease in light sensitivity of the solid-state imaging device can be suppressed (part 3).
With the configuration according to the present embodiment, incident light efficiently enters the photodiode 29 even at the end of the light receiving surface 20, so that it is possible to suppress a decrease in light sensitivity of the solid-state imaging device. Hereinafter, this effect will be described using FIG. 16 while comparing with the case where the curvature of the microlens 43 is constant at the center and the end of the light receiving surface. FIG. 16 is a cross-sectional view of the light receiving unit 20.

  As shown in the figure, the microlens 105 has the same curvature in the entire region within the light receiving unit 20. Accordingly, the focal length of the microlens 43 (the distance from the surface of the microlens 43 to the focal point F101) is the same at the center and the end of the light receiving unit. Incident light is incident on the microlens 105 perpendicularly at the center of the light receiving unit, but is incident obliquely on the microlens 105 at the end. Then, for example, when the focal length of the microlens 105 is designed to form an image on the surface of the photodiode 102 at the center of the light receiving unit, the focal point F101 increases from the surface of the photodiode 102 as the distance from the center of the light receiving unit increases. Leave. As a result, part of the incident light does not enter the photodiode 102, causing a decrease in light sensitivity of the solid-state imaging device.

  On the other hand, in this embodiment, as shown in FIG. 15, the curvature of the microlens 43 is reduced as the distance from the center of the light receiving unit 20 increases. In other words, the focal length of the microlens 43 (the distance from the microlens 43 to the focal point F4) increases as the distance from the center of the light receiving unit 20 increases. Therefore, the focal point F <b> 4 of the microlens 43 is located on the surface of the photodiode 29 also at the end of the light receiving unit 20. Therefore, since the incident light efficiently enters the photodiode 29, the light sensitivity of the solid-state imaging device can be improved.

  Next, a solid-state imaging device according to a seventh embodiment of the present invention will be described. The present embodiment is a combination of the first to fifth embodiments and the sixth embodiment. FIG. 17 is a cross-sectional view of a partial region of the light receiving unit 20 of the solid-state imaging device. Also in FIG. 17, illustration of a part of gate electrode 33 and the metal wiring layer 6 is abbreviate | omitted for simplification of drawing.

  As shown in the figure, the microlens 44 included in the solid-state imaging device according to the present embodiment has a certain curvature for each microlens 44 and the curvature decreases from the center to the end of the light receiving unit 20. . As described in the first to fifth embodiments, the vertex P5 of the microlens 44 and the center C5 of the bottom surface are at different positions in the horizontal direction.

  With the configuration according to this embodiment, the effects (1) and (2) described in the first to third embodiments and the effect (3) described in the sixth embodiment are obtained together. It is done.

  As described above, according to the solid-state imaging device according to the first to fifth embodiments of the present invention, the microlens that collects the incident light on the photodiode has a constant curvature of the incident surface, and The apex is at a position shifted from the center of the bottom surface in the horizontal direction of the microlens. Therefore, the microlens has a focal point at a position shifted from the center of the pixel. Therefore, it is possible to prevent the incident light from being blocked by the gate electrode or the like, and it is possible to suppress a decrease in light sensitivity of the solid-state imaging device.

  Further, according to the solid-state imaging devices according to the sixth and seventh embodiments, the curvature of the microlens is large at the center of the light receiving unit and small at the end. As a result, the light is efficiently incident on the photodiode even at the end of the light receiving portion where the light is obliquely incident on the microlens. Therefore, it is possible to suppress a decrease in light sensitivity of the solid-state imaging device.

  In the first to seventh embodiments, the phrase “curvature” has the following error, for example. FIG. 18 is a cross-sectional view of the microlens, showing how incident light is collected. First, if the microlens 50 is symmetrical (curvature R) with respect to the optical axis OP1 (CASE1), the left and right focal lengths of the microlens 50 are both f. Therefore, assuming an ideal optical system, the light beams emitted from the microlens 50 to the photodiode 51 intersect at one point. This point is the focal point F6.

  However, it is assumed that the microlens is asymmetrical with respect to the optical axis OP1, the left curvature is R, the focal length is f, the right curvature is R ′, and the focal length is f ′ with respect to the optical axis OP1 (CASE2). ). Then, the light beams collected by the microlens 52 do not intersect at one point. Therefore, the light beam has a width x at a portion where the light collected on the rightmost side of the microlens 52 and the light collected on the leftmost side intersect. This width x is expressed by the following equation.

x = a · | f−f ′ | / (f + f ′)
Where a is the radius of the microlens 52. Considering that light is electromagnetic waves, light has a spread of about the wavelength in the first place. Therefore, if this width x is about the wavelength λ, it is considered that there is no practical problem. In particular, in the case of a visible light sensor, if x is smaller than 555 nm, which has the highest human visibility, the influence of the curvature of the microlens 50 on the left and right is small. That is,
x = a · | f−f ′ | / (f + f ′) <λ (= 555 nm)
It is desirable to satisfy. Of course, λ can be appropriately selected depending on the solid-state imaging device. The relational expression between the radius of curvature of the microlens 52 and the focal point is expressed by the following expression.

(1 / f) = (nL-1) / R
Here, nL is the refractive index of the microlens 52. Therefore, the following equation is derived.

x = a · | R−R ′ | / (R + R ′) <λ (= 555 nm)
The above range corresponds to “curvature constant” in the above embodiment.

  The microlens may be a cylindrical lens 5 as shown in FIG. Furthermore, the microlens according to the above embodiment can be manufactured using the photomask shown in FIG. FIG. 20 shows a plan view and transmittance of the photomask. In the figure, the shaded area is an area that blocks light, and the white area is an area that transmits light. As shown in the figure, the transmittance of the photomask 60 is designed to be high at both ends and lowest at a portion shifted from the center by a certain width. A method for manufacturing a microlens using the photomask 60 will be described with reference to FIGS. 21 and 22 are cross-sectional views sequentially showing the manufacturing process of the microlens according to the present embodiment.

  First, as shown in FIG. 21, a photoresist 62 is applied on the insulating film 61. Then, the photoresist 62 is exposed by a photolithography technique using the photomask 60. As a result, the photoresist 62 is largely removed in a portion corresponding to a region having a high transmittance in the photomask 60 and hardly removed in a portion corresponding to a region having a low transmittance. That is, as shown in FIG. 22, the surface of the photoresist 62 is processed into a spherical shape having a vertex in the center of the photomask 60, that is, in a region shifted by a certain width from the center of the resist 62. This spherical resist 62 is used as the microlens described in the above embodiment.

  The third to seventh embodiments can be applied to the case where the metal wiring layer and the gate are provided as in the second embodiment, or the case where the metal wiring layer is provided but the gate is not provided. In the case of having a metal wiring layer and a gate, the metal wiring layer is usually provided in an upper layer than the gate, so that incident light is more easily blocked. Therefore, it is desirable that the curvature of the microlens is designed in consideration of the metal wiring layer rather than the gate.

  Note that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the invention in the implementation stage. Furthermore, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. For example, even if some constituent requirements are deleted from all the constituent requirements shown in the embodiment, the problem described in the column of the problem to be solved by the invention can be solved, and the effect described in the column of the effect of the invention Can be extracted as an invention.

1 is a cross-sectional view of a solid-state imaging device according to a first embodiment of the present invention. 1 is a plan view of a solid-state imaging device according to a first embodiment of the present invention. Sectional drawing of the conventional solid-state imaging device. Sectional drawing of the solid-state imaging device which concerns on 2nd Embodiment of this invention. The enlarged view of the partial area | region in FIG. The top view of the solid-state imaging device which concerns on 2nd Embodiment of this invention. The block diagram of the solid-state imaging device which concerns on 3rd Embodiment of this invention. The circuit diagram of the unit cell with which the solid-state imaging device which concerns on 3rd Embodiment of this invention is provided. The top view of the unit cell with which the solid-state imaging device which concerns on 3rd Embodiment of this invention is provided. Sectional drawing along the X3-X3 'line | wire in FIG. The circuit diagram of the unit cell with which the solid-state imaging device which concerns on 4th Embodiment of this invention is provided. The top view of the light-receiving part with which the solid-state imaging device which concerns on 4th Embodiment of this invention is provided. FIG. 13 is a cross-sectional view taken along line X4-X4 ′ in FIG. 12. The top view of the light-receiving part with which the solid-state imaging device which concerns on 5th Embodiment of this invention is provided. Sectional drawing of the light-receiving part with which the solid-state imaging device which concerns on 6th Embodiment of this invention is provided. Sectional drawing of the conventional solid-state imaging device. Sectional drawing of the light-receiving part with which the solid-state imaging device which concerns on 7th Embodiment of this invention is provided. Sectional drawing of the partial area | region of the solid-state imaging device which concerns on the 1st thru | or 7th Embodiment of this invention, and the conventional solid-state imaging device. The perspective view of the solid-state imaging device concerning the modification of the 1st thru | or 7th embodiment of this invention. The top view of the photomask used for preparation of the micro lens with which the solid-state imaging device concerning the 1st thru | or 5th, 7th embodiment of this invention is provided. Sectional drawing of the 1st manufacturing method of the micro lens with which the solid-state imaging device which concerns on 1st thru | or 5th, 7th embodiment of this invention is provided. Sectional drawing of the 2nd manufacturing method of the micro lens with which the solid-state imaging device which concerns on 1st thru | or 5th, 7th embodiment of this invention is provided.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1, 40, 101 ... Semiconductor substrate 2, 51, 102 ... Photodiode 3, 33, 103 ... Gate electrode 4, 42, 104 ... Insulating film 5, 34, 43, 44, 50, 52, 105 ... Microlens, 6 ... Metal wiring layer, 10 ... Solid-state imaging device, 11 ... Clamp circuit, 12 ... Sample hold circuit, 13 ... Vertical direction selection circuit, 14 ... Horizontal direction selection circuit, 20 ... Light receiving unit, 21 ... Unit cell, 22 ... Vertical signal lines, 23, 24, 28, 30 to 32 ... MOS transistors, 25, 25-1 to 25-4 ... Pixels, 26 ... Signal output section, 29 ... Diode, 60 ... Photomask, 61 ... Resin layer 62 ... Photoresist

Claims (5)

A plurality of pixels provided on a semiconductor substrate and including a light detection unit that photoelectrically converts incident light;
A plurality of lenses for condensing the incident light on the light detection unit, the lens has a constant curvature at the incident surface of the incident light, and the vertex of the incident surface of the lens is the A solid-state imaging device, wherein the center of the bottom surface of the lens is different from the center of the lens in a direction horizontal to the bottom surface. The pixel further includes a switch element that is provided adjacent to the light detection unit and reads out electric charges obtained by photoelectrically converting the incident light in the light detection unit,
The adjacent pixels are arranged such that the switch elements are adjacent to each other,
The lens is provided for each pixel, and the apex of the lens is positioned so as to face the switch element across the center of the lens in a direction in which the light detection unit and the switch element are arranged. The solid-state imaging device according to claim 1. A plurality of metal wiring layers provided between the semiconductor substrate and the lens;
The lens is provided for each pixel, and the apex of the lens is the semiconductor substrate of the two metal wiring layers facing each other across a perpendicular to the surface of the semiconductor substrate including the center of the surface of the light detection unit. 2. The solid-state imaging device according to claim 1, wherein the solid-state imaging device is positioned so as to face one of the metal wiring layers close to the perpendicular with the perpendicular interposed therebetween in a direction horizontal to the surface. The curvature of the lens located in the central part of the light receiving surface in which the plurality of pixels are two-dimensionally arranged is larger than the curvature of the lens located in the peripheral part of the light receiving surface. 3. The solid-state imaging device according to any one of 3. A pixel provided on a semiconductor substrate and including a light detection unit that photoelectrically converts incident light;
A light receiving surface in which a plurality of the pixels are two-dimensionally arranged;
A plurality of lenses that are provided on the light receiving surface and collect the incident light on the light detection unit, and each of the lenses has a constant curvature on the incident surface on which the incident light is incident. The curvature of the lens located in the center of the light receiving surface is larger than the curvature of the lens located in the periphery of the light receiving surface.

Images