JP2007049730A - Receiving system, communication system, wireless lan system, control method of receiving system, control program of receiving system, and record medium - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a receiving system, for example, a wireless LAN system, which realizes a low power. <P>SOLUTION: The receiving system has a radio frequency wave signal processing portion 4 which translates to a signal of lower frequency a received radio frequency wave signal, a RSSI circuit 31 (a receiving strength detection portion) which detects a signal strength of the above radio frequency wave signal, an intermediate frequency signal processing portion 5 which translates to the signal of the low frequency further a signal from the above radio frequency wave signal processing portion 4, a digital demodulation portion 7 (a demodulation portion) which demodulates to the signal from this intermediate frequency signal processing portion 5, and a switching-on control circuit 52 for controlling a switching-on of each circuit (AGC circuit 22, IF mixer circuits 23a and 23b, LPF circuits 25a and 25b, and amplifier circuits 26a and 26b) of the intermediate frequency signal processing portion 5 belonging to an analog portion 10, on the basis of a detection result of the RSSI circuit 31. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to power saving of a receiving apparatus (for example, a wireless LAN terminal using a double heterodyne system or a direct conversion system).

  FIG. 6 is a block diagram showing a conventional configuration of a wireless LAN device intended to save power. As shown in the figure, the reception unit 202 of the conventional wireless LAN device 201 includes a wireless unit 225 that is an analog unit, a reception level determination unit 226 that is a digital unit, a power / clock control unit 227, and an A / D conversion section 228, despread demodulation section 229, amplitude detection section 230, synchronization integration section 231, synchronization detection section 232, and information demodulation section 233.

  The wireless unit 225 is configured by an analog circuit, extracts an intermediate frequency from an RF (radio frequency) signal included in the radio wave captured by the antenna 224 via an internal amplifier and filter, and extracts a necessary reception level. The reception level determination unit 226 determines the start of reception by amplifying and rectifying and smoothing the intermediate frequency signal, and comparing it with a predetermined level value by an internal comparator. The power / clock controller 227 controls the power and clock of each block. The A / D conversion unit 228 performs A / D conversion on the output of the wireless unit 225. The despread demodulator 229 demodulates the spread signal by despreading. The amplitude detector 230 obtains the amplitude value of the output of the despread demodulator 229. The synchronization integration unit 231 integrates the output of the amplitude detection unit 230 in symbol units. The synchronization detection unit 232 obtains a synchronization signal from the output of the synchronization integration unit 231. The information demodulator 233 performs information demodulation based on the output of the amplitude detector 230 and the synchronization signal output from the synchronization detector 232.

  The operation of the receiving unit 202 in the wireless LAN device 201 will be described below.

  During reception standby, only the radio unit 225 (analog unit), the reception level determination unit 226, and the power / clock control unit 227 operate. At the time of this reception standby, the power / clock control unit 227 transmits the operation clock to the A / D conversion unit 228, the despread demodulation unit 229, the amplitude detection unit 230, the synchronization integration unit 231, the synchronization detection unit 232, and the information demodulation unit 233. Therefore, the above units (A / D conversion unit 228, despread demodulation unit 229, amplitude detection unit 230, synchronization integration unit 231, synchronization detection unit 232, and information demodulation unit 233) are not operating. .

  Here, the reception level determination unit 226 amplifies the intermediate frequency signal from the radio unit 225, compares the intermediate frequency signal with a level value designated by the terminal device by an internal comparator, and the intermediate frequency signal. If is larger, it is regarded as reception start.

  In response to the start of reception, the power / clock controller 227 operates the A / D converter 228, the despread demodulator 229, the amplitude detector 230, the synchronization integrator 231, the synchronization detector 232, and the information demodulator 233. And operate these parts.

  In addition, after the end of reception, only the radio unit 225 and the reception level determination unit 226 that are analog units and the power source / clock control unit 227 again operate.

According to the above configuration, power consumption can be reduced in a wireless LAN device with a long reception standby time.
JP-A-8-307428 (publication date: November 22, 1996)

  However, in the conventional configuration described above, the digital unit (A / D conversion unit 228, despread demodulation unit 229, amplitude detection unit 230, synchronization integration unit 231, synchronization detection unit 232, and information demodulation unit 233) is activated during reception standby. Although it is stopped, the radio unit 225 which is an analog unit is operated. The wireless unit 225 includes various analog circuits, and consumes a considerable amount of power when all these circuits are operated. In particular, in a wireless LAN device mounted on a mobile terminal, this waste of power cannot be ignored.

  The present invention has been made in view of the above problems, and an object thereof is to provide a receiving device (for example, a wireless LAN device) that realizes power saving.

In order to solve the above problems, a receiving apparatus of the present invention includes a first signal processing unit that converts a received radio frequency signal into a lower frequency signal, and a reception intensity detection unit that detects the signal intensity of the radio frequency signal. When,
Based on the detection result of the second signal processing unit that performs processing for increasing the demodulation accuracy on the signal from the first signal processing unit, the demodulation unit that demodulates the signal from the second signal processing unit, and the reception intensity detection unit And an energization control unit that controls energization of each circuit of the second signal processing unit.

  According to the above configuration, the radio frequency signal received by the first signal processing unit is converted into a lower frequency signal (for example, a baseband signal) by the first signal processing unit. On the other hand, the reception intensity detection unit detects the signal intensity of the received radio frequency signal.

  The signal output from the first signal processing unit is subjected to processing (for example, AGC control or amplification) for improving demodulation accuracy by the second signal processing unit. The signal output from the second signal processing unit is demodulated into information transmitted by the demodulation unit.

  Here, the energization control unit controls energization of each circuit of the second signal processing unit based on the detection result of the reception intensity detection unit. For example, energization of the second signal processing unit is stopped until the detection result of the reception intensity detection unit clears a predetermined condition. As a result, unlike the conventional technique (see FIG. 6) in which the entire analog unit is always energized and operated, the second signal until a signal to be received (which can be demodulated) arrives (during reception standby). It is possible to significantly reduce power consumption in the processing unit. Thereby, the power saving of the receiving device can be realized.

  The second signal processing unit includes a gain adjustment circuit that performs gain adjustment on the signal from the first signal processing unit, and an amplification circuit that amplifies the signal from the gain adjustment circuit. It is preferable to stop energization of the gain adjustment circuit and the amplifier circuit in a state where the detection result does not satisfy the predetermined condition, and to start energization to the gain adjustment circuit and the amplification circuit if the detection result satisfies the predetermined condition.

  According to the above configuration, the signal from the first signal processing unit is subjected to gain adjustment processing (for example, auto gain control) and amplification processing by the gain adjustment circuit and amplification circuit of the second signal processing unit. Here, the energization control unit controls energization of the gain adjustment circuit and the amplification circuit based on the detection result of the reception intensity detection unit. That is, energization of the gain adjustment circuit and the amplifier circuit is stopped until the detection result of the reception intensity detection unit clears a predetermined condition. As a result, it is possible to eliminate waste of power in the gain adjustment circuit and the amplification circuit until a signal to be received (demodulatable) arrives (during reception standby).

  In the receiving apparatus of the present invention, the energization control unit can control energization of the reception intensity detection unit, and the energization control unit energizes the gain adjustment circuit, and when the gain adjustment is completed, the reception intensity is increased. It is preferable to configure so that energization to the detection unit is stopped.

  In the above configuration, when the detection result of the reception intensity detection unit clears a predetermined condition and the gain adjustment circuit is activated and the gain adjustment is completed, the energization of the reception intensity detection unit is stopped. This is because if the gain adjustment is completed, it is not necessary to operate the reception intensity detection unit until the signal demodulation in the demodulation unit is completed. As described above, when the reception intensity detection unit does not need to be activated, by stopping energization to the reception intensity detection unit, a greater power saving effect can be obtained.

  The receiving apparatus may further include a gain control unit that controls the gain adjustment circuit, and a digital operation control unit that controls operating states of the gain control unit and the demodulation unit.

  In the receiving apparatus, the energization control unit energizes the first signal processing unit and the reception intensity detection unit while energizing the second signal processing unit during reception standby when the detection result does not satisfy the predetermined condition. It is preferable that the digital operation control unit stops the operation of the demodulation unit and the gain control unit.

  According to the above configuration, further power saving can be achieved by stopping energization of the second signal processing unit that does not need to be operated during reception standby and also stopping the operation of the demodulation unit and the gain control unit. It becomes.

  In the receiving apparatus, when the detection result satisfies a predetermined condition, the energization control unit starts energizing the second signal processing unit and energizes the first signal processing unit and the reception intensity detection unit. The digital operation control unit starts the operations of the demodulation unit and the gain control unit. As a result, the signal from the first signal processing unit is subjected to gain adjustment and amplification processing in the second signal processing unit, and the signal from the second signal processing unit is demodulated into information transmitted from the demodulation unit. The

  Further, in the present receiving device, the power saving mode at the time of reception can be selected. In the power saving mode at the time of reception, when the control of the gain adjustment circuit by the gain control unit is finished, the energization control unit is a reception intensity detecting unit. It is preferable that the energization of the second signal processing unit is continued while the digital operation control unit continues the operations of the demodulation unit and the gain control unit.

  According to the above configuration, when the detection result satisfies a predetermined condition, the gain control unit (of the second signal processing unit) is controlled by the gain control unit. Thus, the signal from the first signal processing unit is optimally gain-adjusted by the gain adjustment circuit, and is sent to the demodulation unit via the amplifier circuit (of the second signal processing unit). In this way, it is possible to further reduce power consumption by stopping the energization of the reception intensity detection unit that does not need to be operated during reception (after the control of the gain adjustment circuit). Become.

  In order to solve the above problems, a receiving apparatus of the present invention includes a radio frequency signal processing unit that converts a received radio frequency signal into a lower frequency signal, and a reception intensity detection unit that detects the signal strength of the radio frequency signal. An intermediate frequency signal processing unit that converts the signal from the radio frequency signal processing unit into a lower frequency signal, a demodulation unit that demodulates the signal from the intermediate frequency signal processing unit, and detection by the reception intensity detection unit And an energization control unit that controls energization of each circuit of the intermediate frequency signal processing unit based on the result.

  According to the above configuration, the radio frequency signal received by the radio frequency signal processing unit is converted into a lower frequency signal (for example, an intermediate frequency signal) by the radio frequency signal processing unit. Further, the signal from the radio frequency signal processing unit is converted into a lower frequency signal (for example, a baseband signal) by the intermediate frequency signal processing unit. On the other hand, the reception intensity detection unit detects the signal intensity of the received radio frequency signal. The signal output from the intermediate frequency signal processing unit is input to the demodulation unit and demodulated into the transmitted information.

  Here, the energization control unit controls the energization of each circuit of the intermediate frequency signal processing unit based on the detection result of the reception intensity detection unit. For example, the energization of the intermediate frequency signal processing unit is stopped until the detection result of the reception intensity detection unit clears a predetermined condition. As a result, unlike the conventional technique (see FIG. 6) in which the entire analog unit is always energized and operated, an intermediate frequency signal until a signal to be received (which can be demodulated) arrives (during reception standby). It is possible to significantly reduce power consumption in the processing unit. Thereby, the power saving of the receiving device can be realized.

  The intermediate frequency signal processing unit further includes an oscillator, and a mixer circuit that mixes the signal from the oscillator and the signal from the radio frequency signal processing unit. It is preferable to stop energization to the mixer circuit in a state where the predetermined condition is not satisfied, and to start energization to the mixer circuit if the detection result satisfies the predetermined condition.

  According to the above configuration, the signal from the radio frequency signal processing unit is mixed with the signal from the oscillator in the mixer circuit of the intermediate frequency signal processing unit, and converted to a lower frequency signal (for example, a baseband signal). . Here, the energization control unit controls energization to the mixer circuit based on the detection result of the reception intensity detection unit. That is, energization to the mixer circuit is stopped until the detection result of the reception intensity detection unit clears a predetermined condition. As a result, it is possible to eliminate waste of power in the mixer circuit until a signal to be received (which can be demodulated) arrives (when waiting for reception).

  Further, the intermediate frequency signal processing unit performs gain adjustment on the signal from the radio frequency signal processing unit and outputs the signal to the mixer circuit, a low-pass filter circuit to which the signal from the mixer circuit is input, An amplification circuit for amplifying a signal from the low-pass filter circuit, and the energization control unit stops energization of the gain adjustment circuit, the low-pass filter circuit, and the amplification circuit when the detection result does not satisfy a predetermined condition. It is preferable to start energization of the gain adjustment circuit, the low-pass filter circuit, and the amplifier circuit when the detection result satisfies a predetermined condition.

  According to the above configuration, the signal from the radio frequency signal processing unit is gain-adjusted by the gain adjustment circuit, and mixed with the signal from the oscillator by the mixer to become a lower frequency signal (for example, a baseband signal). Converted. The signal output from the mixer circuit is input to the low-pass filter circuit (where unnecessary signals are removed) and then amplified by the amplifier circuit. Here, the energization control unit controls energization to the gain adjustment circuit, the low-pass filter circuit, and the amplification circuit based on the detection result of the reception intensity detection unit. That is, energization of the gain adjustment circuit, the low-pass filter circuit, and the amplifier circuit is stopped until the detection result of the reception intensity detection unit clears a predetermined condition. As a result, it is possible to eliminate waste of power in the gain adjustment circuit, the low-pass filter circuit, and the amplification circuit until a signal to be received (demodulatable) comes (during reception standby).

  In the receiving apparatus of the present invention, it is preferable to energize the oscillator regardless of the detection result. This configuration does not require a configuration for controlling energization of the oscillator (for example, a configuration controlled from an upper layer), and can simplify the device configuration.

  Further, in the receiving device of the present invention, the energization control unit can control energization of the oscillator, and the energization control unit monitors a reception result to the radio frequency signal processing unit. It can also be configured to control energization of the oscillator based on the above.

  According to the above configuration, a greater power saving effect can be obtained by controlling energization of an oscillator that consumes a large amount of power in the intermediate frequency signal processing unit.

  In the receiving device of the present invention, the energization control unit can control energization of the reception intensity detection unit, and the energization control unit performs energization to the gain adjustment circuit and completes the gain adjustment. It is preferable that the power supply to the reception intensity detection unit is stopped.

  In the above configuration, when the detection result of the reception intensity detection unit clears a predetermined condition and the gain adjustment circuit is activated and the gain adjustment is completed, the energization of the reception intensity detection unit is stopped. This is because if the gain adjustment is completed, it is not necessary to operate the reception intensity detection unit until the signal demodulation in the demodulation unit is completed. As described above, when the reception intensity detection unit does not need to be activated, by stopping energization to the reception intensity detection unit, a greater power saving effect can be obtained.

  In the receiving apparatus, the energization control unit can also control energization to the oscillator, the gain control unit that controls the gain adjustment circuit, and the digital operation that controls the operation state of the gain control unit and the demodulation unit. It can also be set as the structure further provided with a control part.

  In the receiving apparatus, when the detection result does not satisfy the predetermined condition, the energization control unit energizes the radio frequency signal processing unit and the reception intensity detection unit and each circuit of the intermediate frequency signal processing unit. It is preferable that the energization is stopped and the digital operation control unit stops the operation of the demodulation unit and the gain control unit.

  According to the above configuration, further power saving can be achieved by stopping energization of each circuit of the intermediate frequency signal processing unit that does not need to be operated during reception standby and stopping the operation of the demodulation unit and the gain control unit. Can be realized.

  In addition, the reception apparatus can select a power saving mode during reception standby, and the energization control unit stops energization of the oscillator in the power saving mode during reception standby and ends the power saving mode during reception standby. It is preferable to start energization of the oscillator. According to the above configuration, further power saving can be achieved by stopping energization of the oscillator that does not need to be operated during reception standby.

  When the detection result satisfies a predetermined condition, the energization control unit starts energization of each circuit of the intermediate frequency signal processing unit, and the oscillator, the radio frequency signal processing unit, and the reception intensity detection The digital operation control unit starts the operation of the demodulation unit and the gain control unit. As a result, the signal from the radio signal processing unit is subjected to gain adjustment, down-conversion, unnecessary signal removal and amplification processing in the intermediate frequency signal processing unit. The signal from the intermediate frequency signal processing unit is demodulated into information transmitted by the demodulation unit.

  In addition, the receiving apparatus can select a power saving mode during reception. In the power saving mode during reception, when the control of the gain adjustment circuit by the gain control unit is completed, the energization control unit sends the reception intensity detecting unit to the reception intensity detecting unit. It is preferable that the energization of each of the oscillator and the intermediate frequency signal processing unit is continued while the digital operation control unit continues the operations of the demodulation unit and the gain control unit.

  According to the above configuration, when the detection result satisfies a predetermined condition, the gain control circuit (of the intermediate frequency signal processing unit) is controlled by the gain control unit. Thereby, the signal from the radio signal processing unit is optimally gain-adjusted by the gain adjustment circuit and then mixed (down-converted) with the signal from the oscillator, and the low-pass filter circuit and the amplification circuit (of the intermediate frequency signal processing unit) And sent to the demodulator. In this way, it is possible to further reduce power consumption by stopping the energization of the reception intensity detection unit that does not need to be operated during reception (after the control of the gain adjustment circuit). Become.

  In addition, a communication device according to the present invention includes the above-described receiving device.

  A wireless LAN device according to the present invention includes the above-described receiving device.

  Further, in order to solve the above-described problem, the energization control method for the receiving apparatus of the present invention includes a first signal processing unit that converts a received radio frequency signal into a lower frequency signal, and a signal intensity of the radio frequency signal. An energization control method for a receiving apparatus, comprising: a received intensity detecting unit for detecting; and a second signal processing unit for performing a process of increasing demodulation accuracy on a signal from a first signal processing unit, When the detection result does not satisfy the predetermined condition, the energization to each circuit of the second signal processing unit is stopped. When the detection result satisfies the predetermined condition, the energization to each circuit of the second signal processing unit is performed. It is characterized by starting.

  Further, in order to solve the above-described problem, the energization control method of the receiving apparatus of the present invention is configured to convert a received radio frequency signal into a lower frequency signal and a signal intensity of the radio frequency signal. A reception device control method comprising: a reception intensity detection unit for detecting; and an intermediate frequency signal processing unit for converting a signal from the radio frequency signal processing unit into a low frequency signal, wherein the reception intensity detection unit includes: When the detection result does not satisfy the predetermined condition, the energization of each circuit of the intermediate frequency signal processing unit is stopped, and when the detection result satisfies the predetermined condition, the energization of each circuit of the intermediate frequency signal processing unit is performed. It is characterized by starting.

  The energization control program for a receiving apparatus according to the present invention causes a computer to execute the energization control method for the receiving apparatus.

  The recording medium of the present invention is characterized in that the energization control program of the receiving device is stored in a computer readable manner.

  As described above, according to the receiving apparatus of the present invention, the energization control unit controls the energization of each circuit of the second signal processing unit (intermediate frequency signal processing unit) based on the detection result of the reception intensity detection unit. . As a result, the second signal processing unit (intermediate frequency signal processing) until the signal to be received is received (during reception standby) as compared with the above-described conventional technology in which the entire analog unit is always energized and operated. Part)) can be greatly reduced. Thereby, the power saving of the receiving device can be realized.

[Embodiment 1]
An embodiment of a wireless LAN terminal (reception device / communication device, wireless LAN device) according to the present invention will be described below with reference to FIG. 1 and FIG.

  As shown in the figure, the reception unit 2 of the wireless LAN terminal 1 according to the present embodiment includes a radio frequency signal processing unit 4, a signal detection unit 6, an intermediate frequency signal processing unit 5, and a digital demodulation unit 7. It is a double heterodyne configuration including a (demodulation unit), a gain control unit 8, and an operating state control unit 9.

  Here, the radio frequency signal processing unit 4, the intermediate frequency signal processing unit 5, and a part of the signal detection unit 6 (RSSI circuit 31) constitute an analog unit 10, and a part of the signal detection unit 6 ( The ADC 32 / reception start determination unit 33), the digital demodulation unit 7, the gain control unit 8, and the operating state control unit 9 constitute a digital unit 20.

  The radio frequency signal processing unit 4 includes an antenna 11, a low noise amplifier (LNA) 12, a radio frequency oscillator (RFOSC) 13, a radio frequency mixer (RF mixer) 14, and a bandpass filter (BPF) 15. Prepare. The antenna 11 receives a radio frequency signal from a LAN (local area network) 3 to which the wireless LAN terminal 1 is (wirelessly) connected. The low noise amplifier 12 amplifies the radio signal 11 received by the antenna 11 with a low NF (noise figure). The radio frequency oscillator 13 oscillates a signal for down-converting the radio frequency signal into a lower frequency signal (intermediate frequency signal). The radio frequency mixer 14 mixes the radio frequency signal output from the low noise amplifier 12 and the oscillation signal from the radio frequency oscillator 13 and outputs an intermediate frequency signal having a frequency lower than that of the radio frequency signal. The bandpass filter 15 removes an unnecessary signal from the intermediate frequency signal output from the radio frequency mixer 14 and extracts a target frequency signal.

  The intermediate frequency signal processing unit 5 includes an intermediate frequency oscillator (IFOSC) 21 (oscillator), an AGC circuit (auto gain control circuit) 22 (gain adjustment circuit), and two intermediate frequency mixer circuits (IF mixer circuit). 23a and 23b (mixers), two low-pass filter circuits (LPF circuits) 25a and 25b, and two amplifier circuits (AMP circuits) 26a and 26b. The intermediate frequency oscillator 21 oscillates a signal for down-converting the intermediate frequency signal to a lower frequency signal (baseband signal). The intermediate frequency mixer circuit 23a mixes the intermediate frequency signal output from the AGC circuit 22 and the oscillation signal of the intermediate frequency oscillator 21, and outputs a baseband signal (in-phase component). The intermediate frequency mixer circuit 23b mixes the intermediate frequency signal output from the AGC circuit 22 and a signal obtained by shifting the oscillation signal of the intermediate frequency oscillator 21 by π / 2, and outputs a baseband signal (orthogonal component). To do. The low-pass filter circuit 25a removes unnecessary signals from the baseband signal (in-phase component) output from the intermediate frequency mixer circuit 23a, and extracts a target frequency signal. Similarly, the low-pass filter circuit 25b removes unnecessary signals from the baseband signal (orthogonal component) output from the intermediate frequency mixer circuit 23b. The amplifier circuit 26a amplifies the baseband signal (in-phase component) output from the low-pass filter circuit 25a and from which unnecessary signals are removed. The amplifier circuit 26b amplifies the baseband signal (orthogonal component) output from the low-pass filter circuit 25b and from which unnecessary signals are removed.

  The signal detection unit 6 includes an RSSI circuit (reception signal strength index circuit) 31 (reception strength detection unit) belonging to the analog unit 10, an A / D converter (ADC) 32 and a reception start determination unit 33 belonging to the digital unit 20. With. The RSSI circuit 31 calculates an RSSI signal from the intermediate frequency signal output from the bandpass filter 15 and outputs the RSSI signal to the A / D converter 32. The A / D converter 32 digitizes the RSSI signal detected by the RSSI circuit 31 and outputs it to the reception start determination unit 33.

  The reception start determination unit 33 determines whether reception is appropriate or not as follows. FIG. 5 is a block diagram illustrating a configuration of the reception start determination unit 33. As shown in the figure, the reception start determination unit 33 includes a delay circuit 81, a subtraction circuit 82, and a comparison circuit 83. In this configuration, first, the delay circuit 81 delays the sample value of the RSSI signal that precedes in time among the digitized RSSI signals, and uses this as a reference value for obtaining the increase amount of the RSSI value. . Next, the subtraction circuit 82 subtracts the reference value of the delay circuit 81 from the sample value of the RSSI signal that is subsequently input to obtain an increase amount of the RSSI value (detection result of the reception intensity detection unit). Next, the comparison circuit 83 compares the increase amount of the RSSI value with a set increase amount threshold value, and determines that a signal is detected when the increase amount of the RSSI value exceeds the increase amount threshold value (predetermined condition). Then, a reception start signal is transmitted to the operation state control unit 9. Further, the reception start determination unit 33 outputs the RSSI value at this time to the AGC control circuit 50 of the gain control unit 8 as a reception level. Thus, by determining the start of reception when the amount of increase in the sample value exceeds the threshold, even when the signal to be received and the interference signal are mixed and received, the signal to be received may be overlooked. The reception start can be accurately determined. Thereby, the power saving effect of the wireless LAN terminal 1 can be further enhanced.

  The reference value generation circuit is not limited to the delay circuit 81, and may be a sample hold circuit that holds the sample value of the RSSI signal at a certain timing. The reception start determination unit 33 determines whether or not the reception level output from the A / D converter 32 is equal to or higher than a threshold value (predetermined level). A simple configuration that outputs to the unit 9 may be used.

  The digital demodulator 7 includes two A / D converters (ADCs) 41a and 41b and a baseband demodulation circuit (BB demodulation circuit) 42. The A / D converter 41a AD converts the baseband signal from the amplifier circuit 26a. Similarly, the A / D converter 41b AD-converts the baseband signal from the amplifier circuit 26b. The baseband demodulation circuit 42 demodulates original data (transmission information) from the digital signals output from the A / D converters 41a and 41b, and outputs the demodulated data to an upper layer. Further, when the demodulation of the signal (packet data) is completed, the baseband demodulation circuit 42 transmits a packet end signal to the operation state control unit 9.

  The gain control unit 8 includes an AGC control circuit 50 and a D / A converter (DAC) 60. The AGC control circuit 50 controls the AGC circuit 22 based on the reception level output from the reception start determination unit 33. In addition, when the control of the AGC circuit 22 is completed, the AGC control circuit 50 transmits an AGC control completion signal to the operation state control unit 9.

  The operation state control unit 9 includes an operation clock control circuit 51 (digital operation control unit) and an energization control circuit 52 (energization control unit). The operation clock control circuit 51 receives a reception start signal from the reception start determination unit 33, supplies an operation clock to the digital demodulation unit 7 and the gain control unit 8, and operates these units. The energization control circuit 52 receives the reception start signal from the reception start determination unit 33, and receives each circuit of the intermediate frequency signal processing unit 5 (AGC circuit 22, IF mixer circuits 23a and 23b, LPF circuits 25a and 25b, and amplification circuit 26a). • Energize 26b) to activate these circuits.

  The energization control circuit 52 is provided in an upper layer (a layer higher than the physical layer), and is in accordance with an OSC control signal from the reception status monitoring unit 66 that monitors the data reception state (reception interval) of the radio frequency signal processing unit 4. The energization (operation start and stop) of the intermediate frequency oscillator (IFOSC) 21 is controlled.

  The operation state control unit 9 receives the AGC control completion signal from the AGC control circuit 50 and controls the operation of the signal detection unit 6 (RSSI circuit 31, ADC 32 and reception start determination unit 33). That is, the energization control circuit 52 receives the AGC control completion signal, stops energization of the RSSI circuit 31, and stops its operation. In response to the AGC control completion signal, the operation clock control circuit 51 stops supplying the operation clock to the ADC 32 and the reception start determination unit 33, and stops the operation of these units.

  Further, the operation state control unit 9 receives the packet end signal from the baseband demodulation circuit 42 and performs operations of the circuits of the intermediate frequency signal processing unit 5, the signal detection unit 6, the digital demodulation unit 7, and the gain control unit 8. Control. That is, upon receiving the packet end signal, the operation clock control circuit 51 stops supplying the operation clock to the digital demodulation unit 7 and the gain control unit 8, stops the operation of these units, and also performs the ADC 32 and the reception start determination unit. The supply of 33 operation clocks is started, and these operations are started. In addition, the energization control circuit 52 receives the packet end signal and sends it to each circuit of the intermediate frequency signal processing unit 5 (AGC circuit 22, IF mixer circuits 23a and 23b, LPF circuits 25a and 25b, and amplifier circuits 26a and 26b). Is stopped, the operation of these circuits is stopped, and the RSSI circuit 31 is started to be energized.

  Below, the control process of the operation state of each part of the receiver 2 in the wireless LAN terminal 1 will be described with reference to the flowchart of FIG.

  First, in the wireless LAN terminal 1, the radio frequency signal processing unit 4, the signal detection unit 6, and the operation state control unit 9 (the operation clock control circuit 51 and the energization control circuit 52) at the time of reception standby not receiving data. Only the circuit of the intermediate frequency signal processing unit 5 (analog unit 10), the gain control unit 8 and the digital demodulation unit 7 (digital unit 20) are not operating. The intermediate frequency oscillator 21 of the analog unit 10 depends on a mode to be selected (described later).

  That is, at the time of reception standby, the energization control circuit 52 stops energizing each circuit (AGC circuit 22, IF mixer circuits 23a and 23b, LPF circuits 25a and 25b, and amplifier circuits 26a and 26b) of the intermediate frequency signal processing unit 5. In addition, the operation clock control circuit 51 stops supplying the operation clock to the digital demodulation unit 7 and the gain control unit 8. Thus, power saving can be achieved by stopping energization of each circuit of the intermediate frequency signal processing unit 5 during reception standby. In particular, since the wireless LAN terminal has a long reception standby state, this power saving effect is significant.

  Since the radio frequency signal processing unit 4 and the signal detection unit 6 are operating even during reception standby, the wireless LAN terminal 1 is in a state where it can always recognize transmission data (packets) to itself.

  The wireless LAN terminal 1 can select an IFOSC (intermediate frequency oscillator) power saving mode (reception standby power saving mode) during this reception standby (see S1). The IFOSC power saving mode is a mode in which the intermediate frequency oscillator 21 (in the intermediate frequency signal processing unit 5) is not operated. Here, the energization control circuit 52 stops energization of the intermediate frequency oscillator 21 based on the OSC control signal from the reception status monitoring unit 66 (upper layer), and stops the operation of the intermediate frequency oscillator 21. ing.

  From the above, when the IFOSC power saving mode is selected during reception standby, the entire intermediate frequency signal processing unit 5 including the intermediate frequency oscillator 21, the digital demodulation unit 7, and the gain control unit 8 are turned off (inactive), and the radio frequency Only the signal processing unit 4 and the signal detection unit 6 are turned on (see S2). Thus, further power saving can be achieved by appropriately stopping energization to the IFOSC (intermediate frequency oscillator) 21 that consumes a large amount of power during reception standby.

  When the IFOSC power saving mode is not selected during reception standby or when the IFOSC power saving mode is terminated (S3), each circuit (AGC circuit 22, IF mixer circuit 23a,. 23b, the LPF circuits 25a and 25b, and the amplifier circuits 26a and 26b), the digital demodulator 7 and the gain controller 8 are turned off (inactivated), and the intermediate frequency oscillator 21, the radio frequency signal processor 4 and the signal detector 6 is turned on (operation) (see S4).

  Here, when a signal is detected by the signal detection unit 6 via the radio frequency signal processing unit 4 (S5), the wireless LAN terminal 1 shifts from the reception standby state to the reception state and starts reception (S6). . The signal processing flow (S4 to S6) at this time will be described in detail as follows.

  A signal (radio frequency signal) received by the antenna 11 is amplified by the low noise amplifier 12 at low NF. A signal output from the low noise amplifier (LNA) 12 is mixed with an oscillation signal from a radio frequency oscillator (RFOSC) 13 in a radio frequency mixer (RF mixer) 14. As a result, the signal from the low noise amplifier 12 is down-converted to an intermediate frequency signal. The signal output from the radio frequency mixer 14 is input to the bandpass filter 15. The band pass filter 15 removes unnecessary signals included in the signal from the radio frequency mixer 14.

  The signal output from the bandpass filter 15 is input to the reception intensity detector (RSSI) 31. The RSSI circuit 31 detects the RSSI value (reception level) of the input signal. The A / D converter 32 digitizes the RSSI value detected by the RSSI circuit 31 and outputs it to the reception start determination unit 33. Here, when the increase amount of the RSSI value (difference from the preceding RSSI value) exceeds the increase amount threshold value, the reception start determination unit 33 determines that the signal is detected (yes in S5), and the reception start signal is determined. Output to the operating state control unit 9. This starts reception (S6).

  In response to the reception start signal from the reception start determination unit 33, the energization control circuit 52 of the operating state control unit 9 starts energization to each circuit of the intermediate frequency signal processing unit 5, and the operation clock control circuit 51 receives the digital demodulation unit 7. Then, supply of the operation clock to the gain controller 8 is started.

  Thereby, each circuit (AGC circuit 22, IF mixer circuits 23a and 23b, LPF circuits 25a and 25b, amplification circuits 26a and 26b) of the intermediate frequency signal processing unit 5 that has been in an OFF (non-operating) state until then, a digital demodulation unit 7 and the gain control unit 8 are turned on (refer to S7). The radio frequency signal processing unit 4, the intermediate frequency oscillator 21 and the signal detection unit 6 that have been in the ON (operating) state remain in the ON (operating) state (see S7).

  When the gain control unit 8 is energized (ON), the reception start determination unit 33 outputs the reception level (input from the ADC 32) to the AGC control circuit 50. The AGC control circuit 50 controls the AGC circuit 22 via the DAC 60 based on this reception level. When the control of the AGC circuit 22 is completed (S8), the AGC control circuit 50 transmits an AGC control completion signal to the operation state control unit 9.

  Thereby, it shifts to the power saving mode during reception (S9). That is, upon receiving the AGC control completion signal, the operation clock control circuit 51 stops the supply of the operation clocks of the ADC 32 and the reception start determination unit 33. The energization control circuit 52 stops energization of the RSSI circuit 31. As a result, the operation of the signal detection unit 6 stops, and the radio frequency signal processing unit 4, the intermediate frequency signal processing unit 5, the digital demodulation unit 7, and the gain control unit 8 continue to operate. Thus, during the signal reception (from the start of reception to the end of reception), the operation of the signal detection unit 6 is stopped (particularly, the RSSI circuit 31 is de-energized), thereby further saving power. Can be realized.

  Although it is preferable to set the power saving mode at the time of reception as a default, it is also possible not to select the mode (S9). In this case, the signal detection unit 6, the radio frequency signal processing unit 4, the intermediate frequency signal processing unit 5, the digital demodulation unit 7 and the gain control unit 8 are all turned on, and the same operation state as that of S7 is continued (S11). .

  Following S10 or S11, the packet data is demodulated (S12). The signal processing procedure in S12 will be described as follows.

  When the control of the AGC circuit 22 by the AGC control circuit 50 is completed in S8, the signal output from the bandpass filter 15 is appropriately adjusted in gain by the AGC circuit 22, and the intermediate frequency mixer circuit 23a and the intermediate frequency mixer A demultiplexed signal is output to the circuit 23b.

  One signal output from the AGC circuit 22 is mixed with the oscillation signal from the intermediate frequency oscillator 21 in the intermediate frequency mixer circuit 23a. Thus, the baseband signal (in-phase component) is output from the intermediate frequency mixer circuit 23a to the LPF circuit 25a. In the LPF circuit 25a, unnecessary signals are removed. The signal from the LPF circuit 25a is input to the amplifier circuit 26a and amplified. The signal from the amplifier circuit 26 a is input to the ADC 41 a of the digital demodulator 7.

  The other signal output from the AGC circuit 22 is mixed with a signal obtained by shifting the oscillation signal from the intermediate frequency oscillator 21 by π / 2 in the intermediate frequency mixer circuit 23b. As a result, the baseband signal (orthogonal component) from the intermediate frequency mixer circuit 23b is output to the LPF circuit 25b. In the LPF circuit 25b, unnecessary signals are removed. The signal from the LPF circuit 25b is input to the amplifier circuit 26b and amplified. The signal from the amplifier circuit 26b is input to the ADC 41b of the digital demodulator 7.

  In the baseband demodulator circuit (BB demodulator circuit) 42 of the digital demodulator 7, a signal (packet data) transmitted to the wireless LAN terminal 1 based on the signals from the A / D converter 41a and the A / D converter 41b. Is demodulated. The demodulated data (demodulated data) is transmitted to the upper layer. When the signal demodulation is completed (S13), the baseband demodulation circuit 42 transmits a packet demodulation end signal to the operation state control unit 9. As a result, the wireless LAN terminal 1 again shifts to the reception standby state (S14).

  That is, in response to the packet demodulation end signal from the baseband demodulator circuit 42, the energization control circuit 52 of the operating state control unit 9 receives each circuit of the intermediate frequency signal processing unit 5 (AGC circuit 22, IF mixer circuits 23a and 23b, The energization of the LPF circuits 25a and 25b and the amplifier circuits 26a and 26b) is stopped, and the energization of the RSSI circuit 31 of the signal detector 6 is started. The operation clock control circuit 51 stops supplying the operation clock to the digital demodulation unit 7 and the gain control unit 8 and starts energization of the ADC 32 and the reception start determination unit 33 of the signal detection unit 6.

[Embodiment 2]
Another embodiment of the wireless LAN terminal (reception device / wireless LAN device) according to the present invention will be described below with reference to FIGS.

  As shown in the figure, the receiving unit 102 of the wireless LAN terminal 101 according to the present embodiment includes a radio frequency signal processing unit 104 (first signal processing unit), a signal detection unit 106, and a gain adjustment unit 105 ( This is a direct conversion configuration including a second signal processing unit), a digital demodulation unit 107 (demodulation unit), a gain control unit 108, and an operating state control unit 109.

  Here, the radio frequency signal processing unit 104, the gain adjustment unit 105, and a part of the signal detection unit 106 (RSSI circuit 131) constitute an analog unit 110, and a part of the signal detection unit 106 (ADC 132. The reception start determination unit 133), the digital demodulation unit 107, the gain control unit 108, and the operating state control unit 109 constitute a digital unit 120.

  The radio frequency signal processing unit 104 includes an antenna 111, a low noise amplifier (LNA) 112, a radio frequency oscillator (RFOSC) 113, two radio frequency mixers (RF mixers) 114a and 114b, and two low-pass signals. Filters (LPF) 115a and 115b. The antenna 111 receives a radio frequency signal (RF signal) from a LAN (local area network) 103 to which the wireless LAN terminal 101 is (wirelessly) connected. The low noise amplifier 112 amplifies the radio signal 111 received by the antenna 111 with a low NF (noise figure), and outputs the amplified signal to the radio frequency mixers (RF mixers) 114a and 114b. The radio frequency oscillator 113 oscillates a signal for down-converting a radio frequency signal into a baseband signal. The radio frequency mixer 114a mixes one signal output from the low noise amplifier 112 and the oscillation signal from the radio frequency oscillator 113, and outputs a baseband signal (in-phase component). The radio frequency mixer 114b mixes the other signal output from the low noise amplifier 112 and a signal obtained by shifting the oscillation signal from the radio frequency oscillator 113 by π / 2, and outputs a baseband signal (orthogonal component). To do. The low-pass filter 115a removes unnecessary signals from the baseband signal (in-phase component) output from the radio frequency mixer 114a, and extracts a target frequency signal. The low-pass filter 115b removes an unnecessary signal from the baseband signal (orthogonal component) output from the radio frequency mixer 114b and extracts a target frequency signal.

  The gain adjustment unit 105 includes an AGC circuit (auto gain control circuit) 122 (gain adjustment circuit) and two amplification circuits (AMP circuits) 126a and 126b. The amplifier circuit 126a amplifies the baseband signal (in-phase component) output from the low-pass filter circuit 115a, from which unnecessary signals are removed. The amplifier circuit 126b amplifies the baseband signal (orthogonal component) output from the low-pass filter circuit 115b and from which unnecessary signals are removed.

  The signal detection unit 106 includes an RSSI circuit 131 (reception signal strength indicator circuit, reception strength detection unit) belonging to the analog unit 110, an A / D converter (ADC) 132 and a reception start determination unit 133 belonging to the digital unit 120. Is provided. The RSSI circuit 131 calculates an RSSI signal from the intermediate frequency signal output from the bandpass filter 115 and outputs the RSSI signal to the A / D converter 132. The A / D converter 132 digitizes the RSSI signal detected by the RSSI circuit 131 and outputs the digitized RSSI signal to the reception start determination unit 133. The configuration of the reception start determination unit 133 and the determination of the suitability of reception start are the same as in the first embodiment (see FIG. 5). That is, when the RSSI value increase amount from the RSSI circuit 131 (detection result of the reception intensity detection unit) exceeds the increase amount threshold value (predetermined condition is satisfied), it is determined that the signal has been detected and the reception start signal is activated. It transmits to the state control part 109. Furthermore, the reception start determination unit 133 outputs the RSSI value at this time to the gain control unit 108 as a reception level. In this way, by determining the start of reception when the amount of increase in the sample value exceeds the threshold, even if the signal to be received and the interference signal are mixed and received, the signal to be received cannot be overlooked. The reception start can be accurately determined.

  The reference value generating circuit is not limited to the delay circuit, and may be a sample hold circuit that holds the sample value of the RSSI signal at a certain timing. The reception start determination unit 133 determines whether or not the reception level (the detection result of the reception intensity detection unit) output from the A / D converter 132 is equal to or greater than a threshold (predetermined condition). For example, a simple configuration that outputs a reception start signal to the operation state control unit 109 may be used.

  The digital demodulator 107 includes two A / D converters (ADC) 141 a and 141 b and a baseband demodulator circuit (BB demodulator circuit) 142. The A / D converter 141a AD converts the baseband signal from the amplifier circuit 126a. Similarly, the A / D converter 141b AD-converts the baseband signal from the amplifier circuit 126b. The baseband demodulation circuit 142 demodulates original data (transmission information) from the digital signals output from the A / D converters 141a and 141b, and outputs the demodulated data to an upper layer. Further, when the demodulation of the signal (packet data) is completed, the baseband demodulation circuit 142 transmits a packet end signal to the operation state control unit 109.

  The gain control unit 108 includes an AGC control circuit 150 and a D / A converter (DAC) 160. The AGC control circuit 150 controls the AGC circuit 122 based on the reception level output from the reception start determination unit 133. In addition, when the control of the AGC circuit 122 is completed, the AGC control circuit 150 transmits an AGC control completion signal to the operation state control unit 109.

  The operation state control unit 109 includes an operation clock control circuit 151 (digital operation control unit) and an energization control circuit 152 (energization control unit). The operation clock control circuit 151 receives a reception start signal from the reception start determination unit 133, supplies an operation clock to the digital demodulation unit 107 and the gain control unit 108, and operates these units. The energization control circuit 152 receives the reception start signal from the reception start determination unit 133, energizes the gain adjustment unit 105, and operates it.

  The operating state control unit 109 receives the AGC control completion signal from the AGC control circuit 150 and controls the operation of the signal detection unit 106 (RSSI circuit 131, ADC 132, and reception start determination unit 133). That is, the energization control circuit 152 receives the AGC control completion signal, stops energization of the RSSI circuit 131, and stops its operation. In response to the AGC control completion signal, the operation clock control circuit 151 stops supply of the operation clock to the ADC 132 and the reception start determination unit 133, and stops these operations.

  Furthermore, the operation state control unit 109 receives the packet end signal from the baseband demodulation circuit 142 and controls the operations of the gain adjustment unit 105, the signal detection unit 106, the digital demodulation unit 107, and the gain control unit 108. That is, the operation clock control circuit 151 receives the packet end signal, stops supplying the operation clock to the digital demodulation unit 107 and the gain control unit 108, stops the operation of these units, and also performs the ADC 132 and the reception start determination unit. The supply of 133 operation clocks is started, and these operations are started. Also, the energization control circuit 152 receives the packet end signal, stops energizing the gain adjusting unit 105, stops its operation, starts energizing the RSSI circuit 131, and activates it.

  Below, the control process of the operation state of each part of this wireless LAN terminal 101 is demonstrated, referring the flowchart of FIG.

  First, in the wireless LAN terminal 101 according to the present embodiment, the radio frequency signal processing unit 104, the signal detection unit 106, and the operation state control unit 109 (operation clock control) are performed during reception standby when data (signal) is not received. Only the circuit 151 and the energization control circuit 152) operate, and the gain adjustment unit 105 (analog unit), the gain control unit 8 and the digital demodulation unit 7 (digital unit 20) do not operate (S15).

  That is, at the time of reception standby, the energization control circuit 152 stops energization of the gain adjustment unit 105, and the operation clock control circuit 151 stops supplying the operation clock to the digital demodulation unit 107 and the gain control unit 108. ing. In this way, at the time of reception standby, it is possible to save power by not operating the digital demodulation unit 7 and the gain control unit 8 (digital unit) including the gain adjustment unit 105 of the analog unit. In particular, since the wireless LAN terminal has a long reception standby state, this power saving effect is significant.

  Since the radio frequency signal processing unit 104 and the signal detection unit 106 are operating even during reception standby, the wireless LAN terminal 101 is in a state where it can always recognize transmission data (packets) to itself.

  Here, when the radio frequency signal received by the radio frequency signal processing unit 104 (antenna 111) is determined by the reception start determination unit 133 to be a reception level equal to or higher than a predetermined threshold (S16), the wireless LAN terminal 101 Shifts from the reception standby state to the reception state and starts reception (S17). The signal processing flow (S15 to S17) at this time will be described in more detail as follows.

  A signal (radio frequency signal) received by the antenna 111 is amplified with low NF by the low noise amplifier 112, and is demultiplexed and output to the radio frequency mixer 114a and the radio frequency mixer 114b. One signal output from the low noise amplifier 112 is mixed with an oscillation signal from a radio frequency oscillator (RFOSC) 113 in a radio frequency mixer (RF mixer) 114a. As a result, the signal from the low noise amplifier 112 is down-converted to a baseband signal (in-phase component). The signal output from the radio frequency mixer 114a is input to the low pass filter 115a. The low-pass filter 115a removes unnecessary signals included in the signal from the radio frequency mixer 114a. The other signal output from the low noise amplifier 112 is mixed with a signal obtained by shifting the oscillation signal from the radio frequency oscillator (RFOSC) 113 by π / 2 in the radio frequency mixer (RF mixer) 114b. As a result, the signal from the low noise amplifier 112 is down-converted into a baseband signal (orthogonal component). The signal output from the radio frequency mixer 114b is input to the low pass filter 115b. The low-pass filter 115b removes unnecessary signals included in the signal from the radio frequency mixer 114b.

  The signal output from the low-pass filter 115 is input to the reception intensity detector (RSSI) 131. The RSSI circuit 131 detects the RSSI value (reception level) of the input signal. The ADC 132 digitizes the RSSI value detected by the RSSI circuit 131 and outputs it to the reception start determination unit 133. Here, when the increase amount of the RSSI value (difference from the preceding RSSI value) exceeds the increase amount threshold value, the reception start determination unit 133 determines that the signal is detected (yes in S16), and the reception start signal is determined. Output to the operating state control unit 109. This starts reception (S17).

  In response to the reception start signal from the reception start determination unit 133, the energization control circuit 152 of the operating state control unit 109 starts energization to the gain adjustment unit 105, and the operation clock control circuit 151 includes the digital demodulation unit 107 and the gain control unit 108. Supply of the operation clock to is started.

  As a result, the gain adjusting unit 105, the digital demodulating unit 107, and the gain control unit 108 that have been in the OFF (non-operating) state are turned on (operated) (see S18). Note that the radio frequency signal processing unit 104 and the signal detection unit 106 that have been energized (ON) so far remain in the energized (ON) state (see S18).

  When the gain control unit 108 operates, the reception start determination unit 133 outputs the RSSI value (reception level) to the AGC control circuit 150. The AGC control circuit 150 controls the AGC circuit 122 via the DAC 160 based on this reception level. When the control of the AGC circuit 122 is completed (Yes in S19), the AGC control circuit 150 transmits an AGC control completion signal to the operation state control unit 109.

  Thereby, it shifts to the power saving mode at the time of reception (yes in S20). That is, upon receiving the AGC control completion signal, the operation clock control circuit 151 stops the supply of operation clocks to the ADC 132 and the reception start determination unit 133. The energization control circuit 152 stops energization of the RSSI circuit 131. As a result, the operation of the signal detection unit 106 stops, and the radio frequency signal processing unit 104, the gain adjustment unit 105, the digital demodulation unit 107, and the gain control unit 108 continue to operate (S21). As described above, by stopping the operation of the signal detection unit 106 (in particular, by stopping the energization of the RSSI circuit 131) during signal reception (between the start of reception and the end of reception), further power saving is achieved. Can be realized.

  Although it is preferable to set the power saving mode at the time of reception as a default, it is possible not to select the mode. In this case, the signal detection unit 106, the radio frequency signal processing unit 104, the gain adjustment unit 105, the digital demodulation unit 107, and the gain control unit 108 are all turned on (operated) and continue to operate (S22).

  Following S21 or S22, the packet data is demodulated (S23). The signal processing procedure in S23 will be described as follows.

  When the control of the AGC circuit 122 by the AGC control circuit 150 is completed in S19, the signal output from one of the low-pass filters 115a is appropriately adjusted in gain by the AGC circuit 122, input to the amplifier circuit 126a, and amplified. . The signal output from the amplifier circuit 126a is input to the ADC 141a of the digital demodulation unit 107. Further, the signal output from the other low-pass filter 115b is appropriately adjusted in gain by the AGC circuit 122, input to the amplifier circuit 126b, and amplified. The signal output from the amplifier circuit 126b is input to the ADC 141b of the digital demodulation unit 107.

  In the baseband demodulation circuit (BB demodulation circuit) 142 of the digital demodulation unit 107, a signal (packet data) transmitted to the wireless LAN terminal 101 based on the signals from the A / D converter 141a and the A / D converter 141b. Is demodulated. The demodulated data (demodulated data) is transmitted to the upper layer.

  When the signal demodulation is completed (S24), the baseband demodulation circuit 142 transmits a packet demodulation end signal to the operation state control unit 109. As a result, the wireless LAN terminal 101 again shifts to the reception standby state (S25).

  That is, in response to the packet demodulation end signal from the baseband demodulation circuit 142, the energization control circuit 152 of the operating state control unit 109 stops energization of the gain adjustment unit 105 and supplies the RSSI circuit 131 of the signal detection unit 106 to the RSSI circuit 131. Start energization. The operation clock control circuit 151 stops supplying the operation clock to the digital demodulation unit 107 and the gain control unit 108 and starts energizing the ADC 132 and the reception start determination unit 133 of the signal detection unit 106.

  In the first and second embodiments, the operation of each unit of the digital unit is controlled by stopping or starting the operation clock supply by the operation clock control circuit. However, the present invention is not limited to this. For example, the energization control circuit may be configured to control energization of each unit (ADC, reception start determination unit, digital demodulation unit, gain control unit) of the digital unit. The function of the operation state control unit described above can also be realized by hardware, and can cause a computer to execute a program (for example, a calculation means such as a CPU stores in a recording medium such as a ROM or RAM. (Executed program code) can be realized.

  In Embodiments 1 and 2, the double heterodyne method and the direct conversion method are described, but the configuration to which the receiving apparatus of the present invention is applied is not limited to these methods. Any analog processing for improving demodulation accuracy between a radio frequency signal (RF) processing unit (first analog processing unit, for example, the first signal processing unit) and a digital processing unit (for example, the demodulation unit) The configuration of the present invention is applied to any receiver in which a unit (second analog processing unit, for example, the second signal processing unit or the intermediate frequency signal processing unit) is present (the energization control unit performs the second analog processing). It is possible to control energization to the part.

  The receiving apparatus of the present invention includes a first signal processing unit that converts a received radio frequency signal into a lower frequency signal, a reception intensity detection unit that detects a signal intensity of the radio frequency signal, and the first signal. Based on the detection result of the second signal processing unit that performs processing for increasing the demodulation accuracy on the signal from the processing unit, the demodulation unit that demodulates the signal from the second signal processing unit, and the reception intensity detection unit, It can also be expressed as a configuration including an operation state control unit that controls operation start and operation stop of each circuit of the signal processing unit.

  The receiving device of the present invention includes a radio frequency signal processing unit that converts a received radio frequency signal into a lower frequency signal, a reception intensity detection unit that detects the signal strength of the radio frequency signal, and the radio frequency signal. An intermediate frequency signal processing unit that converts a signal from the processing unit into a low frequency signal, a demodulation unit that demodulates the signal from the intermediate frequency signal processing unit, and an intermediate detection signal based on the detection result of the reception intensity detection unit. It can also be expressed as a configuration including an operation state control unit that controls operation start and operation stop of each circuit of the frequency signal processing unit.

  The receiving device of the present invention includes a first signal processing unit that converts a received radio frequency signal into a lower frequency signal, a signal detection unit that detects the signal strength of the signal from the first signal processing unit, The signal from the first signal processing unit is subjected to gain adjustment by a gain adjustment circuit and then converted to a lower frequency signal, or the signal from the first signal processing unit is converted to a gain adjustment by an gain adjustment circuit and an amplification circuit A configuration may be provided that includes a second signal processing unit that performs amplification, and an operation state control unit that stops the operation of the signal detection unit when the gain adjustment in the gain adjustment circuit is completed.

  The receiving apparatus of the present invention further includes a digital demodulating unit that demodulates a signal from the second signal processing unit, and the operation state control unit completes the demodulation of the signal from the second signal processing unit. The structure which starts operation | movement of a detection part may be sufficient.

  The receiving device of the present invention includes a first signal processing unit that converts a received radio frequency signal into a lower frequency signal, and a signal from the first signal processing unit, an intermediate frequency mixer circuit and the intermediate frequency A second signal processing unit that converts the signal to a lower frequency signal using an intermediate frequency oscillator that supplies an oscillation signal to the mixer circuit; and an operating state of the intermediate frequency oscillator based on a data reception interval of the first signal processing unit A reception status monitoring unit that controls

  Further, the control method of the receiving apparatus of the present invention includes a first signal processing unit that converts a received radio frequency signal into a lower frequency signal, and signal detection that detects the signal strength of the signal from the first signal processing unit. And the signal from the first signal processing unit is subjected to gain adjustment by the gain adjustment circuit and then converted to a lower frequency signal, or the signal from the first signal processing unit is adjusted to gain adjustment by the gain adjustment circuit and A second signal processing unit that performs amplification by an amplification circuit, a gain control unit that controls the gain adjustment circuit based on the signal strength obtained by the signal detection unit, and a signal from the second signal processing unit are demodulated And a digital demodulation unit, wherein the signal detection unit is operated in a state where the gain adjustment in the gain adjustment circuit is not completed, and the gain adjustment is completed when the gain adjustment is completed. Signal detection In the state where the digital demodulator has not completed the demodulation, the operation of the signal detector is stopped, and the operation of the signal detector is started when the digital demodulator completes the demodulation. It may be configured to.

  The present invention is not limited to the above-described embodiment, and various modifications are possible within the scope shown in the claims, and the embodiment can be obtained by appropriately combining technical means disclosed in the embodiment. Is also included in the technical scope of the present invention.

  The receiving apparatus according to the present invention is applicable to, for example, a wireless LAN terminal mounted on a mobile terminal such as a PDA.

It is a block diagram which shows the structure of the wireless LAN terminal (receiving part) concerning Embodiment 1 of this invention. 3 is a flowchart for explaining control of an operating state of the wireless LAN terminal shown in FIG. It is a block diagram which shows the structure of the wireless LAN terminal (receiving part) concerning Embodiment 2 of this invention. 4 is a flowchart for explaining control of an operating state of the wireless LAN terminal shown in FIG. 3. It is a block diagram which shows the structure of the signal detection part concerning Embodiment 2 of this invention. It is a block diagram which shows the structure of the conventional (power saving) wireless LAN apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Wireless LAN terminal 2 Reception part (of wireless LAN terminal 1) 4 Radio frequency signal processing part 5 Intermediate frequency signal processing part 7.107 Digital demodulation part (demodulation part)
8 Gain control unit 9.109 Operating state control unit 10 Analog unit 20 Digital unit 21 Intermediate frequency oscillator (oscillator)
22.122 AGC circuit (gain adjustment circuit)
23 Mixer circuit for intermediate frequency (mixer circuit)
25a / 25b LPF circuit (low-pass filter circuit)
26a / 26b / 126a / 126b Amplifying circuit 31/131 RSSI circuit (reception strength detection unit)
51 ・ 151 Operation clock control circuit (Digital operation control unit)
66 Reception Status Monitoring Unit 52/152 Energization Control Circuit (Energization Control Unit)
104 Radio frequency signal processing unit (first signal processing unit)
105 Gain adjuster (second signal processor)

Claims (13)

A first signal processing unit that converts a received radio frequency signal into a lower frequency signal;
A signal detection unit that detects the signal strength of the signal from the first signal processing unit and outputs a reception start signal when the increase amount of the signal strength is equal to or greater than a threshold;
A second signal processing unit that converts the signal from the first signal processing unit into a signal of a lower frequency, or performs gain adjustment and amplification on the signal from the first signal processing unit;
An operation state controller that stops energization of the second signal processing unit until the reception start signal is output, and starts energization of the second signal processing unit when the reception start signal is output;
A receiving apparatus comprising: A gain adjustment circuit provided in the second signal processing unit; and a gain control unit for controlling the gain adjustment circuit;
The operation state control unit stops energization to the gain control unit until a reception start signal is output, and starts energization to the gain control unit when a reception start signal is output. The receiving device according to claim 1. A digital demodulator for demodulating the signal from the second signal processor;
The operation state controller stops the operation of the digital demodulator until a reception start signal is output, and starts the operation of the digital demodulator when the reception start signal is output. Item 4. The receiving device according to Item 1. A digital demodulator for demodulating the signal from the second signal processor;
The receiving apparatus according to claim 1, wherein the operation state control unit stops energization to the second signal processing unit when the demodulation of the signal from the second signal processing unit is completed. The second signal processing unit includes a gain adjustment circuit, an oscillator, a mixer circuit that mixes a signal from the oscillator and a signal from the gain adjustment circuit,
2. The receiving apparatus according to claim 1, wherein the operating state control unit energizes the oscillator constantly regardless of the output of the reception start signal. The second signal processing unit converts the signal from the first signal processing unit into a lower frequency signal using an intermediate frequency mixer circuit and an intermediate frequency oscillator that supplies an oscillation signal to the intermediate frequency mixer circuit. With
The receiving apparatus according to claim 1, further comprising a reception status monitoring unit that controls an operating state of the intermediate frequency oscillator based on a data reception interval of the first signal processing unit. A first signal processing unit that converts a received radio frequency signal into a lower frequency signal;
A signal detection unit that detects the signal strength of the signal from the first signal processing unit and outputs a reception start signal when the increase amount of the signal strength is equal to or greater than a threshold;
A second signal processing unit that converts the signal from the first signal processing unit into a signal of a lower frequency, or performs gain adjustment and amplification on the signal from the first signal processing unit;
A gain adjustment circuit provided in the second signal processing unit;
An operation state control unit that stops energization to the second signal processing unit until the reception start signal is output, and starts energization to the second signal processing unit when the reception start signal is output; The receiving apparatus according to claim 1, wherein the operation state control unit stops the operation of the signal detection unit when the gain adjustment in the gain adjustment circuit is completed. A first signal processing unit that converts a received radio frequency signal into a lower frequency signal;
A signal detection unit that detects the signal strength of the signal from the first signal processing unit and outputs a reception start signal when the increase amount of the signal strength is equal to or greater than a threshold;
A second signal processing unit that converts the signal from the first signal processing unit into a signal of a lower frequency, or performs gain adjustment and amplification on the signal from the first signal processing unit;
A gain adjustment circuit provided in the second signal processing unit;
A digital demodulator for demodulating the signal from the second signal processor;
An operation state control unit that stops energization to the second signal processing unit until the reception start signal is output, and starts energization to the second signal processing unit when the reception start signal is output; The operation state control unit stops the operation of the signal detection unit when the gain adjustment in the gain adjustment circuit is completed, and then starts the operation of the signal detection unit when the demodulation of the signal from the second signal processing unit is completed. A receiving apparatus.   The communication apparatus provided with the receiver of any one of Claims 1-8.   A wireless LAN device comprising the receiving device according to claim 1. A first signal processing unit that converts a received radio frequency signal into a lower frequency signal, a signal detection unit that detects the signal strength of the signal from the first signal processing unit, and a signal from the first signal processing unit And a second signal processing unit that performs gain adjustment and amplification on the signal from the first signal processing unit,
When the increase amount of the signal strength is less than the threshold value, the energization to the second signal processing unit is stopped, and when the increase amount of the signal strength exceeds the threshold value, the energization to the second signal processing unit is started. A control method for a receiving apparatus.   A control program for a receiving apparatus, which causes a computer to execute the control method for a receiving apparatus according to claim 11.   13. A recording medium, wherein the control program for the receiving apparatus according to claim 12 is stored in a computer readable manner.

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