JP2005064341A - Silicon single crystal wafer and its manufacturing method - Google Patents

Silicon single crystal wafer and its manufacturing method Download PDF

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JP2005064341A
JP2005064341A JP2003294647A JP2003294647A JP2005064341A JP 2005064341 A JP2005064341 A JP 2005064341A JP 2003294647 A JP2003294647 A JP 2003294647A JP 2003294647 A JP2003294647 A JP 2003294647A JP 2005064341 A JP2005064341 A JP 2005064341A
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Toshimi Tobe
敏視 戸部
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Shin Etsu Handotai Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a silicon single crystal wafer which has gettering capability even against slight contaminations and is applicable to a device manufacturing process, and also to provide its manufacturing method. <P>SOLUTION: The silicon single crystal wafer has such a structure that an intermediate layer and a silicon oxide film are laminated in order on a rear face of a silicon single crystal substrate. A solubility of heavy metal impurities is larger in the intermediate layer than in the silicon oxide film. For the intermediate layer, a titanium oxide film or a titanium film is used. The intermediate layer which has a solubility of heavy metal impurities larger than the silicon oxide film is formed on the rear face of the silicon single crystal substrate, and the silicon oxide film is formed by the CVD method on a rear face of the intermediate layer. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、デバイス動作に悪影響を及ぼす重金属不純物を除去する技術であるゲッタリング方法の改良に関し、特に高いゲッタリング能力をもったデバイス製造用シリコン単結晶ウェーハ及びその製造方法に関する。   The present invention relates to an improvement of a gettering method, which is a technique for removing heavy metal impurities that adversely affect device operation, and more particularly to a silicon single crystal wafer for device manufacture having a high gettering capability and a method for manufacturing the same.

半導体集積回路等のデバイスの高密度化、高集積化に伴い、デバイス動作の安定化が頓に望まれてきている。特にリーク電流や酸化膜耐圧等の特性値改善は重要な課題である。   As the density of devices such as semiconductor integrated circuits is increased and the integration is increased, stabilization of device operation has been desired. In particular, improvement of characteristic values such as leakage current and oxide film breakdown voltage is an important issue.

しかるに半導体集積回路の製造工程において、望まれざる重金属、例えばCu、Fe、Niといった不純物に汚染される可能性が現在においても否定できていない。これらの重金属不純物はシリコン単結晶中に固溶した状態で、前述のリーク電流や酸化膜耐圧特性を著しく劣化させることが広く知られている。   However, in the manufacturing process of semiconductor integrated circuits, the possibility of contamination with impurities such as undesired heavy metals such as Cu, Fe, and Ni cannot be denied. It is widely known that these heavy metal impurities are significantly dissolved in the silicon single crystal and the above-described leakage current and oxide film breakdown voltage characteristics are remarkably deteriorated.

そのため、これら重金属不純物をデバイス動作領域外へ取り除く方法として、種々のゲッタリング技術が開発されてきている。例えば、CZ法で製造されたシリコン単結晶中に含まれる酸素原子を析出させ、その析出物周囲の歪みに重金属を捕獲するIG(Internal Gettering)法や、シリコンウェーハの裏面に多結晶シリコン膜を形成し、その多結晶粒界の歪みに不純物を捕獲する方法などである。後者はEG(External Gettering)法の代表例である。この2種は不純物捕獲機構が異なるため、用途によって使い分けている。簡単には、前者は大量汚染の場合に有効だが微量汚染では効果を発揮しないことがあり、対して後者は微量汚染の場合でも有効である(非特許文献1)。   Therefore, various gettering techniques have been developed as a method for removing these heavy metal impurities out of the device operating region. For example, an IG (Internal Gettering) method in which oxygen atoms contained in a silicon single crystal produced by the CZ method are precipitated and heavy metals are captured in the strain around the precipitate, or a polycrystalline silicon film is formed on the back surface of a silicon wafer. A method of forming and capturing impurities in the distortion of the polycrystalline grain boundary. The latter is a representative example of the EG (External Gettering) method. Since these two types have different impurity trapping mechanisms, they are selectively used depending on the application. Briefly, the former is effective in the case of a large amount of contamination but may not be effective in a small amount of contamination, whereas the latter is effective even in the case of a small amount of contamination (Non-Patent Document 1).

しかるに、デバイスの高集積化に従い、デバイス動作に影響する不純物の濃度は従来よりかなり下がってきている。従って、これ以上の不純物の低濃度化に対応するためには、微量汚染の場合でも有効な従来技術である裏面多結晶シリコン膜によっても不可能である可能性がある。   However, with the higher integration of devices, the concentration of impurities that affect device operation is considerably lower than before. Therefore, there is a possibility that it is impossible to cope with the lower concentration of impurities by using the backside polycrystalline silicon film which is a conventional technique that is effective even in the case of trace contamination.

微量汚染に対応するためには、その捕獲機構上、シリコン単結晶とは別層で、かつ不純物に対する溶解度の大きいものを用いればよい。その代表例が前述の多結晶シリコン膜である。また、最近は、ボロンを高濃度に含有する高濃度ボロン添加シリコン単結晶基板(p+基板)の表面に、ボロン濃度が低いエピタキシャル層を形成したp/p+エピウェーハもその目的にて考えられている場合がある。これらの例ではともに、ゲッタリング層としての別層に、種々の工夫を凝らしたシリコンを用いている。これらの工夫はいずれも重金属不純物の溶解度を向上させる効果をもっている。しかし、これらの方法では不純物の溶解度を劇的に上昇させることはできない。 In order to cope with a slight amount of contamination, a layer different from the silicon single crystal and having a high solubility with respect to impurities may be used because of its capture mechanism. A typical example is the aforementioned polycrystalline silicon film. Recently, a p / p + epiwafer in which an epitaxial layer with a low boron concentration is formed on the surface of a high-concentration boron-added silicon single crystal substrate (p + substrate) containing boron at a high concentration is also considered for that purpose. There may be. In both of these examples, silicon with various contrivances is used for another layer as a gettering layer. All of these devices have the effect of improving the solubility of heavy metal impurities. However, these methods cannot dramatically increase the solubility of impurities.

その点、全くの別物質による別層を考えれば、不純物の溶解度の高い物質が存在する。例えば、アルミニウム膜を用いる方法が知られている(非特許文献2)。このアルミニウム膜は不純物に対する溶解度が極めて高く、ゲッタリング能力としては裏面多結晶シリコンとは比較にならないほど強い。具体的には裏面多結晶シリコンがppmオーダーなのに対し、アルミニウムでは数10%の溶解度がある。しかし、アルミニウム膜は融点が660℃と低く、デバイス製造プロセス熱処理中に溶解してしまうため、実用にはならない。
「シリコンの科学」UCS半導体基盤技術研究会編集、リアライズ社発行、p.585−621 “Gettering of metallic impurities in photovoltaic silicon”A.McHugo,H.Hieslmair,E.R.Weber;Appl.Phys.A 64 (1997)127−137
In that respect, there is a substance with high impurity solubility, considering another layer of completely different substances. For example, a method using an aluminum film is known (Non-Patent Document 2). This aluminum film has extremely high solubility in impurities, and its gettering capability is so strong that it cannot be compared with that of backside polycrystalline silicon. Specifically, the back surface polycrystalline silicon is on the order of ppm, while aluminum has a solubility of several tens of percent. However, the aluminum film has a melting point as low as 660 ° C. and is dissolved during the device manufacturing process heat treatment, so it is not practical.
"Science of Silicon" edited by UCS Semiconductor Technology Research Group, published by Realize, p. 585-621 “Gettering of metallic impulses in photovoltaic silicon” A. McHugo, H .; Hieslmir, E .; R. Weber; Appl. Phys. A 64 (1997) 127-137

本発明は、このような問題点に鑑みてなされたもので、微量汚染においてもゲッタリング能力を持たせ、デバイス製造プロセスに適用可能なシリコン単結晶ウェーハ及びその製造方法を提供することを目的とする。   The present invention has been made in view of such problems, and an object of the present invention is to provide a silicon single crystal wafer that can be applied to a device manufacturing process and has a gettering capability even in a minute amount of contamination, and a manufacturing method thereof. To do.

本発明のシリコン単結晶ウェーハは、シリコン単結晶基板の裏面に中間層とシリコン酸化膜が順次積層された構造を有するシリコン単結晶ウェーハであって、該中間層の重金属不純物の溶解度が、シリコン酸化膜より大きいことを特徴とする。   The silicon single crystal wafer of the present invention is a silicon single crystal wafer having a structure in which an intermediate layer and a silicon oxide film are sequentially laminated on the back surface of a silicon single crystal substrate, and the solubility of heavy metal impurities in the intermediate layer is determined by silicon oxide. It is characterized by being larger than the membrane.

本発明のシリコン単結晶ウェーハの製造方法は、シリコン単結晶基板の裏面に、重金属不純物の溶解度がシリコン酸化膜より大きい中間層を形成し、該中間層の表面にCVD法によりシリコン酸化膜を形成することを特徴とする。   In the method for producing a silicon single crystal wafer of the present invention, an intermediate layer having a higher solubility of heavy metal impurities than a silicon oxide film is formed on the back surface of the silicon single crystal substrate, and a silicon oxide film is formed on the surface of the intermediate layer by a CVD method. It is characterized by doing.

前記中間層としては、チタン酸化膜またはチタン膜を用いるのが好適であり、これらの膜はスパッタリング法により形成することができる。前記重金属の代表的なものとしては、Feをあげることができる。   As the intermediate layer, it is preferable to use a titanium oxide film or a titanium film, and these films can be formed by a sputtering method. A typical example of the heavy metal is Fe.

尚、本明細書においては、シリコン酸化膜や中間層を形成するための材料基板を『シリコン単結晶基板』と記載し、そのシリコン単結晶基板にシリコン酸化膜や中間層を形成したものを『シリコン単結晶ウェーハ』と記載する。   In this specification, a material substrate for forming a silicon oxide film or an intermediate layer is referred to as a “silicon single crystal substrate”, and a silicon single crystal substrate having a silicon oxide film or an intermediate layer formed thereon is described as “ "Silicon single crystal wafer".

本発明のシリコン単結晶ウェーハは、微量汚染においてもゲッタリング能力を有し、デバイス製造プロセスに適用可能であるという大きな効果を奏する。本発明方法によれば、本発明のシリコン単結晶ウェーハを効率よく製造することができる。   The silicon single crystal wafer of the present invention has a great effect that it has gettering capability even in a small amount of contamination and can be applied to a device manufacturing process. According to the method of the present invention, the silicon single crystal wafer of the present invention can be efficiently produced.

以下に本発明を実施するための最良の形態を添付図面に基づいて説明するが、図示例は例示的に示されるもので、本発明の技術思想から逸脱しない限り種々の変形が可能なことはいうまでもない。   BEST MODE FOR CARRYING OUT THE INVENTION The best mode for carrying out the present invention will be described below with reference to the accompanying drawings. However, the illustrated examples are shown by way of example, and various modifications can be made without departing from the technical idea of the present invention. Needless to say.

前記のように、微量汚染に対応するためには、その捕獲機構上、シリコン単結晶とは別層で、かつ不純物に対する溶解度の大きいものを用いればよい。しかしながら、アルミニウム膜のように融点が1000℃に満たない膜の場合は、デバイスプロセスに適用できない場合が多く有効ではない。   As described above, in order to cope with a minute amount of contamination, a layer that is separate from the silicon single crystal and has a high solubility in impurities may be used because of its trapping mechanism. However, in the case of a film having a melting point of less than 1000 ° C. such as an aluminum film, it is not effective because it is often not applicable to a device process.

そこで、本発明者は、融点が1000℃を大きく上回るシリコン酸化膜を用いることができれば、デバイス製造プロセス中に溶解するようなことはなく、デバイス製造のいかなる段階においても、そのゲッタリング能力が保たれることを発想し、本発明を完成させた。   Therefore, if the silicon oxide film having a melting point much higher than 1000 ° C. can be used, the present inventor will not dissolve during the device manufacturing process, and the gettering ability is maintained at any stage of device manufacturing. The present invention was completed with the idea of dripping.

すなわち、シリコン酸化膜は通常の半導体デバイス作製用シリコン単結晶ウェーハの構成元素であることから、シリコン単結晶ウェーハ内で害とはならない。また、シリコン酸化膜中の重金属の拡散係数はシリコン単結晶中におけるそれよりも数桁低い場合が多く、いったん酸化膜中にゲッタリングされた重金属は再放出しにくい。このようにシリコン酸化膜は裏面ゲッタリング層としての性質として、好ましい性質を数多く持っている。   That is, since the silicon oxide film is a constituent element of a normal silicon single crystal wafer for manufacturing a semiconductor device, it is not harmful in the silicon single crystal wafer. In addition, the diffusion coefficient of heavy metal in the silicon oxide film is often several orders of magnitude lower than that in the silicon single crystal, and the heavy metal once gettered in the oxide film is difficult to re-emit. Thus, the silicon oxide film has many desirable properties as the properties of the back surface gettering layer.

また、その酸化膜形成法で最も一般的な熱酸化法では、シリコン単結晶との界面での反応がその酸化膜成長の駆動力であるため、酸化膜はシリコン単結晶基板の元の表面の外部に成長すると同時に、シリコン単結晶基板の内部にも成長する特徴がある。そのため、シリコン単結晶基板中に既に重金属不純物が固溶している場合、その重金属を酸化膜中に取り込むように、酸化膜が内側に成長することになり、有利である。言い換えれば、酸化膜成長と重金属不純物のゲッタリング反応が同時に進行していることになる。この現象を利用して重金属不純物を除去する技術が、いわゆる犠牲酸化処理(熱酸化膜形成後にその熱酸化膜を除去する処理)として一般的に知られている。犠牲酸化によれば、半ば恒久的にシリコン単結晶基板の系外に重金属不純物を除去できることになる。   In addition, in the most common thermal oxidation method in the oxide film formation method, the reaction at the interface with the silicon single crystal is the driving force for the growth of the oxide film, so the oxide film is formed on the original surface of the silicon single crystal substrate. At the same time it grows outside, it grows inside the silicon single crystal substrate. Therefore, when the heavy metal impurity is already dissolved in the silicon single crystal substrate, the oxide film grows inward so that the heavy metal is taken into the oxide film, which is advantageous. In other words, the oxide film growth and the heavy metal impurity gettering reaction proceed simultaneously. A technique for removing heavy metal impurities using this phenomenon is generally known as a so-called sacrificial oxidation process (a process for removing the thermal oxide film after the thermal oxide film is formed). According to the sacrificial oxidation, heavy metal impurities can be removed from the system of the silicon single crystal substrate semi-permanently.

しかし、犠牲酸化処理の酸化工程中に不純物ゲッタリングを同時に行なうということは、予めシリコン単結晶基板中に不純物が存在していることが前提であり、酸化工程後の酸化膜付きシリコン単結晶ウェーハへの重金属汚染に対してのゲッタリング能力を必ずしも保証するものではない。それは、ゲッタリング層として酸化膜が高い能力を持っていることとも矛盾せず、シリコン単結晶ウェーハ中の重金属不純物が酸化膜中に移動できるか否かにかかっているからである。一般に、隣り合った別層へ不純物が移動する際には、両層におけるおのおのの拡散挙動に加えて、何らかの界面反応を経る必要がある。その界面反応を促進させれば、不純物は固溶状態で安定な層(すなわち、溶解度(固溶度)が高い層)へ容易に移ることになる。   However, performing impurity gettering simultaneously during the oxidation process of the sacrificial oxidation treatment is based on the premise that impurities exist in the silicon single crystal substrate in advance, and the silicon single crystal wafer with an oxide film after the oxidation process It does not necessarily guarantee the gettering ability against heavy metal contamination. This is because it is consistent with the high ability of the oxide film as a gettering layer and depends on whether heavy metal impurities in the silicon single crystal wafer can move into the oxide film. In general, when impurities migrate to adjacent layers, it is necessary to undergo some kind of interfacial reaction in addition to the diffusion behavior of each layer. If the interface reaction is promoted, the impurities are easily transferred to a stable layer in a solid solution state (that is, a layer having a high solubility (solid solubility)).

本発明のシリコン単結晶ウェーハ10はその点を考慮してなされたもので、図1に示すように、シリコン酸化膜16とシリコン単結晶基板12との界面に、重金属不純物の溶解度がシリコン酸化膜より大きい別層(中間層)14を挿入することにより、シリコン単結晶ウェーハ10の表面や裏面を汚染した不純物が酸化膜層16中へ容易に移動することができるようにした所に特徴がある。上記重金属としてはFeを例示することができる。   The silicon single crystal wafer 10 of the present invention has been made in consideration of this point, and as shown in FIG. 1, the solubility of heavy metal impurities at the interface between the silicon oxide film 16 and the silicon single crystal substrate 12 is a silicon oxide film. By inserting a larger separate layer (intermediate layer) 14, impurities contaminating the front and back surfaces of the silicon single crystal wafer 10 can be easily moved into the oxide film layer 16. . An example of the heavy metal is Fe.

これにより、酸化膜16が形成された後のデバイス作製熱処理中において、形成された酸化膜16中への不純物ゲッタリング効果を得ることが可能となる。   This makes it possible to obtain an impurity gettering effect in the formed oxide film 16 during the device fabrication heat treatment after the oxide film 16 is formed.

重金属不純物の溶解度がシリコン酸化膜より大きい別層(中間層)14としては、例えば、チタン酸化膜(TiO2)やチタン膜(Ti)を好適に用いることができる。これらは、シリコン単結晶ウェーハが通常用いられる熱処理温度(数百℃〜1400℃)よりも高い融点を有しており、前記したアルミニウムのようにデバイス製造プロセス熱処理中に溶解する心配はない。また、Cu、Fe、Niなどの重金属不純物に対するTiO2やTiの溶解度は、シリコン酸化膜の溶解度(Feの場合、1000℃で3.2×1021atoms/cm3)よりも大きいため、TiO2やTiはこれらの重金属不純物をシリコン酸化膜中にゲッタリングさせるためのバッファ層として有効に機能する。 For example, a titanium oxide film (TiO 2 ) or a titanium film (Ti) can be suitably used as another layer (intermediate layer) 14 in which the solubility of heavy metal impurities is larger than that of the silicon oxide film. These have a melting point higher than the heat treatment temperature (several hundred to 1400 ° C.) in which silicon single crystal wafers are usually used, and there is no fear of melting during the device manufacturing process heat treatment as described above. Further, the solubility of TiO 2 and Ti with respect to heavy metal impurities such as Cu, Fe, and Ni is larger than the solubility of the silicon oxide film (in the case of Fe, 3.2 × 10 21 atoms / cm 3 at 1000 ° C.). 2 and Ti function effectively as a buffer layer for gettering these heavy metal impurities into the silicon oxide film.

図2は、本発明のシリコン単結晶ウェーハ10(シリコン単結晶基板12、中間層14及びシリコン酸化膜16)の断面構造と各層における重金属不純物の溶解度との関係を模式的に示したものである。   FIG. 2 schematically shows the relationship between the cross-sectional structure of the silicon single crystal wafer 10 (silicon single crystal substrate 12, intermediate layer 14, and silicon oxide film 16) of the present invention and the solubility of heavy metal impurities in each layer. .

本発明方法は、上記した本発明のシリコン単結晶ウェーハを製造する方法であって、図3に示すように、シリコン単結晶基板を準備する工程(ステップ100)、このシリコン単結晶基板の裏面に重金属不純物の溶解度がシリコン酸化膜より大きい中間層を形成する工程(ステップ102)、この中間層の表面にCVD法によりシリコン酸化膜を形成する工程(ステップ104)から構成されている。上記した重金属としてはFeを例示することが出来る。   The method of the present invention is a method of manufacturing the above-described silicon single crystal wafer of the present invention. As shown in FIG. 3, a step of preparing a silicon single crystal substrate (step 100), on the back surface of the silicon single crystal substrate The process includes a step of forming an intermediate layer in which the solubility of heavy metal impurities is larger than that of the silicon oxide film (step 102), and a step of forming a silicon oxide film on the surface of the intermediate layer by the CVD method (step 104). An example of the heavy metal is Fe.

前記中間層として、チタン酸化膜またはチタン膜をスパッタリング法により形成するのが好適である。   As the intermediate layer, it is preferable to form a titanium oxide film or a titanium film by a sputtering method.

以下に実施例をあげて本発明をさらに具体的に説明するが、これらの実施例は例示的に示されるもので限定的に解釈されるべきでないことはいうまでもない。
(実施例1)
The present invention will be described more specifically with reference to the following examples. However, it is needless to say that these examples are shown by way of illustration and should not be construed in a limited manner.
(Example 1)

CZ法により、直径6インチ、初期酸素濃度14ppma(JEIDAスケール)、方位<100>の結晶棒を、通常の引き上げ速度(1.2mm/min)で引き上げた。この結晶棒をスライス、ラップ、エッチング、鏡面研磨等の加工を行い、一方の面(表面)が鏡面のシリコン単結晶基板を作製し、その裏面(化学エッチング面)にチタン酸化膜をスパッタリング法により堆積し、その後、チタン酸化膜上にCVD法を用いて膜厚0.1μmのシリコン酸化膜を堆積することにより、裏面に中間層(チタン酸化膜)とシリコン酸化膜が順次積層された構造を有するシリコン単結晶ウェーハを作製した。なお、JEIDAは日本電子工業振興協会(現在は、JEITA:日本電子情報技術協会に改称された。)の略称である。   A crystal rod having a diameter of 6 inches, an initial oxygen concentration of 14 ppma (JEIDA scale), and an orientation <100> was pulled at a normal pulling rate (1.2 mm / min) by the CZ method. This crystal rod is processed by slicing, lapping, etching, mirror polishing, etc. to produce a silicon single crystal substrate having one surface (front surface) as a mirror surface, and a titanium oxide film is formed on the back surface (chemical etching surface) by sputtering. After that, a silicon oxide film having a thickness of 0.1 μm is deposited on the titanium oxide film by using the CVD method, so that an intermediate layer (titanium oxide film) and a silicon oxide film are sequentially laminated on the back surface. A silicon single crystal wafer was produced. JEIDA is an abbreviation for Japan Electronics Industry Promotion Association (currently renamed JEITA: Japan Electronics Information Technology Association).

このようにして作製したシリコン単結晶ウェーハの裏面の酸化膜上にFeを4×1013cm-2の濃度で塗布したものと、鏡面側表面から同一濃度で汚染したウェーハとを作製し、それぞれ1000℃の温度で、30分から8時間と熱処理時間を変えてFe原子をウェーハ深さ方向に拡散させた。 A silicon single crystal wafer fabricated in this manner was prepared by coating Fe with a concentration of 4 × 10 13 cm −2 on the oxide film on the back surface and a wafer contaminated with the same concentration from the mirror surface. At a temperature of 1000 ° C., the Fe atoms were diffused in the wafer depth direction by changing the heat treatment time from 30 minutes to 8 hours.

その後、シリコン単結晶基板のFe濃度の深さ分布をDLTS(Deep Level Transient Spectroscopy)法で測定したところ、鏡面側から汚染したウェーハでは、30分の熱処理後において、鏡面側からFeが検出されたが、裏面に向かって深くなるにつれ、Feは検出されなくなった。また1時間以上の熱処理を施すと、深さ方向においてどの位置であってもFeは検出されなかった。これは鏡面側から汚染されたFeが高濃度固溶層たるシリコン酸化膜とチタン酸化膜層に速やかに移行したからであり、単結晶シリコン側にはほとんどFeが残留しなかったことを示す。   Thereafter, the depth distribution of the Fe concentration of the silicon single crystal substrate was measured by a DLTS (Deep Level Transient Spectroscopy) method. In a wafer contaminated from the mirror surface side, Fe was detected from the mirror surface side after 30 minutes of heat treatment. However, as it became deeper toward the back surface, Fe was not detected. Further, when heat treatment was performed for 1 hour or longer, Fe was not detected at any position in the depth direction. This is because Fe contaminated from the mirror surface side quickly transferred to the silicon oxide film and the titanium oxide film layer, which are high-concentration solid solution layers, indicating that almost no Fe remained on the single crystal silicon side.

他方、裏面酸化膜側から汚染したウェーハでも、どの熱処理時間であっても、また深さのどの位置においても、単結晶シリコン中においてFeは検出されなかった。これは汚染面側に高濃度固溶層たるシリコン酸化膜とチタン酸化膜が存在していることにより、単結晶シリコン側へFeがほとんど拡散しなかったことを示している。
(比較例1)
On the other hand, no Fe was detected in the single crystal silicon at the wafer contaminated from the back oxide film side, at any heat treatment time, or at any depth. This indicates that Fe hardly diffused to the single crystal silicon side due to the presence of the silicon oxide film and the titanium oxide film as the high concentration solid solution layer on the contaminated surface side.
(Comparative Example 1)

CZ法により、直径6インチ、初期酸素濃度14ppma(JEIDAスケール)、方位<100>の結晶棒を、通常の引き上げ速度(1.2mm/min)で引き上げた。この結晶棒をスライス、ラップ、エッチング、鏡面研磨等の加工を行い、一方の面(表面)が鏡面のシリコン単結晶基板を作製し、その裏面(化学エッチング面)にCVD法を用いて膜厚0.1μmのシリコン酸化膜を堆積することにより、裏面にシリコン酸化膜のみが形成されたシリコン単結晶ウェーハを作製した。   A crystal rod having a diameter of 6 inches, an initial oxygen concentration of 14 ppma (JEIDA scale), and an orientation <100> was pulled at a normal pulling rate (1.2 mm / min) by the CZ method. This crystal rod is processed by slicing, lapping, etching, mirror polishing, etc. to produce a silicon single crystal substrate having one surface (front surface) as a mirror surface, and the back surface (chemical etching surface) is formed using a CVD method. By depositing a 0.1 μm silicon oxide film, a silicon single crystal wafer having only a silicon oxide film formed on the back surface was produced.

このウェーハを実施例1と同様に、両面のどちらかを汚染したウェーハをそれぞれ熱処理し、Fe原子をウェーハ深さ方向に拡散させた。その後、シリコン単結晶基板側のFe濃度の深さ分布を測定したところ、4時間以上の熱処理を施したものでは、汚染面にかかわらずシリコン単結晶中のFe濃度は深さ方向に均一な分布で飽和した。しかし、その飽和した平均濃度は、酸化膜側から汚染した場合が2×1013cm-3の濃度で均一だったのに対し、鏡面側から汚染したウェーハでは、表面濃度は1×1014cm-3以上と高く、酸化膜が必ずしもゲッタリング層として有効に作用していなかった。従って、酸化膜がゲッタリング層として有効に機能するのは、酸化膜側からの汚染に限定されてしまった。これは単結晶シリコン側から酸化膜へFeが速やかに移行できなかったことを示す。 In the same manner as in Example 1, the wafers contaminated on either side were heat-treated, and Fe atoms were diffused in the wafer depth direction. After that, when the depth distribution of the Fe concentration on the silicon single crystal substrate side was measured, the Fe concentration in the silicon single crystal was uniformly distributed in the depth direction regardless of the contaminated surface when the heat treatment was performed for 4 hours or more. Saturated at. However, the saturated average concentration was uniform at a concentration of 2 × 10 13 cm −3 when contaminated from the oxide film side, whereas the surface concentration of the wafer contaminated from the mirror surface side was 1 × 10 14 cm. The oxide film was not necessarily effectively acting as a gettering layer. Therefore, the effective function of the oxide film as the gettering layer has been limited to contamination from the oxide film side. This indicates that Fe could not be rapidly transferred from the single crystal silicon side to the oxide film.

なお、本発明は上記実施形態に限定されるものではない。上記形態は例示であり、本発明の特許請求の範囲に記載された技術的思想と実質的に同一な構成を有し、かつ同様な作用効果を奏するものは、いかなるものであっても本発明の技術的範囲に包含される。   The present invention is not limited to the above embodiment. The above embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

例えば、上記実施例1において、シリコン単結晶とシリコン酸化膜の間の層にチタン酸化膜層を用いているが、それに限定されるものではなく、チタン膜層やタングステン酸化膜層などを用いても同様の効果が得られれば本発明の範囲に含まれる。加えて単結晶Siと酸化膜の間の層に用いた中間層の形成法は限定されておらず、スパッタ法、蒸着法、CVD(化学気相堆積法)などを用いても、同様の効果が得られれば本発明の範囲に含まれる。   For example, in the first embodiment, a titanium oxide film layer is used as a layer between the silicon single crystal and the silicon oxide film, but the present invention is not limited to this, and a titanium film layer, a tungsten oxide film layer, or the like is used. If the same effect is obtained, it is included in the scope of the present invention. In addition, the formation method of the intermediate layer used for the layer between the single crystal Si and the oxide film is not limited, and the same effect can be obtained by using sputtering, vapor deposition, CVD (chemical vapor deposition), etc. Is included in the scope of the present invention.

本発明のシリコン単結晶ウェーハの拡大部分断面図である。It is an expanded partial sectional view of the silicon single crystal wafer of the present invention. 本発明のシリコン単結晶ウェーハの断面構造と重金属不純物の溶解度との関係を示す模式図である。It is a schematic diagram which shows the relationship between the cross-sectional structure of the silicon single crystal wafer of this invention, and the solubility of a heavy metal impurity. 本発明方法の工程順を示すフローチャートである。It is a flowchart which shows the process order of this invention method.

符号の説明Explanation of symbols

10:シリコン単結晶ウェーハ、12:シリコン単結晶基板、14:中間層、16:シリコン酸化膜。
10: silicon single crystal wafer, 12: silicon single crystal substrate, 14: intermediate layer, 16: silicon oxide film.

Claims (6)

シリコン単結晶基板の裏面に中間層とシリコン酸化膜が順次積層された構造を有するシリコン単結晶ウェーハであって、該中間層の重金属不純物の溶解度が、シリコン酸化膜より大きいことを特徴とするシリコン単結晶ウェーハ。   A silicon single crystal wafer having a structure in which an intermediate layer and a silicon oxide film are sequentially stacked on the back surface of a silicon single crystal substrate, wherein the solubility of heavy metal impurities in the intermediate layer is larger than that of a silicon oxide film Single crystal wafer. 前記中間層が、チタン酸化膜またはチタン膜であることを特徴とする請求項1に記載されたシリコン単結晶ウェーハ。   The silicon single crystal wafer according to claim 1, wherein the intermediate layer is a titanium oxide film or a titanium film. 前記重金属がFeであることを特徴とする請求項1または2に記載されたシリコン単結晶ウェーハ。   The silicon single crystal wafer according to claim 1, wherein the heavy metal is Fe. シリコン単結晶基板の裏面に、重金属不純物の溶解度がシリコン酸化膜より大きい中間層を形成し、該中間層の表面にCVD法によりシリコン酸化膜を形成することを特徴とするシリコン単結晶ウェーハの製造方法。   A silicon single crystal wafer is produced by forming an intermediate layer having a higher solubility of heavy metal impurities on the back surface of a silicon single crystal substrate than a silicon oxide film, and forming a silicon oxide film on the surface of the intermediate layer by a CVD method. Method. 前記中間層として、チタン酸化膜またはチタン膜をスパッタリング法により形成することを特徴とする請求項4に記載されたシリコン単結晶ウェーハの製造方法。   The method for producing a silicon single crystal wafer according to claim 4, wherein a titanium oxide film or a titanium film is formed as the intermediate layer by a sputtering method. 前記重金属がFeであることを特徴とする請求項4または5に記載されたシリコン単結晶ウェーハの製造方法。
6. The method for producing a silicon single crystal wafer according to claim 4, wherein the heavy metal is Fe.
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JP2009266987A (en) * 2008-04-24 2009-11-12 Shin Etsu Handotai Co Ltd Multilayer silicon semiconductor wafer and its manufacturing method
JP2009277713A (en) * 2008-05-12 2009-11-26 Shin Etsu Handotai Co Ltd Multilayer silicon semiconductor wafer and method of manufacturing the same
JP2020113580A (en) * 2019-01-08 2020-07-27 株式会社ディスコ Gettering layer formation method

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JP2002313795A (en) * 2001-04-18 2002-10-25 Shin Etsu Handotai Co Ltd Silicon single crystal wafer with high-melting-point metallic film and its manufacturing method, and method for impurity gettering in silicon single crystal

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JPH09120965A (en) * 1995-10-25 1997-05-06 Toshiba Corp Manufacture of semiconductor device
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JP2009266987A (en) * 2008-04-24 2009-11-12 Shin Etsu Handotai Co Ltd Multilayer silicon semiconductor wafer and its manufacturing method
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JP2020113580A (en) * 2019-01-08 2020-07-27 株式会社ディスコ Gettering layer formation method

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