JP2004242360A - Imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an imaging apparatus capable of performing photographing without losing a shutter chance, preventing occurrence of camera-shake and attaining consecutive shots. <P>SOLUTION: The imaging apparatus includes a primary memory (A, B, C, D) for storing image data, sequentially stores image data to e.g., the areas (A, B) of the primary memory before a release switch 11 is turned on, stores the image data after switch-on to the remaining areas (C, D) of the primary memory, records the image data stored in the primary memory to a recording medium 10, and uses a mode setting switch 13 to optionally set the areas (A, B) and (C, D) of the primary memory before and after the switch-on. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

  The present invention relates to an image pickup apparatus such as an electronic still camera that records photographed image data on a recording medium such as a so-called memory card or floppy disk.

  2. Description of the Related Art In recent years, in addition to an ordinary camera for photographing a still image using a so-called photographic film, an image captured by a solid-state imaging device such as a CCD (charge coupled device) is recorded on a magnetic recording medium such as a floppy disk. Electronic still cameras have been commercialized. There is also an electronic still camera in which the device is downsized by using, for example, a so-called IC memory card as a recording medium instead of the floppy disk.

  As a conventional electronic still camera using a so-called memory card as the recording medium, for example, there is an electronic still camera described in Patent Document 1 (electronic camera). A camera described in this publication is a digital camera provided with a recording unit for recording photographed image data, a unit for compressing image data to be recorded, and a compression mode provided for the unit. A memory for temporarily storing the image data compressed in the compression mode selected by this means, and determining whether or not the image data stored in the memory can be recorded in the recording means. A determination unit, and when the determination is negative, the image data stored in the memory is stored in the memory until the recording unit is in a recordable state. Things.

JP-A-2-203684 Microfilm of Japanese Utility Model Application No. 59-73945 (Japanese Utility Model Application No. 60-187671) JP-A-3-213069 Japanese Patent Application No. 2-333594 (JP-A-4-207478)

  By the way, when an arbitrary subject is photographed by a normal camera using the photographic film or a still image photographing camera (still camera) such as the electronic still camera, usually, the object is in the most preferable state for photographing. It is desired that the photographing be performed at the time (so-called shutter chance).

  However, in the above-described conventional still camera, an image of a subject is captured after a shutter button is pressed. Therefore, when the user of the camera determines that it is a photo opportunity and presses the shutter, there is a case where the most preferable state for photographing the subject has already passed and the camera is late. Further, there is a case where a hand shake is caused by an operation of pressing the shutter, and good photographing cannot be performed.

  Further, in the camera using the photographic film, there is a so-called continuous shooting mode in which the photographing is continuously performed only by pressing the shutter button once. In this case, too, when the shutter is pressed, the shutter chance passes. In some cases, the camera is already slow, and there is a possibility that camera shake may occur due to the operation of pressing the shutter.

  Further, in an electronic still camera using the memory card, for example, a so-called flash EEPROM is used as a memory of the memory card. Since the flash EEPROM has a low writing speed (for example, about one minute per image), the conventional electronic still camera cannot perform continuous photographing as in the continuous photographing mode.

  In view of the above, the present invention has been proposed in view of the above-described circumstances, and it is possible to perform photographing without missing a photo opportunity, prevent camera shake, and further perform an electronic still camera capable of continuous shooting. It is an object of the present invention to provide an imaging device.

  An image pickup apparatus according to the present invention has been proposed to achieve the above-described object, and in an image pickup apparatus that records image data obtained by shooting on a recording medium, a primary memory that stores the image data, Trigger means for triggering an imaging operation, control means for controlling writing of the image data to the primary memory, and setting means for setting an operation of the control means, wherein the setting means comprises the trigger means And a first area of the primary memory for storing image data before the trigger by the trigger means and an area not included in at least the first area of the primary memory for storing the image data after the trigger by the trigger means. Setting a second area, the control means writes the image data before the trigger into the first area of the primary memory according to the setting by the setting means, Image data is written in the second area of the primary memory, and the image data before the trigger operation and the image data after the trigger operation stored in the primary memory are recorded on the recording medium. I do.

  Here, it is preferable that the first area and the second area of the primary memory have the same size.

  According to the present invention, the area of the primary memory for storing the image data before the trigger operation and the area of the primary memory for storing the image data after the trigger operation are arbitrarily set. Shooting can be performed without missing, camera shake can be prevented, and continuous shooting can be performed.

  Hereinafter, an electronic still camera which is an embodiment of the imaging apparatus of the present invention will be described with reference to the drawings.

  The electronic still camera according to the first embodiment of the present invention records image data obtained by shooting on a recording medium 10 such as an IC memory card or a floppy disk, as in the basic configuration of the present invention shown in FIG. An electronic still camera that has N primary memories (three primary memories A, B, and C in the example of FIG. 1) for storing image data obtained by shooting, and triggers an imaging operation. From the trigger operation (before the release switch is turned on) by the trigger means (for example, the so-called release switch 11) to n (N ≧ n ≧ 0) primary memories of the N (3) primary memories. The image data is sequentially stored in a memory (two primary memories A and B in the example of FIG. 1), and the image data after the release switch 11 is turned on is stored in the remaining m of the N (m ≧ N ≧ N). m ≧ 0) 1 The image data is stored in a memory (in the example of FIG. 1, one primary memory C), and the image data stored in these three primary memories A, B, and C are recorded on the recording medium 10. is there.

  In FIG. 1, light from a subject enters a charge coupled device (CCD) 1 via a lens system (not shown), a diaphragm, a color filter, and the like, whereby an image signal is obtained from the CCD 1. This image signal is correlated double-sampled by a CDS (correlated double sampling) circuit 2 that performs a so-called correlated double sampling process, subjected to predetermined signal processing by a signal processing circuit 12, and then subjected to A / D (analog / analog) processing. It is converted into a digital signal (image data) by a (digital) converter 3. In this embodiment, the CCD 1 is of a frame interline (FIT) type capable of reading all pixels. The timing generator 4 generates drive pulses for driving the CCD 1 and pulses necessary for signal processing in the CDS circuit 2 and the signal processing circuit 12, and the timing generator 4 is controlled by a memory controller 8 described later. ing.

  Image data from the CCD 1 via the signal processing circuit 12 and converted into digital signals by the A / D converter 3, for example, for each frame, is stored in the primary memories A, B and C as described later. After being written once, it is recorded on the recording medium 10.

  In the embodiment of the present invention, the writing of image data to the primary memories A, B, and C is performed, for example, at the timing shown in FIG.

First, before the release switch 11 as a trigger unit for triggering an imaging operation is turned on, the image data is alternately written to the primary memory A and the primary memory B, for example. Such an operation of writing image data to the primary memories A and B is performed based on write pulses P _A and P _B from the memory controller 8. The image data output from the A / D converter 3 has a timing similar to that of the frame period F shown in FIG. Performed in units.

As described above, when image data is alternately written to the primary memories A and B, for example, as shown by a release output R in FIG. When supplied to 8, the memory controller 8 causing it to stop writing new frame image data by stopping the supply of the write pulse P _a, P _B to the primary memory a and the primary memory B, the following the image data of the frame (or field) is controlled to write to the primary memory C by the write pulse P _C. Thereafter, the memory controller 8 stops writing image data to the primary memories A, B, and C. Note that the example of FIG. 2 shows a case where the pulse rp is supplied to the memory controller 8 during the writing of the image data to the primary memory B.

That is, in the primary memory A image data D _A in the previous frame pulse rp corresponding to on of the release switch 11, as shown in W _A of FIG. 2 is stored, figure in the primary memory B image data D _B of the frame at the time of the pulse rp input as shown in 2 of W _B is stored, the image data of the frame after the pulse rp as will the primary memory C shown in W _C of FIG. 2 D _C is to be stored.

The image data D _A , D _B , and D _C written in the primary memories A, B, and C as described above are read based on a read signal from the memory controller 8, and read out from the IC memory card or the like. Is recorded on the recording medium 10.

  By the above operation, in the electronic still camera of the present embodiment, the image data before, when, and after the release switch 11 is turned on is recorded on the recording medium 10. The recording on the recording medium 10 is also performed by the memory controller 8.

  2 shows an example in which the pulse rp corresponding to the turning on of the release switch 11 is supplied during the writing of the image data to the primary memory B. It may be during the writing to the next memory A or during the blanking period bk. When the pulse rp is supplied during the blanking period bk, for example, an image for one frame before the blanking period bk and an image for two frames after the blanking period bk are stored in the primary memory. This can be recorded on the recording medium 10.

  In the example of FIG. 1, the primary memories are three types of primary memories A, B, and C. However, the number of the primary memories may be increased, and the release switch 11 is turned on. , Image data of more frames than in the first embodiment described above can be stored. Further, the electronic still camera of the present invention not only sets the shooting interval (recording interval of image data) to a continuous interval for each frame (or field) as in the example of FIG. It is also possible to make the shooting interval longer than the (field) interval and to make the shooting interval variable, and it is also possible to change this shooting interval before and after the release switch 11 is turned on. Further, the number of primary memories used before and after the release switch 11 is turned on can also be changed. Alternatively, when the image to be recorded on the recording medium 10 is, for example, only two types of primary memories, it is also possible to switch and record the primary memories A and B, or B and C, or A and C. It is.

  In order to realize this, the electronic still camera of the present invention is more specifically configured as shown in FIG. 3 according to the second embodiment. FIG. 3 shows an example in which four primary memories A, B, C, and D are used. In FIG. 3, the same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.

  That is, the electronic still camera according to the second embodiment has, in addition to the configuration of the first embodiment, the writing interval of the image data to the n primary memories before the release switch 11 is turned on. The writing interval of the image data to the m primary memories after the release switch 11 is turned on is set arbitrarily, and the number of the n primary memories before the switch is turned on and the number of the n primary memories after the switch is turned on are set. And a mode setting switch (timing setting switch) 13 as primary memory writing interval setting means for arbitrarily setting the number of the primary memories and the number of primary memories.

  In the second embodiment shown in FIG. 3, image data for each frame from the A / D converter 3 is sent to, for example, four primary memories A, B, C, and D and temporarily stored therein, as described later. Is done. These primary memories A, B, C, and D are also controlled by the memory controller 8. The memory controller 8 is constituted by a microcomputer, and sets the storage interval of the image data in each of the primary memories A, B, C, and D and the number of frames (or the number of fields) of the stored image data. By inputting signals from the mode setting switch 13 and the release switch 11, any control of the writing interval of image data to the primary memory before and after the switch on of the release switch 11 and the use before and after the switch on Arbitrarily control of the number of primary memories to be performed. The memory controller 8 controls the timing generator 4, the A / D converter 3, the recording medium 10, and the like in addition to the primary memories A, B, C, and D.

  Hereinafter, in the second embodiment, for example, a flow chart for recording image data of one frame before the switch-on of the release switch 11 and three frames after the switch-on (including at the time of the switch-on) on the recording medium 10 ( FIG. 4 shows a flowchart of the operation of the memory controller 8). In the flowchart of FIG. 4, before the release switch 11 is turned on, the primary memories A, B, and C are written at the writing interval (for example, every other frame) set by the mode setting switch 13. Writing is performed in the order of A → B → A →.

  That is, in the flowchart of FIG. 4, in step S1, the mode setting switch 13 is set to a mode in which one frame of image data is recorded before the release switch 11 is turned on (hereinafter referred to as "before release").

  After step S1, in step S2, the memory controller 8 generates a write pulse at the set interval (write interval to the primary memory) before the release set in step S1. Next, in step S3, it is determined whether or not the release switch 11 has been turned on (whether or not the pulse rp has been supplied). If it is determined that the switch has not been turned on (No), the process proceeds to step S2. Returning, when it is determined that the switch is turned on (Yes), the process proceeds to step S4.

  In step S4, it is determined whether or not the switch-on timing of the release switch 11 is in the middle of writing image data to the primary memory A (whether or not a write pulse is being output to the primary memory A). The process proceeds to step S5 if it is determined that the image data is being written to the primary memory A (Yes), and to step S7 described below if it is not (No).

  In step S5, since the switch-on timing of the release switch 11 is in the middle of writing image data to the primary memory A, if the image data of this frame is written to the primary memory A, Write is prohibited during the blanking period. That is, the memory controller 8 stops the writing performed in the order of the primary memories A → B → A →... In the blanking period. As a result, the image data of one frame before the release is stored in the primary memory B.

  In step S6 following step S5, the memory controller 8 sets the interval (write interval to the primary memory) after the release switch 11 is already turned on in step S1 (hereinafter referred to as “after release”). , A write pulse to each of the primary memories C and D is generated once. As a result, the image data of the frame after the release is stored in the primary memories A, C and D.

  In this case, the writing interval between the primary memories B and A is the writing interval before the release set in step S1, and the writing interval between the primary memories A, C and D is the setting interval after the release.

  Thereafter, the image data stored in each of the primary memories A, B, C, and D is sent to the recording medium 10 for recording in step S12.

  Further, when the result of the determination in step S4 is NO (No), the process proceeds to step S7. In step S7, the switch-on timing of the release switch 11 is changed to the timing of the write pulse to the primary memory A and the primary memory B. A determination is made as to whether it is between. If it is determined in step S7 that the switch-on timing is between the write pulses to the primary memories A and B (Yes), the process proceeds to step S8. If it is determined that the switch-on timing is not (No), a step described later is performed. Proceed to S10.

  If the determination in step S7 is Yes and the process proceeds to step S8, the memory controller 8 immediately stops writing in the order of the primary memories A → B → A →... In step S8. As a result, the image data of one frame before the release is stored in the primary memory A.

  In step S9 following step S8, the write pulse from the memory controller 8 to the primary memories C and D is set at the set interval after the release already set in step S1 (write interval to the primary memory). Occurs once each. As a result, the image data of the frame after the release is stored in the primary memories B, C, and D.

  In this case, the writing interval between the primary memories A, B, C, and D is the writing interval after the release set in step S41.

  Thereafter, the image data stored in each of the primary memories A, B, C, and D is sent to the recording medium 10 and recorded in step S12.

  If it is determined that the answer is NO (No) in step S7 and the process proceeds to step S10, the switch-on timing of the release switch 11 is determined in step S10 while image data is being written to the primary memory B. Therefore, if the image data of this frame is written in the primary memory B, the writing is prohibited in the next blanking period. That is, the memory controller 8 stops the writing performed in the order of the primary memories A → B → A →... In the blanking period. As a result, the image data of one frame before the release is stored in the primary memory A.

  In step S11 subsequent to step S10, the write pulse from the memory controller 8 to the primary memories C and D is set at the set interval after the release already set in step S1 (write interval to the primary memory). Occurs once each. As a result, the image data of the frame after the release is stored in the primary memories B, C and D.

  In this case, the writing interval between the primary memories A and B is the writing interval before the release set in step S1, and the writing interval between the primary memories B and C and D is the setting interval after the release.

  Thereafter, the image data stored in each of the primary memories A, B, C, and D is sent to the recording medium 10 for recording in step S12.

  In the second embodiment, for example, a flowchart for recording image data of two frames before the switch-on of the release switch 11 and two frames after the switch-on (including at the time of switch-on) on the recording medium 10 will be described. As shown in FIG. In the flowchart of FIG. 5, before the release switch 11 is turned on, the primary memories A, B, and C are written at the writing interval (for example, every other frame) set by the mode setting switch 13. Writing is performed in the order of A → B → C → A →.

  That is, in the flowchart of FIG. 5, in step S41, the mode setting switch 13 is set to a mode in which image data for two frames is recorded before the release switch 11 is turned on (before release).

  After step S41, in step S42, the memory controller 8 generates a write pulse at the set interval (write interval to the primary memory) before the release set in step S41. Next, in step S43, it is determined whether or not the release switch 11 has been turned on (whether or not the pulse rp has been supplied). If it is determined that the switch has not been turned on (No), the process proceeds to step S42. Returning, when it is determined that the switch is turned on (Yes), the process proceeds to step S44.

  In step S44, it is determined whether or not the switch-on timing of the release switch 11 is in the middle of writing image data to the primary memory A (whether or not a write pulse is being output to the primary memory A). The process proceeds to step S45 if it is determined that the image data is being written to the primary memory A (Yes), and to step S47 described later if it is not (No).

  In step S45, the switch-on timing of the release switch 11 is in the middle of writing image data to the primary memory A, so if the image data of this frame is written to the primary memory A, Write is prohibited during the blanking period. That is, the memory controller 8 stops the writing performed in the order of the primary memories A → B → C → A →... In the blanking period. As a result, the image data of the two frames before the release is stored in the primary memories B and C.

  In step S46 subsequent to step S45, the memory controller 8 sends the first data to the first memory at a set interval (write interval to the primary memory) after the release switch 11 is turned on (after release) already set in step S41. A write pulse to the next memory D is generated once. As a result, the image data of the frame after the release is stored in the primary memory A and the primary memory D.

  In this case, the writing interval between the primary memories B, C, and A is the writing interval before the release set in step S41, and the writing interval between the primary memories A and D is the setting interval after the release. .

  Thereafter, the image data stored in each of the primary memories A, B, C, and D is sent to the recording medium 10 and recorded in step S61.

  When it is determined that the answer is NO (No) in the step S44 and the process proceeds to the step S47, the switch-on timing of the release switch 11 is changed to the timing of the write pulse to the primary memory A and the primary memory B in the step S47. A determination is made as to whether it is between. If it is determined in step S47 that the switch-on timing is between the write pulses to the primary memories A and B (Yes), the process proceeds to step S48, and if it is not (No), a step described later is performed. Proceed to S50.

  If the determination in step S47 is Yes and the process proceeds to step S48, in step S48, the memory controller 8 immediately stops writing in the primary memory A → B → C → A →. Let it. As a result, the image data of the two frames before the release is stored in the primary memories A and C.

  In step S49 following step S48, the write pulse from the memory controller 8 to the primary memories B and D is set at the set interval after the release already set in step S41 (write interval to the primary memory). Occurs once each. As a result, the image data of the frame after the release is stored in the primary memory B and the primary memory D.

  In this case, the writing interval between the primary memories A and C is the writing interval before the release set in step S41, and the writing interval between the primary memories A, B and D is the setting interval after the release.

  Thereafter, the image data stored in each of the primary memories A, B, C, and D is sent to the recording medium 10 and recorded in step S61.

  If the determination in step S47 is negative (No), the process proceeds to step S50. In step S50, the switch-on timing of the release switch 11 determines whether image data is being written to the primary memory B. It is determined whether or not the image data is being written to the primary memory B (Yes or No) (step S51). If the determination is negative (No), the process proceeds to step S53 described later.

  In step S51, since the switch-on timing of the release switch 11 is in the middle of writing image data to the primary memory B, if the image data of this frame is written to the primary memory B, the next Write is prohibited during the blanking period. That is, the memory controller 8 stops the writing performed in the order of the primary memories A → B → C → A →... In the blanking period. As a result, the image data of the two frames before the release is stored in the primary memories A and C.

  In step S52 subsequent to step S51, the write pulse from the memory controller 8 to the primary memory D is set to 1 at the set interval after the release already set in step S41 (write interval to the primary memory). Occurs several times. As a result, the image data of the frame after the release is stored in the primary memory B and the primary memory D.

  In this case, the writing interval between the primary memories A, C, and B is the writing interval before the release set in step S41, and the writing interval between the primary memories B and D is the setting interval after the release. .

  Thereafter, the image data stored in each of the primary memories A, B, C, and D is sent to the recording medium 10 and recorded in step S61.

  Here, for example, the writing of the image data to the primary memories A, B, C, and D in the second embodiment in the case where it is determined to be Yes in the step S50 has a timing as shown in FIG. . In FIG. 6, the same reference numerals as those in FIG. 2 are used.

That is, in the timing chart of FIG. 6, first, the writing operation of the image data into the primary memories A, B and C before the release switch 11 is turned on is performed by the writing interval Sb from the memory controller 8 before the release. write pulse _{P a, P B,} is performed based on the _{P C.}

As described above, when image data is sequentially written to the primary memories A, B, and C at the writing interval Sb before release, for example, a pulse rp corresponding to the switch-on of the release switch 11 is sent to the memory controller 8. Once supplied, the memory controller 8 causing it to stop writing of the write pulse P _a, P _B, the new frame image data by stopping the supply of P _C to the primary memory a and B and C, and the following the image data of the frame (or field) is controlled to write to the primary memory D by the write pulse P _D of the write interval Sa after release. Thereafter, the memory controller 8 stops writing image data to the primary memories A, B, C, and D.

That is, the image data D _A in the previous frame pulse rp in the primary memory A corresponding to on of the release switch 11, as shown in W _A of FIG. 6 is stored in the pre-release of a writing interval Sb, the above primary memory B image data D _B of the frame at the time of the pulse rp input as shown in the W _B of FIG. 6 are stored in the pre-release of a writing interval Sb, the above primary memory C of FIG. 6 W _C image data D _C of the previous frame of the pulse rp as shown in is stored in the pre-release of a writing interval Sb, the above primary memory D of the pulse rp as shown in W _D in FIG. 6 The image data DD of the _succeeding frame is stored at the writing interval Sa after the release.

The image data D _A , D _B , D _C , and D _D written to the respective primary memories A, B, and C as described above are read based on a read signal from the memory controller 8, and the IC data is read. It is recorded on a recording medium 10 such as a memory card.

  Returning to FIG. 5 again, if the determination in step S50 is negative (No) and the process proceeds to step S53, the switch-on timing of the release switch 11 is changed to the primary memory B and the primary memory C in step S53. It is determined whether or not it is during the write pulse to the. If it is determined in step S53 that the switch-on timing is between the write pulses to the primary memories B and C (Yes), the process proceeds to step S54, and if it is not (No), a step described later is performed. Proceed to S56.

  If the determination in step S53 is Yes and the process proceeds to step S54, in step S54, the memory controller 8 immediately stops the writing performed in the order of the primary memories A → B → C → A →. Let it. As a result, the image data of the two frames before the release is stored in the primary memories A and B.

  In the step S55 following the step S54, the write pulse from the memory controller 8 to the primary memories C and D is set at the set interval after the release already set in the step S41 (write interval to the primary memory). Occurs once each. As a result, the image data of the frame after the release is stored in the primary memory C and the primary memory D.

  In this case, the writing interval between the primary memories A and B is the writing interval before the release set in step S41, and the writing interval between the primary memories B and C and D is the setting interval after the release.

  Thereafter, the image data stored in each of the primary memories A, B, C, and D is sent to the recording medium 10 and recorded in step S61.

  If it is determined in step S53 that the image data is being written to the primary memory C, the process proceeds to step S56. It is determined whether or not image data is being written to the primary memory C (Yes) (step S58). If the determination is negative (No), the process proceeds to step S59 described below.

  In the step S57, since the switch-on timing of the release switch 11 is in the middle of writing image data in the primary memory C, if the image data of this frame is written in the primary memory C, the next Write is prohibited during the blanking period. That is, the memory controller 8 stops the writing performed in the order of the primary memories A → B → C → A →... In the blanking period. As a result, the image data of the frame before the release is stored in the primary memories A and B.

  In step S58 subsequent to step S57, the write pulse from the memory controller 8 to the primary memory D is set to 1 at the set interval after the release already set in step S41 (write interval to the primary memory). Occurs several times. As a result, the image data of the frame after the release is stored in the primary memory C and the primary memory D.

  In this case, the writing interval between the primary memories A, B, and C is the writing interval before the release set in step S41, and the writing interval between the primary memories C and D is the setting interval after the release. .

  Thereafter, the image data stored in each of the primary memories A, B, C, and D is sent to the recording medium 10 and recorded in step S61.

  If the determination at step S56 is negative (No) and the process proceeds to step S59, at step S59, the memory controller 8 immediately executes the primary memory A → B → C → A →. Stop the written write. As a result, the image data of the two frames before the release is stored in the primary memories B and C.

  In step S60 following step S59, the write pulse from the memory controller 8 to the primary memories A and D is set at the set interval after the release already set in step S41 (write interval to the primary memory). Occurs once each. As a result, the image data of the frame after the release is stored in the primary memory A and the primary memory D.

  In this case, the writing interval between the primary memories B and C is the writing interval before the release set in step S41, and the writing interval between the primary memories C and A and D is the setting interval after the release.

  Thereafter, the image data stored in each of the primary memories A, B, C, and D is sent to the recording medium 10 and recorded in step S61.

  Further, in the second embodiment, for example, FIG. 7 shows a flowchart when the image data of each frame is recorded on the recording medium 10 only before the release switch 11 is turned on. In the flowchart of FIG. 7, before the release switch 11 is turned on, the writing interval (for example, every other frame) set by the mode setting switch 13 is, for example, the above-described example of FIG. .. Are written alternately in the order of A → B → A →..., And the three primary memories A, B, When writing C sequentially in the order of A → B → C → A →... And writing the four primary memories A, B, C, D in the order of A → B → C → D → A. Writing is considered. In the example of the flowchart of FIG. 7, the case where the above four primary memories A, B, C, and D are sequentially written in the order of A → B → C → D → A →.

  That is, in the flowchart of FIG. 7, in step S21, the mode setting switch 13 is set to a mode for recording only the image of the frame before release.

  After step S21, in step S22, the writing from the memory controller 8 to each of the primary memories A, B, C, and D is performed at the set interval before the release set in step S21 (the writing interval to the primary memory). A pulse is generated. Next, in step S23, it is determined whether or not the release switch 11 has been turned on (whether or not the pulse rp has been supplied). If it is determined that the switch has not been turned on (No), the process proceeds to step S22. Returning, if it is determined that the switch has been turned on (Yes), the process proceeds to step S24.

  In step S24, it is determined whether the switch-on timing of the release switch 11 is in the middle of writing image data in any of the primary memories A, B, C, and D (primary memories A, B, and C). , D is being output), and if it is determined that image data is being written to any of the primary memories (Yes), the process proceeds to step S25. If it is determined that no (No), the process proceeds to step S26 described below.

  In step S25, since the switch-on timing of the release switch 11 is in the middle of writing image data to any of the primary memories, if the image data of this frame has been written to the primary memory, , Writing is prohibited in the next blanking period. That is, the memory controller 8 stops the writing performed in the order of the primary memories A → B → C → D → A →... In the blanking period. As a result, the image data of each frame before the release is stored in each primary memory at the write interval set in step S21.

  Further, when it is determined to be no (No) in step S24 and the process proceeds to step S26, in step S26, the memory controller 8 immediately proceeds to the primary memory A → B → C → D → A →. Stops the writing that was performed in. As a result, the image data of each frame before the release is stored in each primary memory at the write interval set in step S21.

  Thereafter, the image data stored in each of the primary memories A, B, C, and D is sent to the recording medium 10 and recorded in step S27.

  Further, FIG. 8 shows a flowchart for recording the image data of each frame on the recording medium 10 only after the release switch 11 is turned on in the second embodiment. When recording is performed only after the release, it is not necessary to store the image data in each primary memory before the release. Of course, control may be performed so that the image data is stored in each primary memory before the release. The primary memory in which the image data of each frame after release is stored may be one, two, three, or four, but in the example of the flowchart of FIG. The case of writing to the next memory is taken as an example.

  That is, in the flowchart of FIG. 8, in step S31, the mode setting switch 13 is set to a mode for recording only the image of the released frame.

  After step S31, in step S32, it is determined whether or not the release switch 11 has been turned on (whether or not the pulse rp has been supplied). If it is determined that the switch has not been turned on (No), the process proceeds to step S32. The determination in step S32 is repeated, and if it is determined that the switch is turned on (Yes), the process proceeds to step S33.

  In step S33, the image data of each frame after the release is stored in each primary memory at the writing interval set in step S31. Thereafter, the image data stored in each of the primary memories A, B, C, and D is sent to the recording medium 10 and recorded in step S34.

  As described above, according to the electronic still camera of each embodiment of the present invention, by having a plurality of primary memories, the image data before and after the release can be stored, so that the photographing can be performed without missing a photo opportunity. If image data at the time of shutter-on is not used, camera shake can also be prevented. Further, the photographing interval can be freely set, and even if the recording medium 10 has a low writing speed, such as a flash memory, the same effect as continuous shooting can be obtained.

  Further, in each of the above-described embodiments, the signal processing circuit 12 is provided in the preceding stage of the A / D converter 3. For example, as in the third embodiment shown in FIG. 9 corresponding to the configuration of FIG. It is also possible to provide the signal processing circuit 22 after the primary memory.

  Further, in each embodiment, the image data recorded on the recording medium 10 may be, for example, compressed data. In this case, for example, a data compression circuit is provided at a stage preceding the recording medium 10. Thus, the number of images recorded on the recording medium 10 can be increased.

  Although the CCD 1 in each of the above-described embodiments is of a frame interline type (FIT type), for example, an interline type CCD may be used to process and store a field image. The CCD may be a single plate or a multi-plate such as two or three plates (the shutter function is an electronic shutter).

  The signal processing circuit 12 in FIGS. 1 and 3 performs analog processing such as gamma correction and white balance when a camera unit (not shown) is configured as an analog camera. Further, in the case as shown in FIG. 9, the signal processing circuit 22 may digitally perform the above processing.

  Therefore, according to the electronic still camera according to the embodiment of the present invention, the electronic still camera has N primary memories each capable of storing captured image data, and these N primary memories are provided before the trigger operation. By storing the image data in the n primary memories, the image before the trigger operation can be taken out later, so that an image that is not delayed by a photo opportunity can be obtained. Further, by storing the image data after the trigger operation in the remaining m primary memories out of N, an image corresponding to continuous shooting can be taken out.

  As is apparent from the above description, the electronic still camera according to the embodiment of the present invention is an electronic still camera that records image data obtained by shooting on a recording medium, and the image obtained by shooting It has N primary memories for storing data in units of frames or fields, for example. Before the trigger operation by a trigger means (for example, a so-called release switch) for triggering an imaging operation, n (N) of the N primary memories is used. The image data is sequentially stored in N ≧ n ≧ 0 primary memories, and the image data after the trigger operation is stored in the remaining m (N ≧ m ≧ 0) primary memories out of the above N primary memories. All or some of the image data stored and stored in the N primary memories are recorded on the recording medium.

  In the electronic still camera according to the embodiment of the present invention, the writing interval of the image data to the n primary memories before the trigger operation and the m primary memories after the trigger operation are set. A primary memory write interval setting means for arbitrarily setting the image data write interval is provided.

  Further, in the electronic still camera according to the embodiment of the present invention, the number of the n primary memories before the trigger operation and the number of the m primary memories after the trigger operation are arbitrarily set. Primary memory number setting means for performing the setting.

  That is, an electronic still camera according to an embodiment of the present invention includes a solid-state imaging device having an electronic shutter function and a plurality of primary memories, and image data from the solid-state imaging device is provided at specified intervals. The image data is sequentially recorded in the primary memory, and the image data before and after the release switch is pressed are stored in the primary memory. The image signal processing in the electronic still camera is performed in a case where the image signal from the solid-state imaging device is analog-converted before A / D (analog / digital) conversion, and the case where the image signal from the solid-state imaging device is converted to A A case where the conversion is performed before the writing to the primary memory after the / D conversion and a case where the image signal from the solid-state imaging device is A / D converted and written to the primary memory, and then the image data read from the primary memory It is conceivable that this is done for

  According to the electronic still camera according to the embodiment of the present invention, the electronic still camera has N primary memories for storing image data obtained by photographing, and N primary memories before the trigger operation for triggering the imaging operation. The image data is sequentially stored in the n primary memories, and the image data after the trigger operation is stored in the remaining m primary memories out of the N, and is stored in the N primary memories. The image data is recorded on a recording medium, and the interval between writing of image data to the n primary memories before the trigger operation and the interval of writing image data to the m primary memories after the trigger operation are determined. Is set arbitrarily, and the number of n primary memories before the trigger operation and the number of m primary memories after the trigger operation are arbitrarily set, so that a photo opportunity is not missed. You can shoot , Also can prevent camera shake, it is possible further continuous shooting.

FIG. 1 is a block circuit diagram illustrating a basic configuration of an electronic still camera according to a first embodiment of the present invention. 6 is a timing chart illustrating an example of writing to a primary memory in the electronic still camera according to the first embodiment. FIG. 9 is a block circuit diagram illustrating a specific configuration of an electronic still camera according to a second embodiment of the present invention. 9 is a flowchart for explaining an operation when one frame is recorded before release. 6 is a flowchart for explaining an operation when two frames are recorded before a release. 6 is a timing chart showing an example of writing to a primary memory in the flowchart of FIG. 9 is a flowchart illustrating an operation when recording is performed only before a release. 9 is a flowchart illustrating an operation when recording is performed only after a release. FIG. 11 is a block circuit diagram illustrating a specific configuration of an electronic still camera according to a third embodiment of the present invention.

Explanation of reference numerals

1 CCD, 2 CDS circuit, 3 A / D converter, 4 timing generator, 8 memory controller, 10 recording medium, 11 release switch, 12, 22 signal processing circuit, 13 mode setting switch, A, B, C, D primary memory

Claims (2)

In an imaging device that records image data obtained by shooting on a recording medium,
A primary memory for storing the image data,
Trigger means for triggering an imaging operation;
Control means for controlling writing of the image data to the primary memory;
Setting means for setting the operation of the control means,
The setting means includes a first area of the primary memory for storing image data before the trigger by the trigger means, and at least a first area of the primary memory for storing image data after the trigger by the trigger means. Setting a second area including an area not included in the area,
The control means writes the image data before the trigger in the first area of the primary memory and writes the image data after the trigger in the second area of the primary memory in accordance with the setting by the setting means. An image pickup apparatus, wherein the image data before the trigger operation and the image data after the trigger operation, which are written and stored in the primary memory, are recorded on the recording medium. 2. The imaging device according to claim 1, wherein the first area and the second area of the primary memory have the same size.

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