JP2003163370A - Method of manufacturing semiconductor crystal - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a high-quality semiconductor crystal independent of a base substrate. <P>SOLUTION: A seed layer which consists of a GaN layer 103 (a second layer of the seed layer) and an AlN buffer layer 102 (a first layer of the seed layer) is formed on a sapphire substrate 101. The surface of the seed layer is etched into a stripe geometry having a stripe width (the seed layer width S) nearly equal to 5 μm, a wing width W nearly equal to 15 μm, and a depth of about 0.5 μm. After the etching, mesas having a nearly rectangular cross-sectional shape are formed, and the remainder of erosion having the multilayer seed layer in their flat top parts are disposed at a cycle L nearly equal to 20 μm, exposing part of the sapphire substrate 101 in a valley of each wing. The ratio S/W of the seed width to the wing is preferably about 1/3 to 1/5. Then, a semiconductor crystal A is grown to 50 μm or larger, and then separated from the base substrate to obtain a high-quality monocrystal independent of the base substrate. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a method of growing a semiconductor crystal made of a group nitride compound semiconductor to obtain a good quality semiconductor crystal independent of a base substrate. Further, the present invention can be applied to manufacture of crystal growth substrates for various semiconductor elements represented by LEDs and the like.

[0002]

2. Description of the Related Art As a conventional technique for growing a semiconductor crystal made of a group III nitride compound semiconductor on an underlying substrate to obtain a semiconductor crystal independent of the underlying substrate, for example, Japanese Patent Laid-Open Publication No. Hei 7-202265. : Method of manufacturing group III nitride semiconductor ", or by growing a thick film of GaN (target semiconductor crystal) on a sapphire substrate by HVPE method, laser irradiation, polishing, etc. A method of removing the sapphire substrate is generally known.

[0003]

However, in these conventional techniques, the underlying substrate (eg, sapphire, etc.) is used.
Due to the difference in the coefficient of thermal expansion and the difference in the lattice constant between the group III nitride compound semiconductor and the group III nitride compound semiconductor, stress is applied to the target single crystal (eg GaN) when the temperature is lowered after the crystal growth process is completed. However, there is a problem that many dislocations and cracks occur in the target single crystal.

For example, in the case of using the conventional technique as described above,
When a nitride semiconductor such as gallium nitride (GaN) is crystal-grown on a base substrate formed of sapphire or silicon (Si) and then cooled to room temperature, it causes a difference in thermal expansion coefficient or a difference in lattice constant. A large number of dislocations and cracks are formed in the nitride semiconductor layer due to the stress.

As described above, when a large number of dislocations and cracks are formed in the growth layer (nitride semiconductor layer), a large number of lattice defects, dislocations, deformations, cracks and the like are generated in the device when a device is formed on the growth layer. And cause deterioration of device characteristics. In addition, when the base substrate is removed and an independent substrate (crystal) is obtained by leaving only the growth layer, a large-area substrate cannot be obtained due to the above-mentioned effects of dislocations and cracks. Further, in the case of thick film growth, problems such as cracking of a target single crystal even during growth and partial peeling of the small piece are very likely to occur.

The present invention has been made to solve the above problems, and an object thereof is to obtain a high-quality semiconductor crystal independent of a base substrate.

[0007]

Means for Solving the Problems, and Functions and Effects of the Invention In order to solve the above problems, the following means are effective. That is, the first means is to grow a semiconductor crystal made of a group III nitride compound semiconductor on a base substrate and obtain a good quality semiconductor crystal A independent of the base substrate. Alternatively, a seed laminating step of laminating a plurality of seed layers, and a part of the surface of the base substrate on which the seed layer is formed are chemically or physically eroded to form the seed layer on the base substrate. The erosion debris part forming step of partially or dispersively remaining, and the exposed surface of the erosion debris part of the seed layer are used as the first crystal growth faces where the semiconductor crystal A starts crystal growth, and these crystal growth faces are mutually formed by crystal growth. A crystal growth step of growing the semiconductor crystal A until it is connected and grown to a series of substantially flat surfaces, and a separation step of separating the semiconductor crystal A and the base substrate by breaking the erosion debris portion are provided. That is.

However, in general, the "group III nitride compound semiconductor" referred to here is binary, ternary, or quaternary "Al.
_{1-xy Ga y In x N} ; 0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦
1-x−y ≦ 1 ”, a semiconductor having an arbitrary mixed crystal ratio represented by the general formula, and a semiconductor to which a p-type or n-type impurity is added is also referred to as“ group III nitride in the present specification ”. It is in the category of "compound semiconductors". In addition, the group III element (Al,
At least a part of Ga, In) is replaced with boron (B), thallium (Tl), or at least a part of nitrogen (N) is phosphorus (P), arsenic (As), antimony (Sb). ), A semiconductor substituted with bismuth (Bi), and the like are also included in the category of “group III nitride compound semiconductor” in the present specification. Further, as the p-type impurities, for example, magnesium (Mg), calcium (Ca), or the like can be added. Also, the above n
As the type impurities, for example, silicon (Si), sulfur (S), selenium (Se), tellurium (Te), germanium (Ge), or the like can be added. Also,
Two or more of these impurities may be added at the same time, or both types (p-type and n-type) may be added at the same time.

As the material of the above-mentioned base substrate, sapphire, spinel, manganese oxide, lithium gallium oxide (LiGaO ₂ ), molybdenum sulfide (MoS), silicon (Si), silicon carbide (SiC), AlN, G.
aAs, InP, GaP, MgO, ZnO, or MgA
1 ₂ O ₄ etc. can be used. That is, as a material for these underlying substrates, a known or arbitrary crystal growth substrate useful for crystal growth of a Group III nitride compound semiconductor can be used.

The material of the base substrate is the reaction with GaN,
From the viewpoint of difference in thermal expansion coefficient and stability at high temperature, it is more desirable to select sapphire.

On a base substrate having many erosion debris
When the intended semiconductor crystal A made of a group II nitride compound is grown, the base substrate and the semiconductor crystal A are connected only by the erosion debris part. For this reason, if the thickness of the semiconductor crystal A is made sufficiently large, the internal stress or the external stress tends to act concentratedly on the erosion debris portion. As a result, in particular, these stresses act as a shear stress or the like for the erosion debris portion, and when this stress becomes large, the erosion debris portion is broken.

That is, by utilizing this stress in accordance with the above-mentioned means of the present invention, it becomes possible to easily separate (separate) the base substrate and the semiconductor crystal A. By this means, a single crystal (semiconductor crystal A) independent of the underlying substrate can be obtained.

Further, by forming the erosion debris portion as described above and growing it laterally, strain due to the difference in lattice constant between the base substrate and the semiconductor crystal A is less likely to occur, and "the base substrate and the semiconductor crystal A are The stress due to the difference in lattice constant between "is relaxed. Therefore, when the desired semiconductor crystal A grows, unnecessary stress acting on the growing semiconductor crystal A is suppressed, and the density of dislocations and cracks is reduced.

The "a large number of erosion debris parts" may be "a large number" at least as viewed from a vertical cross section as shown in FIG. 1, for example. It doesn't matter. Therefore, for example, a one-dimensionally connected rectangular wave shape or a steep sin wave shape,
Alternatively, it is possible to obtain the action and effect of the present invention by forming a stripe (erosion debris portion) plane shape in a spiral shape or the like. Further, not limited to the stripe shape, if the plane shape of the above-mentioned erosion debris portion is formed in any island shape such as a substantially circular shape, a substantially elliptical shape, a substantially polygonal shape, or a substantially regular polygonal shape, it is needless to say that It is possible to obtain the action and effect of the invention.

Further, when the base substrate and the semiconductor crystal A are separated (separated), a part of the semiconductor crystal A may remain on the base substrate side, or a part of the base substrate on the semiconductor crystal A side. (Example: Broken wreckage of erosion debris) may remain. That is, the above-described separation step is not premised (a necessary condition) on the complete separation of the respective materials so that some of the debris of these materials are eliminated.

In a second means, the film thickness of the semiconductor crystal A is 50 μm in the crystal growth step of the first means.
That is all. The thickness of the semiconductor crystal A for the purpose of crystal growth is preferably about 50 μm or more. The thicker the thickness, the stronger the strength of the semiconductor crystal A, and the easier the above-mentioned shear stress is to be concentrated on the erosion debris part. Become. Further, due to these effects, the peeling phenomenon may occur even in a high temperature state such as during crystal growth based on the lattice constant difference, and therefore, after the peeling, almost all the stress due to the difference in thermal expansion coefficient acts on the semiconductor crystal A. Therefore, dislocations and cracks do not occur, and a high-quality semiconductor crystal A (example: GaN single crystal) can be obtained.

Further, a third means is the above-mentioned first or second.
In the above means, by cooling or heating the semiconductor crystal A and the base substrate, a stress based on the difference in thermal expansion coefficient between the semiconductor crystal A and the base substrate is generated, and the erosion debris part is broken by utilizing this stress. That is. That is, the break (peeling) may be caused by stress (shear stress) based on the difference in thermal expansion coefficient between the semiconductor crystal A and the underlying substrate. Further, according to this means, particularly, the film thickness of the semiconductor crystal A is set to 5
When the thickness is set to 0 μm or more, the semiconductor crystal A and the base substrate can be reliably broken while maintaining the crystallinity of the semiconductor crystal A high.

The fourth means is the above first to third means.
In any one of the means, the seed layer is a group III nitride compound semiconductor composed of a single layer or multiple layers.

A fifth means is that in the fourth means, the seed layer or the uppermost layer of the seed layer is formed of gallium nitride (GaN). As a specific composition of the semiconductor crystal A, gallium nitride (GaN), which is optimal and very useful as a semiconductor crystal growth substrate, is considered to have the highest utility value in the industry so far. Therefore, in such a case, by forming the seed layer or the uppermost layer of the seed layer from gallium nitride (GaN), the crystal growth of the target semiconductor crystal A (GaN single crystal) can be performed best. . However, since AlGaN, AlGaInN, and the like also have great industrial utility value, they may be selected as a more specific composition of the semiconductor crystal layer A. Also in these cases, a semiconductor (group III nitride compound semiconductor) having a composition relatively close to the composition of the target single crystal (semiconductor crystal layer A) or a semiconductor having substantially the same composition is used as the seed layer or the seed layer. It is desirable to form the upper layer.

A sixth means is that in the fourth means, the seed layer or the lowermost layer of the seed layer is formed of aluminum nitride (AlN). This makes it possible to form a so-called buffer layer from aluminum nitride (AlN), so that this buffer layer (AlN)
It is possible to obtain a known action based on the stacking of. That is, it is easy or possible to improve the crystallinity of the target semiconductor crystal layer A by a well-known action principle such as the stress acting on the target semiconductor crystal layer A due to the difference in lattice constant can be relaxed.

Further, according to this means, the stress between the AlN buffer layer and the base substrate can be further increased, so that the separation of the base substrate can be further facilitated. Further, in order to sufficiently obtain the above-described effects, for example, a seed layer is formed from two layers, the lower layer thereof is an AlN buffer layer (seed layer first layer), and the upper layer thereof is a GaN layer (seed layer second layer). ), The layer structure of the multiple seed layers is very effective. According to this combination, both the actions and effects of the above-mentioned fifth and sixth means can be satisfactorily obtained at the same time.

The seventh means is the above first to third means.
In any one of the means, the seed layer, or the uppermost layer or the lowermost layer of the seed layer is formed of zinc oxide (ZnO) or titanium nitride (TiN _x ). Compounds such as these compounds that can serve as a buffer layer when epitaxially growing a Group III nitride compound semiconductor on a heterogeneous substrate are used as the uppermost layer or the lowermost layer of the single-layer seed layer or the multiple-layer seed layer of the present invention. be able to.

The eighth means is the above first to seventh means.
In any one of the means, the arrangement interval of the erosion debris parts is set to 1 μm or more and 50 μm or less in the erosion debris part formation step. More preferably, the arrangement interval of the erosion debris portion is 5 to 3 although it depends on the conditions for crystal growth.
About 0 μm is preferable. However, this arrangement interval means the distance between the center points of the erosion debris parts that are close to each other.

By this means, it becomes possible to cover the upper part of the valley between the erosion debris parts with the semiconductor crystal A. On the other hand, if this value becomes too large, the semiconductor crystal A cannot be surely covered over the valley between the erosion debris portions, and a crystal having a uniform crystallinity and good quality (semiconductor crystal A) cannot be obtained. Alternatively, if this value is too large, the deviation of the crystal orientation becomes remarkable, which is not desirable.

Further, the lateral thickness, width or diameter of the crown of the erosion debris portion is S, and the above-mentioned arrangement interval (arrangement period)
Is L, the S / L value is preferably about 1/4 to 1/6. With such a setting, the lateral growth (ELO) of the desired semiconductor crystal A is sufficiently promoted, so that a high quality single crystal can be obtained. Hereinafter, the distance between the side walls of the erosion debris portions facing each other may be W (= LS), and the region between the side walls (that is, the eroded recess and the region above it) may be referred to as a wing. In addition, hereinafter, the width S may be referred to as a seed width. Therefore, the ratio S / W of the seed width to the wings is preferably about 1/3 to 1/5.

Further, it is more desirable to carry out the above-mentioned erosion treatment so that the erosion debris parts are arranged at substantially equal intervals or at substantially constant intervals. As a result, the growth conditions for the lateral growth become substantially uniform, and the quality of the crystallinity and the growth film thickness are less likely to occur. In addition, since the local variation is less likely to occur in the time until the upper part of the valley between the erosion debris parts is completely covered with the semiconductor crystal A, for example, from the crystal growth method with a slow crystal growth rate, the crystal growth is performed. When the crystal growth method is changed to a high-speed crystal growth method on the way, it becomes easy to accurately, early, or uniquely determine the time. Further, since the above-mentioned shear stress can be distributed to each erosion debris portion substantially evenly by such a method, all the erosion debris portions are evenly fractured, and the base substrate and the semiconductor crystal A are separated. Can be surely implemented.

Therefore, for example, the erosion debris portion may be formed in a stripe-shaped mesa shape and arranged in the same direction and at equal intervals. The formation of such an erosion debris portion is advantageous in light of the current state of the art of general etching processing, such as easy and reliable implementation. At this time, the direction of the mesa (erosion debris part) is <1-of the semiconductor crystal.
100> or <11-20> is sufficient.

It is also effective to form an erosion debris portion on a lattice point of a two-dimensional triangular lattice whose one side is a substantially equilateral triangle having a size of 0.1 μm or more. According to this method, the contact area with the base substrate can be made smaller, so that the number of dislocations can be reliably reduced and the base substrate can be easily separated based on the above-described action.

It is also effective to form the horizontal cross-sectional shape of the erosion debris portion into a substantially equilateral triangle, a substantially regular hexagon, a substantially circle, or a quadrangle. By this method, the direction of the crystal axis of the crystal formed from the group III nitride compound semiconductor can be easily aligned in each part, or the horizontal length (thickness) of the erosion debris part with respect to any horizontal direction ) Can be restricted substantially uniformly, the number of dislocations can be suppressed. In particular, a regular hexagon and a regular triangle are more preferable because they easily match the crystal structure of the semiconductor crystal. Further, there is a merit in light of the current state of the art of general etching processing that a circle or a quadrangle is easy to form in terms of manufacturing technology.

Further, a ninth means of the present invention is to erode the above-mentioned base substrate by 0.01 μm or more. Further, if a part of the underlying substrate is eroded by the above erosion treatment (etching process, etc.), in the subsequent crystal growth step,
It becomes easier to flatten the surface (crystal growth surface) of the target semiconductor crystal A, and it becomes easier to form a “cavity” on the side of the erosion debris part. The larger the "cavity" is formed, the easier the stress (shear stress) is concentrated on the erosion debris portion.

The tenth means is, in the erosion debris forming step of any one of the first to ninth means,
The thickness, width or diameter in the lateral direction of the erosion debris part is to be 0.1 μm or more and 20 μm or less. More preferably,
Although depending on the crystal growth implementation conditions, the lateral thickness, width, or diameter of the erosion debris portion is preferably about 0.5 to 10 μm. If this thickness is too thick, the influence of the stress acting on the semiconductor crystal A based on the difference in lattice constant increases, and the semiconductor crystal A
The number of dislocations in is likely to increase. On the other hand, if it is too thin, it becomes difficult to form the erosion debris itself, or the crystal growth rate b at the crown of the erosion debris becomes slow, which is not desirable.

Further, when the erosion debris portion is broken by stress (shear stress or the like), the lateral thickness of the erosion debris portion,
If the width or the diameter is too large, the contact area with the base substrate becomes large, so that a portion that is not reliably broken is likely to occur, which is not desirable. Further, the magnitude of the influence of the stress acting on the semiconductor crystal A based on the difference in the lattice constant depends not only on the lateral thickness (length) of the erosion debris part but also on the arrangement interval of the erosion debris part and the like. To do. If these setting ranges are inappropriate, the influence of stress based on the difference in lattice constant becomes large as described above, and the number of dislocations in the semiconductor crystal A tends to increase, which is not desirable.

Since the lateral thickness, width, or diameter near the crown of the erosion debris part has the optimum value or appropriate range as described above, the top, bottom, or horizontal cross section of the erosion debris part. The shape of is preferably at least a locally closed shape (island shape), and more preferably a shape closed in a convex shape toward the outside. More desirably, the shape of the top surface, the bottom surface, or the horizontal cross section is substantially circular. Or a substantially regular polygon is preferable. By such setting, it becomes easy to surely realize the above-mentioned optimum value or appropriate range in an arbitrary horizontal direction.

The eleventh means, in the crystal growth step of any one of the first to ninth means, changes from a crystal growth method with a slow crystal growth rate to a crystal growth method with a high crystal growth rate. It is to change the crystal growth method on the way. For example, by changing the crystal growth method from a crystal growth method with fast lateral growth to a crystal growth method with fast vertical growth, a semiconductor crystal A with good crystallinity can be obtained in a short time.

The twelfth means is the above-mentioned first to eleventh means, wherein the fractured debris of the erosion debris remaining on the back surface of the semiconductor crystal A is etched at least after the separation step. That is, a debris removing step of removing by chemical or physical processing is provided.
According to this means, when an electrode such as a semiconductor light emitting element is formed on the back surface of the semiconductor crystal A (the surface from which the base substrate is peeled), current unevenness that occurs near the interface between the electrode and the semiconductor crystal A and The electric resistance can be suppressed, so that the drive voltage can be reduced and
Alternatively, the emission intensity can be improved.

Further, by removing the broken debris of the erosion debris part, when the electrode is also used as a reflecting mirror of a semiconductor light emitting device or the like, absorption and scattering of light near the mirror surface are reduced and the reflectance is reduced. As a result, the emission intensity is improved. Also,
For example, when this debris removing step is performed by a physical processing such as polishing, even the buffer layer on the back surface of the semiconductor crystal A is removed, or the flatness of the back surface of the semiconductor crystal A is improved. It is also possible to further strengthen the above-mentioned operational effects such as suppression of current unevenness and electric resistance, or reduction of light absorption and scattering near the mirror surface.

The above-mentioned processing may be heat treatment. When the sublimation temperature of the portion to be removed is lower than the sublimation temperature of the target semiconductor crystal A, the unnecessary portion can be removed by the temperature rising process or laser irradiation.

A thirteenth means is a group III nitride compound semiconductor light-emitting device, wherein a semiconductor crystal manufactured by the method for manufacturing a semiconductor crystal according to any one of the above first to twelfth means. Is provided as a crystal growth substrate. According to this means, it is possible or easy to manufacture a group III nitride compound semiconductor light emitting device from a semiconductor having good crystallinity and a small internal stress.

A fourteenth means is crystal growth using a semiconductor crystal manufactured by the method for manufacturing a semiconductor crystal according to any one of the first to twelfth means as a crystal growth substrate. A group nitride compound semiconductor light emitting device is manufactured. According to this means, it is possible or easy to manufacture a group III nitride compound semiconductor light emitting device from a semiconductor having good crystallinity and a small internal stress.

In the case where the seed layer is a multi-layer, the first semiconductor layer to be laminated is "Al _x Ga _1-x N (0≤x <
It is desirable to form a buffer layer consisting of 1) ”.
However, in addition to this buffer layer, an intermediate layer having substantially the same composition (eg, AlN or AlGaN) as that of the buffer layer described above is periodically or alternately provided with another layer, or a multilayer structure is formed. You may laminate so that it may come out. By stacking such buffer layers (or intermediate layers), the crystallinity can be improved by the same action principle as in the past, such as relaxing the stress acting on the semiconductor crystal A due to the difference in lattice constant. .

In the separation step, when the temperature of the base substrate and the semiconductor crystal A is lowered, they are left in the reaction chamber of the growth apparatus and an approximately constant flow rate of ammonia (NH ₃ ) gas is flown into the reaction chamber. As it is, almost "-100 ° C / min
A method of cooling to about room temperature at a cooling rate of about "-0.5 ° C / min" is desirable. For example, by such a method, the above-mentioned separation step can be reliably carried out while maintaining the crystallinity of the semiconductor crystal A stable and of good quality. By the means of the present invention described above, the above problems can be effectively or rationally solved.

[0042]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described below based on specific embodiments. However, the present invention is not limited to the examples shown below.

(First Embodiment) FIG. 1 is a schematic cross-sectional view of a semiconductor crystal illustrating the manufacturing process of the semiconductor crystal of this embodiment. In this embodiment, a seed layer (group III nitride compound semiconductor) including a seed layer first layer (AlN buffer layer 102) and a seed layer second layer (GaN layer 103) is formed by a metal organic chemical vapor deposition method ( Hereinafter referred to as "MOVPE")
The film was formed by vapor phase epitaxy. The gases used there are ammonia (NH ₃ ) and carrier gas (H ₂ or N
₂ ) and trimethylgallium (Ga (CH ₃ ) ₃ , hereinafter “TMG”)
) And trimethylaluminum (Al (CH ₃ ) ₃ , hereinafter referred to as “TMA”).

1. Seed Laminating Step First, a sapphire substrate 101 (base substrate) having a size of 1 inch square and a thickness of about 250 μm was cleaned by organic cleaning and heat treatment (baking). Then, with the a-plane of the single-crystal base substrate 101 as a crystal growth surface, H ₂ is supplied at 10 liters / minute, NH ₃ is supplied at 5 liters / minute, and TMA is supplied at 20 μmol / minute, and the AlN buffer layer 102 (seed layer) is supplied. The first layer) was crystal-grown to a thickness of about 200 nm. The crystal growth temperature at this time was about 400 ° C.

Further, the temperature of the sapphire substrate 101 is set to 10
The temperature was raised to 00 ° C., H ₂ was added at 20 liter / min, and NH ₃ was added at 1
0 liter / min, TMG was introduced at 300 μmol / min to form a GaN layer 103 (seed layer second layer) having a film thickness of about 1.5 μm (FIG. 1A).

2. Step of forming erosion debris portion Next, a striped erosion debris portion having an arrangement period L≈20 μm was formed by selective dry etching using reactive ion etching (RIE) using a hard bake resist mask (FIG. 1). (B)). That is, the erosion debris portion having a substantially rectangular cross-sectional shape was formed by etching the substrate in a stripe shape with a stripe width (seed width S) ≈5 μm and a wing width W≈15 μm until the substrate was etched by about 0.1 μm. In addition, in the above resist mask, the sidewall of the erosion debris portion remaining in a stripe shape is formed of {11-2 of the GaN layer 103 (seed layer second layer).
It was formed so that it would become the 0 plane. By this etching, Ga
N layer 103 (second layer of seed layer) and AlN buffer layer 10
Stripe-shaped erosion debris having a seed layer composed of 2 (seed layer first layer) on the flat top is formed substantially periodically,
Part of the sapphire substrate 101 was exposed at the valley of the wing.

3. Crystal Growth Step Next, a target semiconductor crystal A made of a GaN single crystal was formed by the HVPE method with the exposed surface of the erosion debris portion remaining in a stripe shape as the first crystal growth surface.

Finally, the target semiconductor crystal A is 250 μm.
The crystal is grown to some extent. At this time, GaN grows in the horizontal direction and the vertical direction in the initial stage of growth, and after each part is connected and flattened into a series of substantially flat surfaces, the GaN crystal grows in the vertical direction. In this HVPE method, a horizontal HVPE device was used. Ammonia (NH ₃ ) is used as the V group raw material,
G obtained by reacting Ga with HCl as a group III raw material
aCl was used.

Thus, the lateral side of the seed layer is mainly filled by the lateral epitaxial growth, and then the semiconductor crystal A (GaN single crystal) having a target film thickness is formed by the vertical growth.
Was obtained (FIG. 1 (c)). The symbol R in the figure indicates a "cavity". Under the above conditions, if the GaN film thickness exceeds 250 μm, A
Delamination is observed near the 1N buffer layer 102 (seed layer first layer). This is due to the difference in lattice constant, and the following separation step can be omitted. In this case, peeling can be performed at a high temperature, and it is possible to prevent the occurrence of defects due to the difference in thermal expansion coefficient during cooling.

4. Separation Step The above semiconductor crystal A is cooled to 1100 at a cooling rate of 1.5 ° C./min.
Cool slowly from ℃ to about room temperature. This gives A
Delamination occurred near the 1N buffer layer 102 (seed layer first layer), and a semiconductor crystal A (GaN single crystal) having a target film thickness independent of the base substrate 101 was obtained (FIG. 1D).

(Second Embodiment) FIG. 2 is a schematic sectional view of a semiconductor crystal exemplifying the manufacturing process of the semiconductor crystal of this embodiment. This embodiment is the same as the first embodiment except that the seed layer is ZnO and is formed by sputtering.

1. Seed Laminating Step First, a sapphire substrate 201 (base substrate) having a size of 1 inch square and a thickness of about 250 μm was cleaned by organic cleaning and heat treatment (baking). Then, a ZnO layer 202 (seed layer) having a film thickness of about 200 nm was formed on the a-plane of the single-crystal base substrate 201 by sputtering (FIG. 2A).

2. Step of forming erosion debris portion Next, a striped erosion debris portion having an arrangement period L≈20 μm was formed by selective dry etching using reactive ion etching (RIE) using a hard bake resist mask (FIG. 2). (B)). That is, stripe width (seed width S) ≈3 μm, wing width W≈15 μm
Then, by etching the substrate in stripes until the substrate was etched by about 0.1 μm, an erosion debris portion having a substantially rectangular cross section was formed. By this etching, the ZnO layer 2
Striped erosion debris having a seed layer of 02 (seed layer) on the flat top was formed substantially periodically, and a part of the sapphire substrate 201 was exposed at the valley of the wing.

3. Crystal Growth Step Next, a target semiconductor crystal A made of a GaN single crystal was formed by the HVPE method with the exposed surface of the erosion debris portion remaining in a stripe shape as the first crystal growth surface.

Finally, the intended semiconductor crystal A is 300 μm.
The crystal is grown to some extent. At this time, GaN grows in the horizontal direction and the vertical direction in the initial stage of growth, and after each part is connected and flattened into a series of substantially flat surfaces, the GaN crystal grows in the vertical direction. In this HVPE method, a horizontal HVPE device was used. Ammonia (NH ₃ ) is used as the V group raw material,
G obtained by reacting Ga with HCl as a group III raw material
aCl was used.

Thus, the lateral side of the seed layer is mainly filled by the lateral epitaxial growth, and thereafter, the semiconductor crystal A (GaN single crystal) having a target film thickness is formed by the vertical growth.
Was obtained (FIG. 2 (c)). The symbol R in the figure indicates a "cavity".

4. Separation Step The above semiconductor crystal A is cooled to 1100 at a cooling rate of 1.5 ° C./min.
Cool slowly from ℃ to about room temperature. This gives Z
Delamination occurs near the nO layer 202 (seed layer), and the semiconductor crystal A (GaN) having a target film thickness independent of the base substrate 201 is formed.
A single crystal) was obtained (FIG. 2 (d)).

(Third Embodiment) A semiconductor crystal A (GaN single crystal) having a film thickness of 300 μm is formed in the same manner as in the second embodiment except that the seed layer 202 is formed of TiN _x having a thickness of 40 nm formed by sputtering. It was formed on a sapphire substrate. A TiN _x layer (seed layer) is obtained by slowly cooling from 1100 ° C to about room temperature at a cooling rate of 1.5 ° C / min.
Peeling occurred in the vicinity, and a semiconductor crystal A (GaN single crystal) having a target film thickness independent of the underlying substrate was obtained.

In addition to the buffer layer in the first embodiment, the composition is substantially the same as that of the above-mentioned buffer layer (eg, AlN).
Alternatively, an intermediate layer of AlGaN) may be laminated periodically, alternately with other layers, or so as to form a multilayer structure. By stacking such buffer layers (or intermediate layers), the crystallinity can be improved by the same action principle as in the past, such as relaxing the stress acting on the semiconductor crystal A due to the difference in lattice constant. .

In the separation step, when lowering the temperature of the base substrate and the semiconductor crystal A, they were left in the reaction chamber of the growth apparatus and an approximately constant flow rate of ammonia (NH ₃ ) gas was flown into the reaction chamber. As it is, almost "-100 ° C / min
It may be a method of cooling to about room temperature at a cooling rate of about "-0.5 ° C / min". If this cooling rate is too fast, the semiconductor crystal A may be cracked or cracked.

In each of the above-mentioned embodiments, the epitaxial growth of the semiconductor crystal A is mainly carried out by HVPE. However, the epitaxial growth of the semiconductor crystal A is MOCV at the initial stage.
It may be set to D and then switched to HVPE. In this case, it is possible to form the lower layer portion of the semiconductor crystal A with good crystallinity in the initial stage, accelerate the epitaxial growth thereafter, and obtain the semiconductor crystal A with good crystallinity without making the entire crystal growth time redundant.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of a semiconductor crystal illustrating a manufacturing process of the semiconductor crystal according to a first embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view of a semiconductor crystal illustrating a manufacturing process of the semiconductor crystal according to the second embodiment of the present invention.

[Description of Reference Signs] 101, 201 ... Underlying substrate (eg, sapphire, etc.) 102 ... AlN buffer layer (seed layer first layer) 103 ... GaN layer (seed layer second layer) 202 ... ZnO layer (seed layer) A ... Target semiconductor crystal (group III nitride compound semiconductor) R ... Cavity L ... Arrangement period of erosion debris S ... Seed width W ... Wing width

Continued front page    (72) Inventor Seiji Nagai             Aichi Prefecture Kasuga-cho, Nishikasugai-gun Ochiai character Nagahata 1             Address within Toyoda Gosei Co., Ltd. (72) Inventor Shiro Yamazaki             Aichi Prefecture Kasuga-cho, Nishikasugai-gun Ochiai character Nagahata 1             Address within Toyoda Gosei Co., Ltd. (72) Inventor Yuta             Aichi Prefecture Kasuga-cho, Nishikasugai-gun Ochiai character Nagahata 1             Address within Toyoda Gosei Co., Ltd. (72) Inventor Toshio Hiramatsu             Aichi Prefecture Kasuga-cho, Nishikasugai-gun Ochiai character Nagahata 1             Address within Toyoda Gosei Co., Ltd. (72) Inventor Kazuyoshi Tomita             Aichi Prefecture Nagachite Town Aichi District             Ground 1 Toyota Central Research Institute Co., Ltd. F-term (reference) 5F041 AA40 CA40 CA64 CA65 CA77

Claims (14)

[Claims] 1. A method for growing a semiconductor crystal made of a group III nitride compound semiconductor on a base substrate to obtain a good quality semiconductor crystal A independent of the base substrate, comprising a single layer or a single layer on the base substrate. A seed laminating step of laminating a plurality of seed layers, and chemically or physically eroding a part of the surface of the base substrate on which the seed layer is formed to form the seed layer as the base. A step of forming an erosion debris part which partially or dispersively remains on the substrate; and exposing the exposed surface of the erosion debris part of the seed layer to the semiconductor crystal A
As a first crystal growth surface for starting crystal growth, and a crystal growth step of crystal-growing the semiconductor crystal A until the crystal growth surfaces are connected to each other by crystal growth to grow into at least a series of substantially flat surfaces; A method of manufacturing a semiconductor crystal, comprising a step of separating the semiconductor crystal A and the base substrate by breaking a debris portion. 2. The method for producing a semiconductor crystal according to claim 1, wherein in the crystal growing step, the film thickness of the semiconductor crystal A is 50 μm or more. 3. The semiconductor crystal A and the base substrate are cooled or heated to generate a stress based on a difference in thermal expansion coefficient between the semiconductor crystal A and the base substrate, and the stress is utilized to generate the stress. The method for manufacturing a semiconductor crystal according to claim 1, wherein the erosion debris portion is broken. 4. The method for producing a semiconductor crystal according to claim 1, wherein the seed layer is made of a single-layer or multi-layer group III nitride compound semiconductor. 5. The method of manufacturing a semiconductor crystal according to claim 4, wherein the seed layer or the uppermost layer of the seed layer is formed of gallium nitride (GaN). 6. The method of manufacturing a semiconductor crystal according to claim 4, wherein the seed layer or the lowermost layer of the seed layer is formed of aluminum nitride (AlN). 7. The seed layer or the uppermost layer or the lowermost layer of the seed layer is zinc oxide (ZnO) or titanium nitride (TiN).
_{4. The} method for producing a semiconductor crystal according to claim 1, wherein the semiconductor crystal is formed from _x ). 8. The semiconductor crystal according to claim 1, wherein, in the step of forming the erosion debris portion, the arrangement interval of the erosion debris portion is set to 1 μm or more and 50 μm or less. Manufacturing method. 9. The method for producing a semiconductor crystal according to claim 1, wherein in the erosion debris forming step, the underlying substrate is eroded by 0.01 μm or more. 10. The erosion debris portion forming step, wherein the lateral thickness, width, or diameter of the erosion debris portion is set to 0.1 μm or more and 20 μm or less. The method for producing a semiconductor crystal according to any one of 1. 11. The crystal growth method is changed from a crystal growth method with a slow crystal growth rate to a crystal growth method with a fast crystal growth rate in the crystal growth step. 11. The method for producing a semiconductor crystal according to any one of 10. 12. A debris removing step of removing, at least after the separating step, a broken debris of the erosion debris portion remaining on the back surface of the semiconductor crystal A by a chemical or physical processing treatment such as etching. The method for producing a semiconductor crystal according to any one of claims 1 to 11, characterized in that. 13. A group III nitride having the semiconductor crystal A as a crystal growth substrate, which is manufactured by using the method for manufacturing a semiconductor crystal according to claim 1. Description: Physical compound semiconductor light emitting device. 14. A method for producing a semiconductor crystal according to claim 1, wherein the semiconductor crystal A is produced by crystal growth using the semiconductor crystal A as a crystal growth substrate. A Group III nitride compound semiconductor light-emitting device featuring.