JP2002270512A - Method of manufacturing silicon carbide semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a mask material from being softened and impurity contamination from occurring from the mask material during selective epitaxial growth. SOLUTION: An n<-> type epitaxial layer is formed on an n<+> type substrate 1, and a graphite layer 3 is formed on the n<-> type epitaxial layer 2 as the mask material. The graphite layer 3 is formed by sublimating Si existing in the surface layer of the n<-> type epitaxial layer 2, for example. An opening part is formed in the desired area of the graphite layer, and selective epitaxial growth by using the graphite layer 3 as a mask is performed. An impurity area 5 is eiptaxially grown in the opening part. The softening temperature of the graphite layer 3 thus used is higher than a temperature during selective epitaxial growth, and the graphite layer 3 can be formed from the n<-> type epitaxial layer 2. Thus, impurity contamination does not occur.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a silicon carbide (hereinafter referred to as "silicon carbide").
The present invention relates to a method for manufacturing an SiC semiconductor device in which an impurity layer is formed on a semiconductor substrate made of SiC).

[0002]

2. Description of the Related Art Conventionally, there has been a demand for a technique for forming an impurity region on a SiC substrate with a sufficient impurity concentration and thickness and with little damage such as defects in order to manufacture an arbitrary device on SiC. As a technique for forming such an impurity region, there is a selective epitaxial growth method disclosed in JP-A-11-16840.

This selective epitaxial growth method uses SiO 2
By performing epitaxial growth using mask ₂ or a resist as a mask, an epitaxial film is selectively grown only in an opening formed in SiO ₂ or a resist. According to such a method, since the impurity region can be formed at a desired position by epitaxial growth, the above-mentioned demand can be satisfied.

[0004]

However, it has been confirmed that the above-mentioned prior art has the following problems. First, in the prior art publication, it is disclosed that SiO ₂ or resist is used as a mask material for the selective epitaxial growth method, but there is a problem that these cannot be used as a mask material in practice. That is, SiO ₂
Is used as a mask material for the selective epitaxial growth method, since the growth temperature when growing an epitaxial film is as high as 1600 ° C., the temperature becomes higher than the softening temperature of SiO ₂ and selective epitaxial growth cannot be performed. , SiC and adhere to the surface and cannot be removed. The resist and Si
The problem of reaction with C can be avoided by sintering the resist, but in this case, a problem occurs that the sintered resist causes impurity contamination.

Secondly, in the prior art publication, it is disclosed that a mask material used for digging a groove in SiC is used as it is as a mask material for selective epitaxial growth. There is a problem that can not be applied to. That is, if the above-described SiO ₂ or resist is used as a mask material used when digging a groove in SiC, the above-described first problem occurs. Si
Since the selectivity to C is low, a problem that a deep groove cannot be formed occurs.

Third, according to the selective epitaxial growth method as disclosed in the conventional publication, as shown in FIGS. 7 and 8, it has been confirmed that irregularities are formed on the surface of the grown epitaxial film J1. It is expected that the characteristics will fluctuate or worsen when applied to. Further, as shown in FIG. 8, if the epitaxial film J1 is buried in the groove J2, an impurity region can be formed inside the substrate J3. It is preferable that the surface can be made flat. However, if the epitaxial growth time is long, the epitaxial film J1 protrudes from the SiC surface, and if it is short, the epitaxial film J1 is depressed from the SiC surface. There was no idea of the conversion process itself, and a solution was needed.

The present invention has been made in view of the above points, and has as its object to solve any of the above problems.

[0008]

In order to achieve the above object, according to the first aspect of the present invention, a step of preparing a semiconductor substrate (1) having a silicon carbide layer (2) is provided. Forming a graphite layer (3) as a mask material; forming an opening in a desired region of the graphite layer; and performing selective epitaxial growth using the graphite layer as a mask, thereby forming an impurity region (5) in the opening. And a step of epitaxially growing As described above, by performing selective epitaxial growth using the graphite layer as the mask material, impurity contamination from the mask material can be eliminated.

For example, in the step of forming a graphite layer, the graphite layer can be formed by sublimating Si present in the surface layer of the silicon carbide layer. Thus, the mask material can be formed from the substrate material itself. In this case, as described in claim 3, if the sublimation of Si is performed in a reduced pressure atmosphere, the vapor pressure of Si is increased, and the graphite layer can be more easily formed. Further, as described in claim 4, if the sublimation of Si is performed at a temperature of 1500 ° C. or higher, the sublimation speed in Si can be increased, so that a graphite layer having a desired film thickness can be easily obtained. be able to. In the step of forming a graphite layer, a graphite layer may be deposited on the silicon carbide layer by CVD.

According to a sixth aspect of the present invention, the surface of the impurity region is flattened by using the graphite layer as a flattening stopper. Thus, the impurity region can be planarized by using the mask used for the epitaxial growth as it is as the planarization mask.
By using the mask also as described above, the step of forming the impurity region can be simplified.

According to the present invention, a step of preparing a semiconductor substrate (1) having a silicon carbide layer (2) and a step of forming a GaN layer (3 ') as a mask material on the silicon carbide layer Forming an opening in a desired region of the GaN layer and performing epitaxial growth using the GaN layer as a mask to epitaxially grow the impurity region (5) on the opening and the GaN layer; And a step of flattening the surface of the impurity region by using the surface as an impurity stopper.
Thus, a GaN layer may be applied instead of the graphite layer described in claim 1. In this case, since the impurity region is also formed on the GaN layer during the epitaxial growth, a planarization step using the GaN film as a planarization stopper is performed.

In addition, by using a mask material capable of selective epitaxial growth, a portion where the growth layer and the mask material are in contact with each other grows continuously, so that defects generated when the material becomes discontinuous are suppressed and high reliability is obtained. A film can be formed.

According to the present invention, a semiconductor substrate (1) having a silicon carbide layer (2) is prepared, and a first mask material (3, 3 ') is formed on the silicon carbide layer. Forming a second mask material (6) on the first mask material; forming openings in desired regions of the first and second mask materials; Forming a groove (8) in the silicon carbide layer through the opening using the material as a mask and removing the second mask material and then performing epitaxial growth using the first mask material as a mask, And a step of epitaxially growing the impurity region (5) therein.

As described above, by using the second mask material excellent in the selective etching resistance and the first mask material used for the selective epitaxial growth as the mask for forming the groove, the groove can be made sufficiently deep. Becomes

For example, as the second mask material, it is preferable to use a second mask material having a selection ratio of the second mask material to silicon carbide of 0.5 or more. Claim 1
As shown in FIG. 0, a material containing impurities equal to or less than that of the silicon carbide layer is preferably used as the first mask material.
Specifically, as described in claim 11, a graphite layer (3) can be used as a first mask material, and SiO ₂ can be used as a _second mask material.

The reference numerals in parentheses of the above means indicate the correspondence with specific means described in the embodiments described later.

[0017]

(First Embodiment) FIG. 1 shows a manufacturing process of a SiC semiconductor device according to a first embodiment of the present invention, and a method of manufacturing a SiC semiconductor device will be described with reference to FIG.

First, as shown in FIG. 1A, an n ⁺ -type substrate 1 made of SiC having a main surface and a back surface is prepared, and an n ⁻ -type epitaxial layer is formed on the main surface side of the n ⁺ -type substrate 1. 2 (hereinafter referred to as an n ⁻ -type epi layer) is epitaxially grown. Subsequently, as shown in FIG. 1 (b), n ^-
Sublimate Si from the surface of the mold epilayer 2. For example, by performing a heat treatment at a temperature of 1500 ° C. for 30 minutes in a reduced pressure atmosphere, Si can be sublimated from the surface of the n ⁻ -type epi layer 2. When this process is completed, a graphite layer 3 in which only the carbon component of SiC remains is formed on the surface of the n ⁻ -type epi layer 2. As described above, since the vapor pressure of Si is increased by forming the graphite layer 3 in a reduced pressure atmosphere, the graphite layer 3 can be more easily formed, and by heating at a temperature of 1500 ° C. or more. And the rate of sublimation of Si can be increased, and the graphite layer 3 can be easily made to have a desired film thickness.

Next, as shown in FIG. 1C, after a resist 4 is deposited on the upper surface of the graphite layer 3, a desired region of the graphite layer 3 is opened by selective etching using the resist 4 as a mask. . Then, after removing the resist 4, selective epitaxial growth is performed using the graphite layer 3 as a mask, and an impurity region 5 made of SiC is grown in the opening of the graphite layer 3.
Thereafter, for example, the graphite layer 3 is removed by RIE or H ₂ etching, the graphite layer 3 is removed by oxidation, or the graphite layer 3 is removed by SC1 so that the n ⁻ -type epi layer 2 is sufficiently removed. Impurity region 5 with a high impurity concentration and thickness and little damage such as defects
Can be obtained. Note that such a configuration is used as a PN diode by, for example, forming the impurity region 5 as a p-type semiconductor.

As described above, when the graphite layer 3 is used as a mask material in the selective epitaxial growth method,
Since the graphite layer 3 is formed by the SiC substrate material itself, there is no problem of impurity contamination from the mask material, and since the softening temperature of the graphite layer 3 is not as low as SiO ₂ , the mask material during epitaxial growth is not used. Does not soften.

(Second Embodiment) In the first embodiment,
Although the graphite layer 3 was formed by sublimating Si from the surface of the n ⁻ -type epi layer 2, in the present embodiment,
The graphite layer 3 is formed by CVD or the like. FIG.
Next, a manufacturing process of the SiC semiconductor device according to the present embodiment will be described with reference to FIG.

First, as shown in FIG.⁺Type base
On the main surface of plate 1, n^-A type epi layer 2 is grown. this
The steps are the same as in FIG. And the CVD method
From n^-The graphite layer 3 is deposited on the surface of the
Let it work. For example, C_ThreeH ₈In the atmosphere of 1
By setting the temperature to 600 ° C., the graphite layer 3 is deposited.
Let it work. After that, the first actual state shown in FIG.
Performing the same steps as those in FIGS. 1D to 1F of the embodiment
Where n^-Structure in which impurity region 5 is formed on
Can be obtained.

As described above, even when the graphite layer 3 is formed by a method different from that of the first embodiment, the same effect as that of the first embodiment can be obtained.

(Third Embodiment) FIGS. 3 and 4 show a manufacturing process of a SiC semiconductor device according to a third embodiment of the present invention, and a method of manufacturing a SiC semiconductor device will be described with reference to FIGS.

First, in the steps shown in FIGS. 3A to 3C, the same steps as those in FIGS. 1A to 1C in the first embodiment are performed, and the n ^- type epitaxial layer 2 is A graphite layer 3 serving as a first mask material is formed.

Subsequently, as shown in FIG.
An LTO film 6 serving as a second mask material is
Position. Then, as shown in FIG.
After depositing a resist 7 on the upper surface of the TO film 6, this resist
LTO by selective etching using dist 7 as a mask
A desired region of the film 6 and the graphite layer 3 is opened.
Then, as shown in FIG. 4B, the resist 7 is removed.
After etching using the LTO film 6 as a mask, an example
For example, CF_Four+ O_TwoRIE by n ^-Type epi
A groove 8 is formed in the layer 2.

After that, the LTO film 6 is removed, and FIG.
As shown in FIG. 2, selective epitaxial growth is performed using the graphite layer 3 as a mask, and an impurity region 5 made of SiC is formed in the opening of the graphite layer 3, that is, in the trench 8.
Grow. Then, for example, RIE or oxidation, SC
1. By removing the graphite layer 3 with H ₂ ,
It is possible to obtain a configuration in which the impurity region 5 having a sufficient impurity concentration and thickness and having little damage such as a defect is formed inside the groove 8. Note that such a configuration is used as a PN diode or as a part of a MOS device, for example, by forming the impurity region 5 as a p-type semiconductor.

As described above, in the present embodiment, the LTO film 6 is formed on the graphite layer 3 used as a mask material for selective epitaxial growth, so that the groove 8 using the LTO film 6 as a mask is formed. And the selective epitaxial growth inside the trench 8 using the graphite layer 3.

Since the groove 8 is formed using the LTO film 6 having an etching selectivity to SiC of ≧ 0.5 or more as a mask material, the depth of the groove 8 can be made sufficiently deep. In addition, since the LTO film 6 made of SiO ₂ is removed at the time of selective epitaxial growth and the graphite layer 3 is used as a mask material, the same effect as in the first embodiment can be obtained.

As described above, a carbon layer such as a graphite layer 3 is used as a first mask material, and a SiO layer such as an LTO film 6 is used as a second mask material.
_{Although it} is preferable to use _two layers, other layers may be used. However, as the second mask material, it is desirable to select a material having a high selectivity with respect to SiC in order to sufficiently increase the depth of the groove 8, and as the first mask material,
It is desirable to select a cleaner material than a semiconductor material in consideration of impurity contamination.

(Fourth Embodiment) In the present embodiment, in addition to the third embodiment, a step of flattening the impurity region 5 is performed. Since the manufacturing process of the SiC semiconductor device according to the present embodiment is almost the same as that of the third embodiment, the same portions will be described with reference to the third embodiment, and only different portions will be described.

FIG. 5 shows a manufacturing process of the SiC semiconductor device according to the present embodiment. Hereinafter, based on FIG. 5 and FIGS. 3 and 4 shown in the third embodiment, S
A method for manufacturing an iC semiconductor device will be described.

First, FIG. 3A to FIG.
4D and the steps shown in FIGS. 4A to 4C are performed to form the impurity regions 5 by selective epitaxial growth.
Then, as shown in FIG.
The impurity region 5 is planarized by polishing (Mecanical Polish). At this time, for example, chromium oxide is used as the abrasive grains for CMP. Then, the CMP polishing is advanced, and FIG.
As shown in (2), when the flattening is advanced to the same height as the surface of the graphite layer 3, the polishing rate is reduced by the graphite layer 3, so the CMP polishing is stopped at this point. Thereafter, in the step shown in FIG. 5C, the graphite layer 3 is formed in the same step as that of FIG.
Is removed.

As described above, the surface of the impurity region 5 can be flattened by using the graphite layer 3 for detecting the end point of the flattening. By using the mask for the selective epitaxial growth and the mask for the planarization stopper in this way, the manufacturing process of the SiC semiconductor device can be simplified. In FIG. 5C,
Although the impurity region 5 has a shape ejected from the n ⁻ -type epi layer 2 by the thickness of the graphite layer 3, the amount of protrusion from the n ⁻ -type epi layer 2 can be reduced by adjusting the thickness of the graphite layer 3. It can be controlled appropriately.

(Fifth Embodiment) In the fourth embodiment,
Although the graphite layer 3 is used as the material of the first mask material, the same effect as in the fourth embodiment can be obtained by using a GaN layer instead. In this case, as shown in FIG. 6A, the impurity region 5 is formed not by the selective epitaxial growth but also by the epitaxial growth on the GaN layer 3 '.
As shown in (b) and (c), when the impurity region 5 is planarized along with the portion existing on the GaN layer 3 ', the GaN layer 3' functions as a planarization stopper.

Further, by using a mask material capable of selective epitaxial growth, a portion where the growth layer and the mask material are in contact with each other grows continuously, so that a defect generated when the mask is discontinuous is suppressed, and high reliability is obtained. A film can be formed.

When the GaN layer 3 'is used, C gas is used as an etching gas for removing the GaN layer 3'.
By using Cl ₄ , CCl ₂ F ₂ , or BCl ₃ ,
The GaN layer 3 'can be removed while increasing the selectivity with respect to SiC.

(Other Embodiments) In the fifth embodiment, the grooves 8
The case where the GaN layer 3 'is used as the mask material in the SiC semiconductor device of the type in which
Even in the SiC semiconductor device of the type that does not dig a groove as in the embodiment, it is also possible to use a GaN layer as a mask material.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a manufacturing process of a SiC semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a manufacturing process of a SiC semiconductor device according to a second embodiment of the present invention.

FIG. 3 is a diagram illustrating a manufacturing process of a SiC semiconductor device according to a third embodiment of the present invention.

FIG. 4 is a view illustrating a manufacturing step of the SiC semiconductor device following FIG. 3;

FIG. 5 is a view illustrating a manufacturing process of a SiC semiconductor device according to a fourth embodiment of the present invention.

FIG. 6 is a diagram illustrating a manufacturing process of an SiC semiconductor device according to a fifth embodiment of the present invention.

FIG. 7 is a diagram showing a cross-sectional configuration of a conventional SiC semiconductor device.

FIG. 8 is a diagram showing a cross-sectional configuration of a conventional SiC semiconductor device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... n ⁺ type substrate, 2 ... n ^- type epi layer, 3 ... graphite layer, 4 ... resist, 5 ... impurity region, 6 ... LTO film, 7
... resist, 8 ... groove.

Claims (15)

[Claims] 1. A step of preparing a semiconductor substrate (1) having a silicon carbide layer (2); a step of forming a graphite layer (3) as a mask material on the silicon carbide layer; Forming an opening in the region and performing selective epitaxial growth using the graphite layer as a mask to epitaxially grow the impurity region (5) in the opening. Device manufacturing method. 2. The silicon carbide semiconductor device according to claim 1, wherein in the step of forming the graphite layer, the graphite layer is formed by sublimating Si present in a surface layer of the silicon carbide layer. Manufacturing method. 3. The method for manufacturing a silicon carbide semiconductor device according to claim 2, wherein in the step of forming the graphite layer, the sublimation of the Si is performed under a reduced pressure atmosphere. 4. The method of manufacturing a silicon carbide semiconductor device according to claim 2, wherein in the step of forming the graphite layer, the sublimation of the Si is performed at a temperature of 1500 ° C. or higher. 5. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein in the step of forming the graphite layer, the graphite layer is deposited on the silicon carbide layer by CVD. 6. The method of manufacturing a silicon carbide semiconductor device according to claim 1, wherein the surface of the impurity region is planarized by using the graphite layer as a planarization stopper. Method. 7. A step of preparing a semiconductor substrate (1) having a silicon carbide layer (2); and a GaN layer (3 ′) as a mask material on the silicon carbide layer.
Forming an opening in a desired region of the GaN layer and performing epitaxial growth using the GaN layer as a mask, thereby epitaxially growing the impurity region (5) on the opening and the GaN layer. A method of manufacturing a silicon carbide semiconductor device, comprising: a step of flattening the surface of the impurity region using the GaN layer as a flattening stopper. 8. A step of preparing a semiconductor substrate (1) having a silicon carbide layer (2); a step of forming a first mask material (3, 3 ′) on the silicon carbide layer; Forming a second mask material on the first mask material, forming an opening in a desired region of the first and second mask materials, and masking the second mask material. Forming a groove (8) in the silicon carbide layer through the opening; removing the second mask material; and performing epitaxial growth using the first mask material as a mask. Epitaxially growing an impurity region (5) inside the trench. 9. The silicon carbide semiconductor device according to claim 8, wherein a selectivity of said second mask material to silicon carbide is 0.5 or more as said second mask material. Production method. 10. The method of manufacturing a silicon carbide semiconductor device according to claim 8, wherein a material containing impurities equal to or less than that of said silicon carbide layer is used as said first mask material. . 11. A graphite layer (3) is used as the first mask material, and SiO _{2 is} used as the second mask material.
9. The method of manufacturing a silicon carbide semiconductor device according to claim 8, wherein: 12. A method of forming a graphite layer as a first mask material, comprising the steps of:
12. The method of manufacturing a silicon carbide semiconductor device according to claim 11, wherein the graphite layer is formed by sublimating. 13. The silicon carbide semiconductor according to claim 11, wherein, in the step of forming a graphite layer as the first mask material, the graphite layer is deposited on the semiconductor layer by CVD. Device manufacturing method. 14. The method of manufacturing a silicon carbide semiconductor device according to claim 8, wherein a GaN film (3 ′) having an epitaxially grown film formed on a surface is used as said first mask material. 15. The silicon carbide semiconductor device according to claim 8, wherein the surface of the impurity region is planarized by using the first mask material as a planarization stopper. Production method.