JP2001352665A - Battery-protecting circuit - Google Patents
Battery-protecting circuitInfo
- Publication number
- JP2001352665A JP2001352665A JP2000174172A JP2000174172A JP2001352665A JP 2001352665 A JP2001352665 A JP 2001352665A JP 2000174172 A JP2000174172 A JP 2000174172A JP 2000174172 A JP2000174172 A JP 2000174172A JP 2001352665 A JP2001352665 A JP 2001352665A
- Authority
- JP
- Japan
- Prior art keywords
- battery
- pnp transistor
- fet
- transistor
- collector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Landscapes
- Secondary Cells (AREA)
- Protection Of Static Devices (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、バッテリー保護回
路に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a battery protection circuit.
【０００２】[0002]
【従来の技術】従来の過電圧保護装置は図２の回路図の
ようなものであり、充電制御用素子であるＰＮＰトラン
ジスタＱ１のバッテリー側の電圧を検出し、過電圧が印
加された時、充電回路を制御し、ＰＮＰトランジスタＱ
１をオフさせていたが、ＰＮＰトランジスタＱ１が破損
して過電圧が印加されると、ＰＮＰトランジスタＱ１を
オフすることができず、バッテリーに過電圧が印加され
るという問題があった。2. Description of the Related Art A conventional overvoltage protection device has a circuit diagram as shown in FIG. 2, and detects a voltage on the battery side of a PNP transistor Q1, which is a charge control element, and when an overvoltage is applied, a charging circuit. And the PNP transistor Q
However, when the PNP transistor Q1 is damaged and an overvoltage is applied, there is a problem that the PNP transistor Q1 cannot be turned off and an overvoltage is applied to the battery.
【０００３】[0003]
【発明が解決しようとする課題】上記のような問題があ
ったため、充電制御用素子であるＰＮＰトランジスタＱ
１が破損して過電圧が印加された時でも、入力側とバッ
テリー間を確実に遮断でき、バッテリーを過電圧から保
護することができる回路が要求されていた。[0007] Because of the above-mentioned problems, the PNP transistor Q serving as a charge control element is not provided.
Even if an overvoltage is applied due to breakage of the battery 1, there has been a demand for a circuit capable of reliably shutting off the input side and the battery and protecting the battery from the overvoltage.
【０００４】[0004]
【課題を解決するための手段】本発明は、上記課題を解
決するものであり、ＰＮＰトランジスタＱ１とバッテリ
ーの間にＰチャンネル形ＦＥＴ Ｑ２を接続し、電圧検
出用素子である定電圧ダイオードＤ１で、Ｐチャネル形
ＦＥＴ Ｑ２のソース側の電圧を検出し、充電制御用素
子であるＰＮＰトランジスタＱ１が破損して過電圧にな
っても、Ｐチャネル形ＦＥＴ Ｑ２をオフすることによ
り、入力側とバッテリー間を確実に遮断することがで
き、バッテリーを過電圧から保護することができるバッ
テリー保護回路である。すなわち、第１のＰＮＰトラン
ジスタＱ１のエミッタを入力側に、ベースを充電回路
に、コレクタをバッテリーに接続してなるバッテリー保
護回路において、第１のＰＮＰトランジスタＱ１のコレ
クタとバッテリーとの間にＰチャネル形ＦＥＴ Ｑ２を
接続し、該ＦＥＴ Ｑ２のゲート・ソース間に第２のＰ
ＮＰトランジスタＱ３を接続し、該トランジスタＱ３の
コレクタに抵抗Ｒ１、ベースに定電圧ダイオードを接続
して接地したことを特徴とするバッテリー保護回路であ
る。また、第２のＰＮＰトランジスタＱ３のベースを定
電圧ダイオードＤ１のカソードに、エミッタを第１のＰ
ＮＰトランジスタＱ１のコレクタおよびＰチャネル形Ｆ
ＥＴ Ｑ２のソースに接続し、上記定電圧ダイオードを
アノード接地し、上記Ｐチャネル形ＦＥＴ Ｑ２のドレ
インをバッテリーの正極に接続してなることを特徴とす
るバッテリー保護回路である。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems. A P-channel FET Q2 is connected between a PNP transistor Q1 and a battery, and a constant voltage diode D1 serving as a voltage detecting element is provided. , The voltage on the source side of the P-channel FET Q2 is detected, and even if the PNP transistor Q1 serving as a charge control element is damaged and becomes over-voltage, the P-channel FET Q2 is turned off to connect the input side and the battery. This is a battery protection circuit that can reliably shut off the battery and protect the battery from overvoltage. That is, in a battery protection circuit in which the emitter of the first PNP transistor Q1 is connected to the input side, the base is connected to the charging circuit, and the collector is connected to the battery, a P-channel transistor is connected between the collector of the first PNP transistor Q1 and the battery. FET Q2 is connected, and a second P-type transistor is connected between the gate and source of the FET Q2.
This battery protection circuit is characterized in that an NP transistor Q3 is connected, a resistor R1 is connected to the collector of the transistor Q3, a constant voltage diode is connected to the base and grounded. The base of the second PNP transistor Q3 is the cathode of the constant voltage diode D1, and the emitter is the first PNP transistor Q3.
Collector of NP transistor Q1 and P-channel type F
A battery protection circuit comprising: a source connected to an ET Q2; a constant voltage diode grounded to the anode; and a drain of the P-channel FET Q2 connected to a positive electrode of the battery.
【０００５】[0005]
【発明の実施の形態】第１のＰＮＰトランジスタＱ１の
コレクタとバッテリーとの間にＰチャネル形ＦＥＴ Ｑ
２を接続し、該ＦＥＴ Ｑ２のゲート・ソース間に第２
のＰＮＰトランジスタＱ３を接続し、該トランジスタＱ
３のコレクタに抵抗Ｒ１、ベースに定電圧ダイオードを
接続して接地する。第２のＰＮＰトランジスタＱ３のベ
ースを定電圧ダイオードＤ１のカソードに、エミッタを
第１のＰＮＰトランジスタＱ１のコレクタおよびＰチャ
ネル形ＦＥＴ Ｑ２のソースに接続し、上記定電圧ダイ
オードをアノード接地し、上記Ｐチャネル形ＦＥＴ Ｑ
２のドレインをバッテリーの正極に接続する。電圧を検
出しているＰチャネル形ＦＥＴ Ｑ２のソース側の電圧
Ｖ１が、定電圧ダイオードＤ１の電圧より高くなると、
ＰＮＰトランジスタＱ３がオンし、Ｐチャネル形ＦＥＴ
Ｑ２がオフになって、入力側とバッテリー間が確実に
遮断されるので、バッテリーを過電圧から保護すること
ができる。DESCRIPTION OF THE PREFERRED EMBODIMENTS A P-channel FET Q is connected between a collector of a first PNP transistor Q1 and a battery.
2 between the gate and source of the FET Q2.
PNP transistor Q3 is connected to the transistor Q3.
The resistor R1 is connected to the collector of No. 3 and the constant voltage diode is connected to the base, and grounded. The base of the second PNP transistor Q3 is connected to the cathode of the constant voltage diode D1, the emitter is connected to the collector of the first PNP transistor Q1 and the source of the P-channel FET Q2, and the constant voltage diode is grounded to the anode. Channel type FET Q
2 is connected to the positive electrode of the battery. When the voltage V1 on the source side of the P-channel FET Q2 detecting the voltage becomes higher than the voltage of the constant voltage diode D1,
PNP transistor Q3 turns on, P-channel type FET
Since Q2 is turned off and the input side and the battery are reliably disconnected, the battery can be protected from overvoltage.
【０００６】[0006]
【実施例】本発明の実施例によるバッテリー保護回路の
回路図を図１に、従来例の回路図を図２に示す。図１の
実施例における過電圧印加時のＰチャネル形ＦＥＴ Ｑ
２のソース側の電圧とドレイン側の電圧の変化を表わす
と、図３のようになる。図３において、（ａ）はＰチャ
ネル形ＦＥＴ Ｑ２のソース側の電圧の経時変化を、
（ｄ）は該ＦＥＴ Ｑ２のドレイン側の電圧の経時変化
を表し、（ｂ）は第２のＰＮＰトランジスタ Ｑ３の動
作状態のタイミングチャートを、（ｃ）はＰチャネル形
ＦＥＴ Ｑ２の動作状態のタイミングチャートを表して
いる。以下、図３により、充電制御用素子であるＰＮＰ
トランジスタＱ１が破損して過電圧になった時のバッテ
リーの保護状態を説明する。 図１のＰチャネル形ＦＥＴ Ｑ２は、ゲートが抵抗Ｒ
１を介して接地しており、ゲート・ソース間に電圧が印
加されるため、過電圧が印加されない時間ｔまではオン
しているが、第２のＰＮＰトランジスタＱ３はベースに
定電圧ダイオードＤ１が接続されているため、時間ｔま
ではベース電流が流れず、オフ状態にある。このＰチャ
ネル形ＦＥＴ Ｑ２のオン状態により、該ＦＥＴ Ｑ２
のドレイン側の電圧Ｖ２も、時間ｔまではソース側の電
圧Ｖ１とともに上昇する（図３（ｄ））。 第１のＰＮＰトランジスタ Ｑ１が破損し、コレクタ
−エミッタ間が短絡状態になると、Ｐチャネル形ＦＥＴ
Ｑ２のソース側の電圧Ｖ１は、入力電圧Ｖinと同様の
動作状態となり、時間ｔ以降も直線的に上昇する（図３
（ａ））。 上記Ｐチャネル形ＦＥＴ Ｑ２の電圧Ｖ１が定電圧ダ
イオードＤ１の値（ＶD1）を超えると、第２のＰＮＰト
ランジスタＱ３がオンになり（図３（ｂ））、Ｐチャネ
ル形ＦＥＴ Ｑ２のゲート・ソース間が短絡状態になる
ので、該ＦＥＴＱ２がオフ状態になる（図３（ｃ））。
このため、Ｐチャネル形ＦＥＴ Ｑ２のドレイン側の電
圧Ｖ２がドロップする（図３（ｄ））（時間ｔ以降）。
上記より明らかなように、本発明の実施例によるバッテ
リー保護回路は、充電制御用素子であるＰＮＰトランジ
スタＱ１が破損して過電圧になっても、Ｐチャネル形Ｆ
ＥＴ Ｑ２がオフしバッテリーを保護することができ
る。FIG. 1 is a circuit diagram of a battery protection circuit according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional example. P-channel FET Q at the time of overvoltage application in the embodiment of FIG.
FIG. 3 shows a change in the voltage on the source side and the voltage on the drain side in FIG. In FIG. 3, (a) shows the time-dependent change in the voltage on the source side of the P-channel FET Q2,
(D) shows the time-dependent change of the voltage on the drain side of the FET Q2, (b) is a timing chart of the operation state of the second PNP transistor Q3, and (c) is the timing of the operation state of the P-channel FET Q2. 2 shows a chart. Hereinafter, referring to FIG. 3, a PNP which is a charge control element
The protection state of the battery when the transistor Q1 is damaged and becomes overvoltage will be described. The gate of the P-channel FET Q2 of FIG.
1 is grounded, and a voltage is applied between the gate and the source, so that the transistor remains on until the time t when no overvoltage is applied. However, the constant voltage diode D1 is connected to the base of the second PNP transistor Q3. Therefore, the base current does not flow until time t, and the device is in the off state. By the ON state of the P-channel type FET Q2, the FET Q2
The voltage V2 on the drain side also increases with the voltage V1 on the source side until time t (FIG. 3D). When the first PNP transistor Q1 is damaged and a short circuit occurs between the collector and the emitter, a P-channel FET
The voltage V1 on the source side of Q2 is in the same operation state as the input voltage Vin, and linearly increases after time t (FIG. 3).
(A)). When the voltage V1 of the P-channel FET Q2 exceeds the value (VD1) of the constant voltage diode D1, the second PNP transistor Q3 is turned on (FIG. 3B), and the gate and source of the P-channel FET Q2 are turned on. Since the short circuit occurs, the FET Q2 is turned off (FIG. 3C).
Therefore, the voltage V2 on the drain side of the P-channel FET Q2 drops (FIG. 3D) (after time t).
As is apparent from the above description, the battery protection circuit according to the embodiment of the present invention can provide a P-channel F
The ET Q2 turns off and the battery can be protected.
【０００７】[0007]
【発明の効果】本発明により、充電制御用素子であるＰ
ＮＰトランジスタＱ１が破損して過電圧が印加された時
でも、Ｐチャネル形ＦＥＴ Ｑ２をオフすることによ
り、入力側とバッテリー間を確実に遮断することがで
き、バッテリーを過電圧から保護することができる。According to the present invention, the charge control element P
Even when the NP transistor Q1 is damaged and an overvoltage is applied, by turning off the P-channel FET Q2, the input side and the battery can be reliably shut off, and the battery can be protected from overvoltage.
【図１】本発明の実施例によるバッテリー保護回路の回
路図である。FIG. 1 is a circuit diagram of a battery protection circuit according to an embodiment of the present invention.
【図２】従来例によるバッテリー保護回路の回路図であ
る。FIG. 2 is a circuit diagram of a conventional battery protection circuit.
【図３】図３の（ａ）はＰチャネル形ＦＥＴ Ｑ２のソ
ース側の電圧の経時変化、（ｄ）は該ＦＥＴ Ｑ２のド
レイン側の電圧の経時変化を表し、（ｂ）は第２のＰＮ
Ｐトランジスタ Ｑ３の動作状態のタイミングチャー
ト、（ｃ）はＰチャネル形ＦＥＴ Ｑ２の動作状態のタ
イミングチャートである。3 (a) shows the time-dependent change of the voltage on the source side of the P-channel FET Q2, FIG. 3 (d) shows the time-dependent change of the voltage on the drain side of the FET Q2, and FIG. PN
FIG. 7C is a timing chart of the operation state of the P-transistor Q3, and FIG. 7C is a timing chart of the operation state of the P-channel FET Q2.
Ｖin 入力電圧 Ｒ１ 抵抗 Ｄ１ 定電圧ダイオード Ｑ１ ＰＮＰトランジスタ Ｑ２ Ｐチャネル形ＦＥＴ Ｑ３ ＰＮＰトランジスタ Ｖ１ Ｐチャネル形ＦＥＴ Ｑ２のソース側の電圧 Ｖ２ Ｐチャネル形ＦＥＴ Ｑ２のドレイン側の電圧 ＶD1 定電圧ダイオードＤ１の電圧 Vin Input voltage R1 Resistance D1 Constant voltage diode Q1 PNP transistor Q2 P-channel type FET Q3 PNP transistor V1 P-channel type FET Q2 source side voltage V2 P-channel type FET Q2 drain side voltage VD1 Voltage of constant voltage diode D1
Claims (2)
入力側に、ベースを充電回路に、コレクタをバッテリー
に接続してなるバッテリー保護回路において、 第１のＰＮＰトランジスタのコレクタとバッテリーとの
間にＰチャネル形ＦＥＴを接続し、該ＦＥＴのゲート・
ソース間に第２のＰＮＰトランジスタを接続し、該トラ
ンジスタのコレクタに抵抗、ベースに定電圧ダイオード
を接続して接地したことを特徴とするバッテリー保護回
路。1. A battery protection circuit comprising an emitter of a first PNP transistor connected to an input side, a base connected to a charging circuit, and a collector connected to a battery. A channel type FET is connected, and the gate
A battery protection circuit comprising: a second PNP transistor connected between sources; a resistor connected to the collector of the transistor; a constant voltage diode connected to the base; and grounded.
タのベースを定電圧ダイオードのカソードに、エミッタ
を第１のＰＮＰトランジスタのコレクタおよびＰチャネ
ル形ＦＥＴのソースに接続し、上記定電圧ダイオードを
アノード接地し、上記Ｐチャネル形ＦＥＴのドレインを
バッテリーの正極に接続してなることを特徴とするバッ
テリー保護回路。2. The constant voltage diode according to claim 1, wherein the base of the second PNP transistor is connected to the cathode of the constant voltage diode, the emitter is connected to the collector of the first PNP transistor and the source of the P-channel FET. A battery protection circuit comprising: an anode grounded; and a drain of the P-channel FET connected to a positive electrode of the battery.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000174172A JP4090670B2 (en) | 2000-06-09 | 2000-06-09 | Battery protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000174172A JP4090670B2 (en) | 2000-06-09 | 2000-06-09 | Battery protection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001352665A true JP2001352665A (en) | 2001-12-21 |
| JP4090670B2 JP4090670B2 (en) | 2008-05-28 |
Family
ID=18676255
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000174172A Expired - Fee Related JP4090670B2 (en) | 2000-06-09 | 2000-06-09 | Battery protection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4090670B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008091057A (en) * | 2006-09-29 | 2008-04-17 | Matsushita Electric Ind Co Ltd | Induction heating cooker |
| CN101783503A (en) * | 2009-01-16 | 2010-07-21 | 鸿富锦精密工业（深圳）有限公司 | Overvoltage protection circuit |
| JP2011250665A (en) * | 2010-05-23 | 2011-12-08 | Iwasa Taku | Storage battery control circuit, storage battery controller and independent power supply system |
| JP5495217B1 (en) * | 2013-09-14 | 2014-05-21 | 拓 岩佐 | Overcharge prevention circuit, overdischarge prevention circuit, storage battery control device, independent power supply system and battery pack |
| KR101724025B1 (en) | 2015-10-01 | 2017-04-18 | 주식회사 모브릭 | Battery protection apparatus for breaking power at high temperature or high current based on metal-insulator transition |
| US12119687B2 (en) | 2019-12-05 | 2024-10-15 | Lg Energy Solution, Ltd. | Battery pack including plurality of current paths |
-
2000
- 2000-06-09 JP JP2000174172A patent/JP4090670B2/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008091057A (en) * | 2006-09-29 | 2008-04-17 | Matsushita Electric Ind Co Ltd | Induction heating cooker |
| CN101783503A (en) * | 2009-01-16 | 2010-07-21 | 鸿富锦精密工业（深圳）有限公司 | Overvoltage protection circuit |
| JP2011250665A (en) * | 2010-05-23 | 2011-12-08 | Iwasa Taku | Storage battery control circuit, storage battery controller and independent power supply system |
| JP5495217B1 (en) * | 2013-09-14 | 2014-05-21 | 拓 岩佐 | Overcharge prevention circuit, overdischarge prevention circuit, storage battery control device, independent power supply system and battery pack |
| KR101724025B1 (en) | 2015-10-01 | 2017-04-18 | 주식회사 모브릭 | Battery protection apparatus for breaking power at high temperature or high current based on metal-insulator transition |
| US12119687B2 (en) | 2019-12-05 | 2024-10-15 | Lg Energy Solution, Ltd. | Battery pack including plurality of current paths |
Also Published As
| Publication number | Publication date |
|---|---|
| JP4090670B2 (en) | 2008-05-28 |
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