JP2000277897A - Terminal for solder-ball connection and its formation method and as manufacture of board for semiconductor mounting - Google Patents
Terminal for solder-ball connection and its formation method and as manufacture of board for semiconductor mountingInfo
- Publication number
- JP2000277897A JP2000277897A JP11078797A JP7879799A JP2000277897A JP 2000277897 A JP2000277897 A JP 2000277897A JP 11078797 A JP11078797 A JP 11078797A JP 7879799 A JP7879799 A JP 7879799A JP 2000277897 A JP2000277897 A JP 2000277897A
- Authority
- JP
- Japan
- Prior art keywords
- electroless
- terminal
- solder
- film
- solder ball
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 23
- 238000000034 method Methods 0.000 title claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 title abstract description 6
- 230000015572 biosynthetic process Effects 0.000 title abstract 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims abstract description 54
- 229910052763 palladium Inorganic materials 0.000 claims abstract description 28
- 238000007747 plating Methods 0.000 claims description 71
- 229910000679 solder Inorganic materials 0.000 claims description 65
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 58
- 229910052737 gold Inorganic materials 0.000 claims description 32
- 239000010931 gold Substances 0.000 claims description 32
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 30
- 229910052759 nickel Inorganic materials 0.000 claims description 28
- 239000000758 substrate Substances 0.000 claims description 20
- 239000004020 conductor Substances 0.000 claims description 7
- 238000006467 substitution reaction Methods 0.000 claims description 5
- 238000006073 displacement reaction Methods 0.000 claims description 4
- 238000007772 electroless plating Methods 0.000 claims description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 8
- 229910052802 copper Inorganic materials 0.000 abstract description 6
- 239000010949 copper Substances 0.000 abstract description 6
- 229910052751 metal Inorganic materials 0.000 abstract description 4
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 abstract description 3
- 239000002184 metal Substances 0.000 abstract description 3
- 229910052750 molybdenum Inorganic materials 0.000 abstract description 3
- 239000011733 molybdenum Substances 0.000 abstract description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052721 tungsten Inorganic materials 0.000 abstract description 3
- 239000010937 tungsten Substances 0.000 abstract description 3
- 150000002739 metals Chemical class 0.000 abstract description 2
- 239000003638 chemical reducing agent Substances 0.000 description 7
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 239000007788 liquid Substances 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 230000006378 damage Effects 0.000 description 3
- 238000007654 immersion Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- -1 palladium ions Chemical class 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 229910000521 B alloy Inorganic materials 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 2
- VEQPNABPJHWNSG-UHFFFAOYSA-N Nickel(2+) Chemical compound [Ni+2] VEQPNABPJHWNSG-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 229910001128 Sn alloy Inorganic materials 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- ROOXNKNUYICQNP-UHFFFAOYSA-N ammonium persulfate Chemical compound [NH4+].[NH4+].[O-]S(=O)(=O)OOS([O-])(=O)=O ROOXNKNUYICQNP-UHFFFAOYSA-N 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 229910001453 nickel ion Inorganic materials 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 238000005406 washing Methods 0.000 description 2
- XFXPMWWXUTWYJX-UHFFFAOYSA-N Cyanide Chemical group N#[C-] XFXPMWWXUTWYJX-UHFFFAOYSA-N 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- 229910018104 Ni-P Inorganic materials 0.000 description 1
- 229910018536 Ni—P Inorganic materials 0.000 description 1
- 229910000978 Pb alloy Inorganic materials 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 229910001870 ammonium persulfate Inorganic materials 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000005238 degreasing Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 150000002940 palladium Chemical class 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000010008 shearing Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910052717 sulfur Inorganic materials 0.000 description 1
- 239000011593 sulfur Substances 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、はんだボール接続
用端子とその形成方法並びに半導体搭載用基板の製造方
法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solder ball connecting terminal, a method of forming the same, and a method of manufacturing a semiconductor mounting substrate.
【０００２】[0002]
【従来の技術】電子部品を搭載するプリント配線板や半
導体を直接搭載する半導体搭載用基板は、近年高密度化
が進んでおり、実装方法も高密度化に対応してきてお
り、配線板のスルーホールに電子部品の端子ピンを挿入
して、はんだで固定する実装方法から、配線板の表面層
の端子にはんだで固定する表面実装方法に変わってきて
いる。2. Description of the Related Art In recent years, the density of printed wiring boards on which electronic components are mounted and semiconductor mounting substrates on which semiconductors are directly mounted have been increasing, and mounting methods have been adapted to higher densities. The mounting method in which the terminal pins of the electronic component are inserted into the holes and fixed with solder has been changed to the surface mounting method in which the terminal pins of the surface layer of the wiring board are fixed with solder.
【０００３】端子ピンをスルーホールに挿入してはんだ
で固定する方法は、端子ピンをスルーホールに差し込
み、溶融したはんだ浴に浮かべて、はんだがスルーホー
ル内に毛管現象によって浸透することを利用している。
表面実装方法は、配線板上の端子にはんだペーストを印
刷して、一度リフロー炉で溶融させて端子上に金属のは
んだを形成させて、その後、表面実装用の電子部品をは
んだ端子の上に乗せて再びリフロー炉ではんだを再溶融
させて電子部品のリードと端子を接合している。A method of inserting a terminal pin into a through hole and fixing it with solder utilizes the fact that the terminal pin is inserted into the through hole, floats on a molten solder bath, and the solder penetrates into the through hole by capillary action. ing.
In the surface mounting method, solder paste is printed on the terminals on the wiring board, melted once in a reflow furnace to form metal solder on the terminals, and then the electronic components for surface mounting are placed on the solder terminals The solder is re-melted in a reflow furnace after being put on, and the leads and terminals of the electronic component are joined.
【０００４】また、表面実装用の電子部品でも、はんだ
接続用のリード端子を平行した２列に形成したデュアル
インラインパッケージ（以下、ＤＩＰという。）や、正
方形のパッケージの４辺にリード端子を設けたクワッド
フラットパッケージ（以下、ＱＦＰという。）から、パ
ッケージの裏面に格子状に配列したはんだボールで接続
するボールグリッドアレイ（以下、ＢＧＡという。）に
なってきている。このＢＧＡを配線板に搭載するはんだ
ボール接続部には、はんだボール接続用端子が形成され
ており、このＢＧＡを配線板に搭載する方法は、はんだ
ボール接続用端子上にフラックスを印刷し、ＢＧＡを乗
せると共に、はんだバンプを有する電子部品、はんだパ
ンプを有する半導体チップ等を配置して、リフロー炉で
はんだを部分的に溶融させて、はんだボールと接合す
る。このＢＧＡの他にも、はんだボールを接続に用いる
半導体搭載用基板としては、チップサイズパッケ−ジ
（以下、ＣＳＰという。）や、マルチチップモジュール
（以下、ＭＣＭという。）も用いられている。[0004] Also, in electronic parts for surface mounting, lead terminals are provided on four sides of a dual in-line package (hereinafter, referred to as DIP) in which lead terminals for solder connection are formed in two parallel rows or a square package. In addition, a ball grid array (hereinafter, referred to as BGA) has been changed from a quad flat package (hereinafter, referred to as QFP), which is connected to the back surface of the package by solder balls arranged in a grid. A solder ball connection terminal is formed at a solder ball connection portion where the BGA is mounted on a wiring board. A method of mounting the BGA on a wiring board is to print a flux on the solder ball connection terminal, And an electronic component having a solder bump, a semiconductor chip having a solder pump, and the like are arranged, and the solder is partially melted in a reflow furnace to be joined to a solder ball. In addition to the BGA, a chip size package (hereinafter, referred to as CSP) or a multi-chip module (hereinafter, referred to as MCM) is also used as a semiconductor mounting substrate using solder balls for connection.
【０００５】このはんだボール接続用端子の構造は、基
板上に形成した銅端子上に、ニッケル、金の皮膜を順次
形成したものである。また、同じような構造では、はん
だボール接続用端子ではなく、ワイヤボンディング用端
子として、端子上に、無電解ニッケル、無電解パラジウ
ム、無電解金めっきを順次形成させたものが特開平９−
８４３８号公報によって知られている。[0005] The structure of this solder ball connection terminal is such that a nickel and gold film are sequentially formed on a copper terminal formed on a substrate. In a similar structure, an electroless nickel, an electroless palladium, and an electroless gold plating are sequentially formed on a terminal as a wire bonding terminal, instead of a solder ball connecting terminal, as disclosed in Japanese Patent Application Laid-Open No. 9-0976.
No. 8438 is known.
【０００６】[0006]
【発明が解決しようとする課題】ところで、従来のはん
だボール接続用端子では、はんだボールによる接続後の
接続信頼性が著しく低下することがあるという課題があ
る。このはんだボールによる接続不良には、はんだボー
ルそのものが破壊する場合と、はんだボールとはんだボ
ール接続用端子の界面が剥離する場合とがあり、はんだ
ボールそのものが破壊する場合は、かなり大きい外力が
加わらなければ起こらず、通常の使用状態での接続不良
は、ほとんどが、はんだボールとはんだボール接続用端
子の界面が剥離することによって起こっているという課
題があった。By the way, the conventional solder ball connection terminal has a problem that the connection reliability after connection by the solder ball may be remarkably reduced. The connection failure caused by the solder ball may be caused by the destruction of the solder ball itself or the separation of the interface between the solder ball and the solder ball connection terminal. When the solder ball itself is broken, a considerably large external force is applied. There is a problem that connection failure in a normal use state is almost always caused by peeling of an interface between a solder ball and a solder ball connection terminal.
【０００７】本発明は、接続信頼性に優れたはんだボー
ル用端子の構造とその形成方法並びにはんだボール用端
子を有する半導体搭載用基板の製造方法を提供すること
を目的とする。It is an object of the present invention to provide a structure of a solder ball terminal having excellent connection reliability, a method of forming the same, and a method of manufacturing a semiconductor mounting substrate having a solder ball terminal.
【０００８】[0008]
【課題を解決するための手段】本発明のはんだボール接
続用端子は、導体の端子上に、無電解ニッケルめっき皮
膜、パラジウムの純度が９９重量％以上の無電解パラジ
ウムめっき皮膜、無電解金めっき皮膜が、その順に形成
されていることを特徴とする。According to the present invention, there is provided a terminal for connecting a solder ball, comprising: an electroless nickel plating film; an electroless palladium plating film having a purity of 99% by weight or more; and an electroless gold plating. It is characterized in that the films are formed in that order.
【０００９】このようなはんだボール接続用端子を形成
する方法は、導体の端子上に、無電解ニッケルめっきを
行い、その無電解ニッケル皮膜の上に、パラジウムの純
度が９９重量％以上の無電解パラジウムめっきを行い、
そのパラジウム皮膜の上に、置換めっきのめっき皮膜を
形成することを特徴とする。A method for forming such solder ball connection terminals is to perform electroless nickel plating on the terminals of the conductor and to form an electroless nickel plating having a purity of 99% by weight or more on the electroless nickel film. Perform palladium plating,
A plating film of displacement plating is formed on the palladium film.
【００１０】半導体搭載用基板を製造する方法は、導体
の端子を有する半導体搭載用基板の、端子の上に、無電
解ニッケルめっきを行い、その無電解ニッケル皮膜の上
に、パラジウムの純度が９９重量％以上の無電解パラジ
ウムめっきを行い、そのパラジウム皮膜の上に、置換め
っきのめっき皮膜を形成することを特徴とする。In a method of manufacturing a semiconductor mounting substrate, electroless nickel plating is performed on terminals of a semiconductor mounting substrate having conductor terminals, and the palladium has a purity of 99% on the electroless nickel film. It is characterized in that electroless palladium plating of at least% by weight is performed, and a plating film of displacement plating is formed on the palladium film.
【００１１】[0011]
【発明の実施の形態】本発明の無電解ニッケルめっき
は、めっき液中のニッケルイオンをニッケルイオンの還
元剤の動きによって、銅、タングステン、モリブデン等
の導体の端子を活性化した表面にニッケルを析出させた
ものであり、無電解ニッケルめっき皮膜の組成は、還元
剤に起因する元素（燐、ホウ素、窒素等）を含有してニ
ッケルとの合金になるのが通常で、無電解ニッケル／燐
合金めっき皮膜、無電解ニッケル／ホウ素合金めっき皮
膜等である。この無電解ニッケルめっき皮膜は、８０重
量％以上の純度のニッケルであることが好ましく、８０
重量％未満であれば、接続の信頼性が低下する場合もあ
る。また、９０重量％以上の純度であればより好まし
い。無電解ニッケルめっき皮膜の膜厚は、０．１μｍ〜
２０μｍであることが好ましく、０．１μｍ未満では、
めっきの効果がなく接続の信頼性が向上せず、２０μｍ
を越えると、効果がそれ以上に向上せず、経済的でない
ので好ましくない。さらには、この無電界ニッケルの厚
さは、０．５〜１０μｍの範囲であることがより好まし
い。BEST MODE FOR CARRYING OUT THE INVENTION In the electroless nickel plating of the present invention, nickel ions in a plating solution are converted to nickel on a surface of a conductor, such as copper, tungsten or molybdenum, which is activated by the action of a reducing agent for nickel ions. The composition of the electroless nickel plating film is usually an alloy with nickel containing elements (phosphorus, boron, nitrogen, etc.) originating from a reducing agent. Alloy plating film, electroless nickel / boron alloy plating film, and the like. This electroless nickel plating film is preferably made of nickel having a purity of 80% by weight or more.
If the amount is less than the weight%, the reliability of the connection may decrease. Further, it is more preferable that the purity is 90% by weight or more. The thickness of the electroless nickel plating film is from 0.1 μm
It is preferably 20 μm, and if less than 0.1 μm,
No effect of plating, reliability of connection does not improve, 20 μm
If it exceeds, the effect is not further improved, and it is not economical. Further, the thickness of the electroless nickel is more preferably in the range of 0.5 to 10 μm.
【００１２】無電解パラジウムめっきは、めっき液中の
パラジウムイオンを還元剤の働きによってニッケル表面
にパラジウムを析出させたものであり、還元剤に亜硫酸
化合物を使用すると無電解パラジウムめっき皮膜の純度
が９９重量％以上になるので、接続の信頼性が高く好ま
しく、また、還元剤に燐含有化合物、ホウ素含有化合物
を使用するとめっき皮膜がパラジウム−燐、パラジウム
−ホウ素合金になり、パラジウムの純度が９９重量％未
満になり、はんだボール接続信頼性が低下するので好ま
しくない。さらには、このパラジウムの純度は９９．５
重量％であることがより好ましい。この無電解パラジウ
ムめっき皮膜の膜厚は、０．０１μｍ〜５μｍであるこ
とが好ましく、０．０１μｍ未満では、めっきの効果が
なく接続の信頼性が向上せず、１μｍを越えると、効果
がそれ以上に向上せず、経済的でないので好ましくな
い。さらに、この無電界パラジウムの厚さは、０．０１
〜１μｍの範囲であることがより好ましい。In the electroless palladium plating, palladium ions in a plating solution are deposited on the nickel surface by the action of a reducing agent. When a sulfurous acid compound is used as the reducing agent, the purity of the electroless palladium plating film becomes 99%. % Or more, the connection reliability is high and preferable. When a phosphorus-containing compound or a boron-containing compound is used as a reducing agent, the plating film becomes a palladium-phosphorus or palladium-boron alloy, and the purity of palladium is 99% by weight. %, The solder ball connection reliability is undesirably reduced. Further, the purity of this palladium is 99.5.
More preferably, it is% by weight. The thickness of the electroless palladium plating film is preferably 0.01 μm to 5 μm. If the thickness is less than 0.01 μm, there is no effect of plating, and the reliability of connection is not improved. It is not preferable because it does not improve more and is not economical. Further, the thickness of this electroless palladium is 0.01
More preferably, it is in the range of 1 μm to 1 μm.
【００１３】無電解金めっきのうち、置換型無電解金め
っきは、下地のパラジウムと溶液中の金イオンとの置換
反応によってパラジウム表面に金皮膜を形成するもので
あり、めっき液には、シアン化合物を含むものと含まな
いものがあるが、いずれのめっき液でも使用できる。ま
た、無電解金めっきのうち、還元型無電解金めっきは、
還元剤の働きによって置換型無電解金めっき皮膜の上に
金を化学反応で析出させるものであり、還元剤にはホウ
素を含むものやイオウを含むものが使用できる。この無
電解金めっき皮膜は、９９重量％以上の純度の金である
ことが好ましく、９９重量％未満であれば、接続の信頼
性が低下する場合もある。さらに、この無電界金めっき
皮膜の純度は、９９．５重量％以上であることがより好
ましい。無電解めっき皮膜の膜厚は、０．００５μｍ〜
３μｍであることが好ましく、０．００５μｍ未満で
は、めっきの効果がなく接続の信頼性が向上せず、３μ
ｍを越えると、効果がそれ以上に向上せず、経済的でな
いので好ましくない。さらには、この無電界金めっき皮
膜の厚さは、０．００５〜０．５μｍの範囲であること
がより好ましい。Among the electroless gold platings, substitution type electroless gold plating forms a gold film on the surface of palladium by a substitution reaction between palladium as a base and gold ions in a solution. Some plating solutions include compounds and some do not, but any plating solution can be used. Among electroless gold plating, reduction type electroless gold plating is
The action of the reducing agent causes gold to be deposited on the substitutional electroless gold plating film by a chemical reaction. As the reducing agent, one containing boron or one containing sulfur can be used. The electroless gold plating film is preferably gold having a purity of 99% by weight or more, and if it is less than 99% by weight, the reliability of the connection may be reduced. Further, the purity of the electroless gold plating film is more preferably 99.5% by weight or more. The thickness of the electroless plating film is 0.005 μm or more.
When the thickness is less than 0.005 μm, there is no effect of plating and the reliability of the connection is not improved.
If it exceeds m, the effect is not further improved and it is not economical, which is not preferable. Further, the thickness of the electroless gold plating film is more preferably in the range of 0.005 to 0.5 μm.
【００１４】また、はんだは、錫と鉛の合金であり、最
も一般的なはんだは、６０重量％錫と４０重量％鉛の共
晶はんだであるが、錫と鉛の組成比がどのようなもので
も使用でき、また、鉛を含まない錫、さらに銀、銅、亜
鉛、ビスマス等の一元素以上を含む錫合金でもよく、は
んだ材料として使用可能である。はんだボール接続用端
子の素材には、銅、タングステン、モリブデン等の金属
が使用できる。はんだボール接続用端子の下地である基
材の種類は、セラミック、半導体、樹脂基板等で、この
樹脂基板には、フェノール、エポキシ、ポリイミド等の
ものが使用でき、さらに、剛性の強い板状の基材、柔軟
なフレキシブルな基材のいずれも用いることができる。
このはんだボール接続用端子を有する半導体搭載用基板
には、ＣＳＰ、ＢＧＡ、ＭＣＭ、配線板、および半導体
チップの他、はんだバンプを有するＣＳＰ、ＢＧＡ、Ｍ
ＣＭ、配線板、および半導体チップがある。The solder is an alloy of tin and lead. The most common solder is a eutectic solder of 60% by weight of tin and 40% by weight of lead. A tin alloy containing one or more elements such as silver, copper, zinc, and bismuth may be used as a solder material. Metals such as copper, tungsten, and molybdenum can be used as the material of the solder ball connection terminal. The type of base material that is the base of the solder ball connection terminals is ceramic, semiconductor, resin substrate, and the like, and the resin substrate can be phenol, epoxy, polyimide, or the like. Both a substrate and a flexible substrate can be used.
The semiconductor mounting substrate having the solder ball connection terminals includes CSP, BGA, MCM, a wiring board, and a semiconductor chip, as well as CSP, BGA, M having solder bumps.
There are CMs, wiring boards, and semiconductor chips.
【００１５】[0015]
【実施例】実施例１ 厚さ１８μｍの銅箔を両面に貼り合わせた、厚さ０．５
ｍｍの銅張りエポキシ積層板であるＭＣＬ−Ｅ−６７９
（日立化成工業株式会社製、商品名）の銅箔の不要な箇
所をエッチング除去し、エッチングレジストを剥離し、
半田レジストを形成した、導体パターンの露出した銅の
はんだボール接続用端子を有する半導体搭載用基板を作
製した。その半導体搭載用基板を、脱脂液であるＺ−２
００（株式会社ワールドメタル製、商品名）に、液温５
０℃で１分間浸漬し、室温で２分間水洗し、１００ｇ／
リットルの過硫酸アンモニウム液に室温で１分間浸漬し
て、ソフトエッチングし、室温で２分間水洗し、１０重
量％の硫酸に、室温で１分間浸漬して、酸洗し、室温で
２分間水洗し、無電解めっきの活性化を、ＳＡ−１００
（日立化成工業株式会社製、商品名）に室温で５分間浸
漬し、室温で２分間浸漬し、無電解ニッケルめっき液で
あるＮＩＰＳ−１００（日立化成工業株式会社製、商品
名）に、液温８５℃で２０分間浸漬して、、Ｎｉ−Ｐめ
っき（Ｐ含有量約７重量％）皮膜を形成し、室温で２分
間水洗し、無電解パラジウムめっき液であるパラテクト
（アトテックジャパン株式会社製、商品名）に、液温７
０℃で５分間浸漬し、純パラジウム（純度９９．９重量
％）の皮膜を形成し、室温で２分間水洗し、非シアン系
の置換型無電解金めっき液であるＨＧＳ−１００（日立
化成工業株式会社製、商品名）に、液温８５℃で１０分
間浸漬して、純金（純度９９．９重量％））の皮膜を形
成した。EXAMPLE 1 A copper foil having a thickness of 18 μm was laminated on both sides to a thickness of 0.5
MCL-E-679 mm copper-clad epoxy laminate
Unnecessary portions of copper foil (made by Hitachi Chemical Co., Ltd.) are removed by etching, the etching resist is removed,
A semiconductor mounting substrate having a solder resist-formed copper solder ball connecting terminal with an exposed conductor pattern was prepared. The substrate for mounting a semiconductor was replaced with a degreasing liquid Z-2.
00 (made by World Metal Co., Ltd., trade name)
Immersed at 0 ° C for 1 minute, washed with water at room temperature for 2 minutes, 100 g /
Immersed in 1 liter of ammonium persulfate solution for 1 minute at room temperature, soft-etched, washed with water for 2 minutes at room temperature, immersed in 10% by weight sulfuric acid for 1 minute at room temperature, pickled, and washed with water for 2 minutes at room temperature. Activation of electroless plating, SA-100
(Hitachi Kasei Kogyo Co., Ltd., trade name) for 5 minutes at room temperature, immersed for 2 minutes at room temperature, the solution into NIPS-100 (Hitachi Chemical Co., Ltd., trade name) which is an electroless nickel plating solution Immersion at a temperature of 85 ° C. for 20 minutes to form a Ni-P plating (P content: about 7% by weight) film, washing with water for 2 minutes at room temperature, and a non-electrolytic palladium plating solution, Paratec (manufactured by Atotech Japan KK) , Product name), liquid temperature 7
Immersion at 0 ° C. for 5 minutes to form a film of pure palladium (purity 99.9% by weight), washing with water at room temperature for 2 minutes, and a non-cyanide substitution type electroless gold plating solution HGS-100 (Hitachi Chemical Co., Ltd.) (Trade name, manufactured by Kogyo Co., Ltd.) at a liquid temperature of 85 ° C. for 10 minutes to form a film of pure gold (purity: 99.9% by weight).
【００１６】実施例２ 金めっきに、シアン系の置換型無電解金めっき液である
ＩＭ−ＧＯＬＤ（日本高純度化学株式会社製、商品名）
に、液温８５℃で１０分間浸漬し、純金（純度９９．９
重量％））の皮膜を形成し、室温で２分間水洗し、続い
て還元型無電解金めっき液であるＨＧＳ−２０００（日
立化成工業株式会社製、商品名）に、液温６５℃で４０
分間浸漬し、純金（純度９９．９重量％））の皮膜を形
成した以外は、実施例１と同様にして。はんだボール接
続用短資を有する半導体搭載用基板を作製した。EXAMPLE 2 IM-GOLD (trade name, manufactured by Nippon Kojundo Chemical Co., Ltd.), which is a cyan substitutional electroless gold plating solution, was used for gold plating.
At 85 ° C. for 10 minutes in pure gold (purity 99.9).
% By weight), washed with water at room temperature for 2 minutes, and then added to HGS-2000 (manufactured by Hitachi Chemical Co., Ltd., trade name) as a reduction type electroless gold plating solution at a solution temperature of 65 ° C. for 40 minutes.
The same procedure as in Example 1 was conducted except that a film of pure gold (purity: 99.9% by weight) was formed by immersion for minutes. A semiconductor mounting substrate having a short-circuited solder ball connection was fabricated.
【００１７】比較例１ パラジウムめっきに、無電解パラジウムめっき液である
ＡＰＰ（石原薬品株式会社製、商品名）に、液温５０℃
で３０分間浸漬し、Ｐｄ−Ｐ（Ｐ含有量４重量％））の
めっき皮膜を形成した以外は、実施例１と同様にして半
導体搭載用基板を作製した。Comparative Example 1 An electroless palladium plating solution, APP (trade name, manufactured by Ishihara Chemical Co., Ltd.) was added to palladium plating at a liquid temperature of 50 ° C.
For 30 minutes to form a Pd-P (P content: 4% by weight)) plating film, and a semiconductor mounting substrate was produced in the same manner as in Example 1.
【００１８】比較例２ 無電解パラジウムめっきを行わない以外は、実施例１と
同様にして半導体搭載用基板を作製した。Comparative Example 2 A semiconductor mounting substrate was produced in the same manner as in Example 1 except that electroless palladium plating was not performed.
【００１９】実施例１、２と比較例１、２で作製した、
はんだボール接続用端子数が２５６端子の半導体搭載用
基板のはんだボール接続用端子に、はんだボールをリフ
ロー炉を用いて搭載した後、はんだボールのシェア（引
き剥がし）試験を行った結果、実施例１、２のサンプル
では、全てのはんだボールが、はんだボール内での剪断
による破壊まで耐えることができたが、比較例１、２の
従来のものは、約５０重量％の端子において、無電解ニ
ッケルめっきとはんだボールの界面で破壊が発生し、接
続信頼性が不良であった。The samples prepared in Examples 1 and 2 and Comparative Examples 1 and 2
After the solder balls were mounted on the solder ball connecting terminals of the semiconductor mounting substrate having 256 solder ball connecting terminals using a reflow furnace, a shear (peeling) test of the solder balls was performed. In the samples of Examples 1 and 2, all the solder balls were able to withstand the destruction due to the shearing in the solder balls. Destruction occurred at the interface between the nickel plating and the solder balls, and the connection reliability was poor.
【００２０】[0020]
【発明の効果】以上に説明したとおり、本発明によっ
て、接続信頼性に優れたはんだボール用端子の構造とそ
の形成方法並びにはんだボール用端子を有する半導体搭
載用基板の製造方法を提供することができる。As described above, according to the present invention, it is possible to provide a structure of a solder ball terminal having excellent connection reliability, a method of forming the same, and a method of manufacturing a semiconductor mounting substrate having a solder ball terminal. it can.
Claims (10)
膜、パラジウムの純度が９９重量％以上の無電解パラジ
ウムめっき皮膜、無電解金めっき皮膜が、その順に形成
されていることを特徴とするはんだボール接続用端子。An electroless nickel plating film, an electroless palladium plating film having a purity of 99% by weight or more, and an electroless gold plating film are formed on a terminal of the conductor in this order. Terminal for solder ball connection.
以上の純度のニッケルであることを特徴とする請求項１
に記載のはんだボール接続用端子。2. An electroless nickel plating film comprising 80% by weight.
2. The nickel of the above purity.
The solder ball connection terminal described in (1).
１μｍ〜２０μｍであることを特徴とする請求項１また
は２に記載のはんだボール接続用端子。3. The electroless nickel plating film having a thickness of 0.
The solder ball connection terminal according to claim 1, wherein the terminal has a thickness of 1 μm to 20 μm.
０．０１μｍ〜５μｍであることを特徴とする請求項１
〜３のうちいずれかに記載のはんだボール接続用端子。4. The film thickness of the electroless palladium plating film is as follows:
2. The structure according to claim 1, wherein the thickness is 0.01 μm to 5 μm.
4. The terminal for connecting a solder ball according to any one of items 1 to 3.
純度の金であることを特徴とする請求項１〜４のうちい
ずれかに記載のはんだボール接続用端子。5. The solder ball connection terminal according to claim 1, wherein the electroless gold plating film is made of gold having a purity of 99% by weight or more.
ｍ〜３μｍであることを特徴とする請求項１〜５のうち
いずれかに記載のはんだボール接続用端子。6. The electroless plating film having a thickness of 0.005 μm.
The solder ball connection terminal according to any one of claims 1 to 5, wherein the thickness is from m to 3 µm.
っき皮膜であることを特徴とする請求項１〜６のうちい
ずれかに記載のはんだボール接続用端子。7. The solder ball connection terminal according to claim 1, wherein the electroless gold plating film is a substitution type electroless gold plating film.
っき皮膜上に還元型無電解金めっき皮膜を形成した多層
皮膜であることを特徴とする請求項１〜６のうちいずれ
かに記載のはんだボール接続用端子。8. The electroless gold plating film according to claim 1, wherein the electroless gold plating film is a multilayer film formed by forming a reduction type electroless gold plating film on a substitution type electroless gold plating film. The solder ball connection terminal described.
行い、その無電解ニッケル皮膜の上に、パラジウムの純
度が９９重量％以上の無電解パラジウムめっきを行い、
そのパラジウム皮膜の上に、置換めっきのめっき皮膜を
形成することを特徴とするはんだボール接続用端子の形
成方法。9. An electroless nickel plating is performed on the terminal of the conductor, and an electroless palladium plating having a purity of 99% by weight or more is performed on the electroless nickel film,
A method for forming a terminal for connecting a solder ball, comprising forming a plating film of displacement plating on the palladium film.
の、端子の上に、無電解ニッケルめっきを行い、その無
電解ニッケル皮膜の上に、パラジウムの純度が９９重量
％以上の無電解パラジウムめっきを行い、そのパラジウ
ム皮膜の上に、置換めっきのめっき皮膜を形成すること
を特徴とする半導体搭載用基板の製造方法。10. An electroless nickel plating on a terminal of a semiconductor mounting substrate having a conductor terminal, the electroless nickel plating being performed on the terminal, and the palladium having a purity of 99% by weight or more on the electroless nickel film. And forming a plating film of displacement plating on the palladium film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11078797A JP2000277897A (en) | 1999-03-24 | 1999-03-24 | Terminal for solder-ball connection and its formation method and as manufacture of board for semiconductor mounting |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11078797A JP2000277897A (en) | 1999-03-24 | 1999-03-24 | Terminal for solder-ball connection and its formation method and as manufacture of board for semiconductor mounting |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2000277897A true JP2000277897A (en) | 2000-10-06 |
Family
ID=13671866
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11078797A Pending JP2000277897A (en) | 1999-03-24 | 1999-03-24 | Terminal for solder-ball connection and its formation method and as manufacture of board for semiconductor mounting |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2000277897A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000332395A (en) * | 1999-05-17 | 2000-11-30 | Ibiden Co Ltd | Printed wiring board |
| JP2002134645A (en) * | 2000-10-27 | 2002-05-10 | Kyocera Corp | Wiring board |
| JP2007134692A (en) * | 2005-10-14 | 2007-05-31 | Hitachi Chem Co Ltd | Semiconductor chip mounted substrate, and semiconductor package using the same |
| JP2009114508A (en) * | 2007-11-07 | 2009-05-28 | Hitachi Chem Co Ltd | Method for manufacturing connection terminal, and method for manufacturing substrate for mounting semiconductor chip by using the connection terminal |
| JP2009155668A (en) * | 2007-12-25 | 2009-07-16 | Hitachi Chem Co Ltd | Pretreatment liquid for promoting starting of electroless palladium plating reaction, electroless plating method using the pretreatment liquid, connection terminal formed by the electroless plating method, and semiconductor package using the connection terminal and its manufacturing method |
| US20100071940A1 (en) * | 2007-04-27 | 2010-03-25 | Hitachi Chemical Company, Ltd. | Connecting terminal, semiconductor package using connecting terminal and method for manufacturing semiconductor package |
| KR20140043753A (en) * | 2011-06-14 | 2014-04-10 | 아토테크더치랜드게엠베하 | Wire bondable surface for microelectronic devices |
-
1999
- 1999-03-24 JP JP11078797A patent/JP2000277897A/en active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000332395A (en) * | 1999-05-17 | 2000-11-30 | Ibiden Co Ltd | Printed wiring board |
| JP2002134645A (en) * | 2000-10-27 | 2002-05-10 | Kyocera Corp | Wiring board |
| JP4511011B2 (en) * | 2000-10-27 | 2010-07-28 | 京セラ株式会社 | Wiring board manufacturing method |
| JP2007134692A (en) * | 2005-10-14 | 2007-05-31 | Hitachi Chem Co Ltd | Semiconductor chip mounted substrate, and semiconductor package using the same |
| US20100071940A1 (en) * | 2007-04-27 | 2010-03-25 | Hitachi Chemical Company, Ltd. | Connecting terminal, semiconductor package using connecting terminal and method for manufacturing semiconductor package |
| US8426742B2 (en) | 2007-04-27 | 2013-04-23 | Hitachi Chemical Company, Ltd. | Connecting terminal, semiconductor package using connecting terminal and method for manufacturing semiconductor package |
| JP2009114508A (en) * | 2007-11-07 | 2009-05-28 | Hitachi Chem Co Ltd | Method for manufacturing connection terminal, and method for manufacturing substrate for mounting semiconductor chip by using the connection terminal |
| JP2009155668A (en) * | 2007-12-25 | 2009-07-16 | Hitachi Chem Co Ltd | Pretreatment liquid for promoting starting of electroless palladium plating reaction, electroless plating method using the pretreatment liquid, connection terminal formed by the electroless plating method, and semiconductor package using the connection terminal and its manufacturing method |
| KR20140043753A (en) * | 2011-06-14 | 2014-04-10 | 아토테크더치랜드게엠베하 | Wire bondable surface for microelectronic devices |
| JP2014517540A (en) * | 2011-06-14 | 2014-07-17 | アトテツク・ドイチユラント・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング | Wirebondable surfaces for microelectronic devices |
| JP2017123466A (en) * | 2011-06-14 | 2017-07-13 | アトテツク・ドイチユラント・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツングＡｔｏｔｅｃｈ Ｄｅｕｔｓｃｈｌａｎｄ ＧｍｂＨ | Wire bondable surface for microelectronic device |
| KR102004555B1 (en) * | 2011-06-14 | 2019-07-26 | 아토테크더치랜드게엠베하 | Wire bondable surface for microelectronic devices |
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