JP2000252750A - Numerically controlled oscillator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress degradation in an S/N of an output of a numerically controlled oscillator by obtaining a uniform spurious radiation characteristic with a uniform frequency from the numerically controlled oscillator despite of a simple configuration or decreasing harmonic spurious radiation. SOLUTION: The numerically controlled oscillator consists of an accumulation section 3 that receives a phase signal, accumulates the signal for each operating clock and outputs an accumulated value, an adder 7 that adds a noise with a small fluctuation whose ensemble mean is zero to the accumulated value at a random time interval, a divider 8 that divides an output of the adder 7 by a specific integer, and a lookup table 9 that selects a value corresponding to an output of the divider 8 and outputs the selected value. Thus, the spurious characteristic with a uniform frequency can be obtained without causing spurious radiation with a specific frequency despite of a simple configuration.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a numerically controlled oscillator used for a frequency conversion circuit and the like.

[0002]

2. Description of the Related Art Conventionally, there is a document (Digital SpectraOfNonu) regarding the spurious of a numerically controlled oscillator.
niformlySampledSignals-Di
digitalLook-UpTunableSinuso
idalOscillators, IEEE Tran
s. Instrum. Meas. , VOL. 37, N
O. 3, SEP. 1988), and as a countermeasure, a method using a remainder obtained by dividing an accumulated result as disclosed in JP-A-6-252645, or a method disclosed in JP-A-8-97744.
Japanese Patent Application Laid-Open No.
There is known a method of changing an operation clock to vary an output pulse width as in 219624.

FIG. 8 shows a configuration of a conventional numerically controlled oscillator. Assuming that the operating clock frequency is fc, the oscillation frequency is fo, and the number of divisions of the look-up table in the phase direction is N, the input phase is given by Δφ = foN / fc. In the accumulator 3, the adder 1 sequentially adds the phases Δφ in synchronization with the operation clock Clk input to the register 2. Due to this accumulation, the phase of the oscillation signal is advanced for each Clk, divided by a fixed integer value M by the divider 8, and one of the values discretized in the phase direction and stored in the look-up table 9 is output. Normally, a register that can accumulate up to N + M is used. When the accumulated value of the register 2 becomes N + M or more, modulo (N + M) is stored.

The output value from this numerically controlled oscillator is usually a digital value, and when converting it to an analog value, D / D
After the A conversion, a component equal to or higher than the return frequency is removed by the LPF.

When the accumulated result is divided by the divider 8 and there is a remainder, an error occurs in the output of the numerically controlled oscillator, since the output is at a phase point not stored in the look-up table 9. Causes harmonic spurs. Although this harmonic spurious can be reduced by increasing the number of divisions N of the look-up table, the circuit scale increases.

The above-mentioned harmonic spurious is large at a specific frequency, and is represented by a schematic diagram as shown in FIG. For this reason, when using a numerically controlled oscillator for a frequency conversion circuit or the like,
The harmonic spurious is also superimposed on the signal. When the signal on which the harmonic spurious is superimposed is subjected to frequency conversion and the spectrum is analyzed, the influence of the harmonic spurious occurs. For example, when analyzing transmitter Id information (TII) transmitted in a null signal section of digital audio broadcasting (DAB), the influence of this spurious occurs.

[0007]

As described above, in the conventional numerically controlled oscillator, various problems occur due to the occurrence of spurious at a specific frequency. In order to avoid this problem, it is required to have a spurious characteristic in which spurs occur at a uniform frequency as shown in the schematic diagram of FIG. 10 or to reduce harmonic spurs as much as possible. I have.

An object of the present invention is to suppress deterioration of the signal-to-noise ratio of the numerically controlled oscillator output by obtaining a characteristic in which spurious components having a uniform frequency are generated by a simple configuration or by reducing harmonic spurious components. Aim.

[0009]

In order to solve this problem, the present invention provides a method in which a value of an accumulating unit in a numerically controlled oscillator includes, at random time intervals, noise having a small fluctuation such that an ensemble average is zero. With the configuration in which the spurs are added, a characteristic in which spurious at a specific frequency does not occur and spurious at a uniform frequency is obtained is obtained.

In addition, the present invention reduces the harmonic spurious by providing means for estimating when a value not stored in the lookup table is input.

With such a simple configuration, it is possible to realize a numerically controlled oscillator with a small deterioration of the signal-to-noise ratio.

[0012]

According to the first aspect of the present invention, there is provided an accumulating means for inputting a phase signal and accumulating the same for each operation clock to output a cumulative value, and a variation for which a collective average is zero. Adding means for adding noise having a small value to the accumulated value at random time intervals, dividing means for dividing the output of the adding means by a specific integer, and a look for selecting and outputting a value corresponding to the output of the dividing means A numerically controlled oscillator characterized by having an up-table, and has an operation of obtaining a numerically controlled oscillator output in which spurious of uniform frequency is generated with a simple configuration.

According to a second aspect of the present invention, the noise having a small fluctuation is a signal in which values having a constant absolute value and different signs are alternately arranged at random time intervals. This is a numerically controlled oscillator, and has an operation of obtaining a numerically controlled oscillator output in which spurious of uniform frequency is generated with a simpler configuration.

Further, as in the invention according to claim 3, noise generating means for generating noise with small fluctuation, random time interval generating means for outputting information of random time intervals, It is preferable to provide a numerically controlled oscillator according to claim 1 or 2, further comprising switch means for outputting or cutting off the noise to information adding means according to information.

According to a fourth aspect of the present invention, the random time interval generating means outputs a counter for counting an operation clock and information of a random time interval stored in advance based on the output of the counter. 4. The numerically controlled oscillator according to claim 3, wherein a circuit for generating a random time interval is not required, and a spurious of uniform frequency is generated with a simpler configuration. Is obtained.

According to a fifth aspect of the present invention, the phase check means is arranged before the accumulation means, and the phase check means controls the switch means based on the input phase information. The numerically controlled oscillator according to 3 or 4, wherein when it is detected in advance that no spurious is generated, the addition of noise is stopped,
Since the accumulated value is not forcibly changed, there is an effect that a numerically controlled oscillator output without deterioration of the signal-to-noise ratio can be obtained.

In particular, as in the invention according to claim 6, the phase check means divides the input phase information by a specific integer used by the division means, and when the remainder is zero, the operation of the switch means It is preferable that the numerically controlled oscillator according to claim 5 is forcibly turned off.

According to a seventh aspect of the present invention, when the external processing using the numerically controlled oscillator output is not a frequency spectrum analysis, the switching means forcibly turns off the operation. Or the numerically controlled oscillator according to 4, wherein if there is no effect even if spurious of a specific frequency occurs, the addition of noise is stopped so that the accumulated value is not forcibly changed. Has the effect of obtaining a numerically controlled oscillator output without deterioration of

According to a further aspect of the present invention, there is provided an accumulating means for inputting a phase signal, accumulating the signal for each operation clock and outputting a cumulative value, and dividing an output of the accumulating means by a specific integer to obtain a quotient and a remainder. , A lookup value for selecting and outputting a phase value corresponding to the quotient and an adjacent value of the phase value, and a correction value for estimating a true value using the remainder and the phase value and the adjacent value. A numerically controlled oscillator characterized by having an estimating means, and has an effect that a signal-to-noise ratio is improved as compared with a conventional numerically controlled oscillator output.

And, as in the invention according to claim 9,
9. The numerically controlled oscillator according to claim 8, wherein the correction value estimating means estimates the true value from before and after the value stored in the look-up table by shifting the phase direction based on the remainder. Is preferred.

According to a tenth aspect of the present invention, the correction value estimating means linearly interpolates a value stored in a look-up table using the remainder, the phase value, and the adjacent value to obtain a true value. 9. The method of claim 8, wherein
The numerically controlled oscillator described above has an effect of improving the signal-to-noise ratio compared with the conventional numerically controlled oscillator output with a simpler configuration.

According to an eleventh aspect of the present invention, there is provided a frequency conversion circuit using the numerically controlled oscillator according to any one of the first to eleventh aspects, and a high-performance circuit using the numerically controlled oscillator having a good signal-to-noise ratio. This has the effect that a simple circuit can be obtained.

Hereinafter, an embodiment of the present invention will be described with reference to FIG.
This will be described with reference to FIG.

(Embodiment 1) FIG. 1 is a conceptual diagram showing the configuration of a numerically controlled oscillator according to the present embodiment, in which an operation clock frequency, an oscillation frequency, and a phase determined by the number of divisions of a lookup table in the phase direction are accumulated. And a numerically controlled oscillator that outputs a value of a look-up table based on the accumulation result. Adder 1, register 2, accumulator 3,
It comprises a random time interval generator 4, a noise generator 5, a switch 6, an adder 7, a divider 8, and a look-up table 9.

As shown in FIG. 1, the operating clock frequency f
c, the oscillation frequency is fo, and the number of divisions of the look-up table in the phase direction is N, and the input phase is Δφ = foN / f
A register 2 which is given by c and can normally accumulate up to N + M is used. Here, M is a fixed integer value used in the divider 8.

The input phase Δφ is sequentially added by the adder 1 in the accumulator 3 in synchronization with the operation clock Clk input to the register 2, so that an accumulated value is obtained. By this accumulation, the phase advances for each Clk. When the accumulated value becomes N + M or more, the modulo (N + M) is stored in the register 2.

In the present embodiment, noise having a small fluctuation such that the collective average becomes zero is added to such an accumulated value at random time intervals. That is, the operation clock C
The switch 6 is activated by a signal from the random time interval generator 4 synchronized with lk, and the noise from the noise generator 5 is added to the accumulated value in the adder 7.

The output of the adder 7 is divided by a fixed integer value M in a divider 8, and one of the values discretized in a phase direction in a look-up table 9 and stored is output.

As described above, according to the present embodiment, noise having a small fluctuation such that the collective average is zero is added to the accumulated value of the accumulating unit in the numerically controlled oscillator at random time intervals. It is possible to suppress the occurrence of spurious at a specific frequency, to obtain the characteristic of generating spurious at a uniform frequency, and to realize a numerically controlled oscillator with small deterioration of the signal-to-noise ratio.

Further, the numerically controlled oscillator of this embodiment is
The use of the PLL circuit, the AFC circuit, and the frequency conversion circuit can improve the performance, respectively, and if it is used, a more reliable demodulator and transmission system can be constructed.

(Embodiment 2) FIG. 2 is a conceptual diagram showing a configuration of a numerically controlled oscillator according to the present embodiment, and shows a numerically controlled oscillator having a configuration different from that of (Embodiment 1). It comprises an adder 1, a register 2, an accumulator 3, a random time interval generator 4, a constant value generator 10, a switch 6, an adder 7, a divider 8, and a look-up table 9.

The constant value generator 10 alternately outputs + k and -k according to a signal from the random time interval generator 4. The output from the constant value generator 10 is added to the accumulated value in the adder 7 by activating the switch 6 according to the signal from the random time interval generator 4.

Other operations and effects are the same as those of the first embodiment.

(Embodiment 3) FIG. 3 is a conceptual diagram showing a configuration of a numerically controlled oscillator according to the present embodiment. Adder 1, register 2, accumulator 3, random time interval generator 4, noise generator 5, switch 6, adder 7, divider 8,
It is configured using a look-up table 9, a counter 11, and a memory 12.

The random time interval generator 4 in the present embodiment counts the operation clock Clk, inputs the count value to the memory 12, and outputs a signal when the count value is stored in advance. The switch 6 is operated by this signal, and the noise from the noise generator 5 is added to the accumulated value in the adder 7.

Other operations and effects are the same as those of the first embodiment.

(Embodiment 4) FIG. 4 is a conceptual diagram showing a configuration of a numerically controlled oscillator according to the present embodiment. Adder 1, register 2, accumulator 3, random time interval generator 4, noise generator 5, switch 6, adder 7, divider 8,
It is configured using a look-up table 9 and a check circuit 13.

Check circuit 13 in the present embodiment
Checks whether the remainder is zero when the input phase is divided by M, and if so, switch 6 is always off, regardless of the output of random time interval generator 4, Is not added. That is, in the divider 8, if the remainder is always zero when divided by M, ordinary accumulation means is used. Thereby, the output of the numerical control generator can be obtained without deteriorating the signal-to-noise ratio.

If the remainder is not zero in the check circuit 13, a control signal is sent to the switch 6 so as to perform the same operation as in the first embodiment.

Other operations are the same as those in the first embodiment.

As described above, according to the present embodiment, the output of the accumulator is not changed when it is detected in advance that spurs do not occur, so that the output of the numerically controlled oscillator with reduced signal-to-noise ratio is suppressed. Can be obtained.

In the present embodiment, the configuration in which the check circuit 13 is added to the configuration of (Embodiment 1) is shown, but the configuration of (Embodiment 2) or (Embodiment 3) is similarly applied. A check circuit may be added.

(Embodiment 5) FIG. 5 is a conceptual diagram showing a configuration of a numerically controlled oscillator according to the present embodiment. Adder 1, register 2, accumulator 3, random time interval generator 4, noise generator 5, switch 6, adder 7, divider 8,
The lookup table 9 and the operation determination circuit 14 are used.

Operation determination circuit 14 in the present embodiment
Is a function that determines whether an operation performed using a numerically controlled oscillator output is a frequency spectrum analysis in a circuit external to the numerically controlled oscillator that performs processing using the numerically controlled oscillator output (hereinafter, referred to as a subsequent circuit). In the case where the processing information in the subsequent circuit is input and the information that the frequency spectrum analysis is performed is input, the first embodiment will be described.
A control signal is sent to the switch 6 so as to change the output of the accumulation unit as in (Embodiment 4).

When the subsequent circuit does not perform the frequency spectrum analysis or performs other operations, the switch 6 is provided with a random time interval so as not to change the output of the accumulating unit using ordinary accumulating means. A control signal is sent so as to be kept off regardless of the output of the generator 4.

Other operations are the same as those in the first embodiment.

As described above, according to the present embodiment, the output of the accumulating unit is changed when the subsequent circuit performs the frequency spectrum analysis, and the output of the accumulating unit is not changed when the subsequent circuit does not perform the frequency spectrum analysis. A numerically controlled oscillator output with reduced noise-to-noise ratio can be obtained.

In the present embodiment, the operation determination circuit 14 for inputting processing information from a subsequent circuit is provided, but a signal for controlling the switch 6 is directly output from the subsequent circuit without providing this. It is good also as composition.

(Embodiment 6) FIG. 6 is a conceptual diagram showing a configuration of a numerically controlled oscillator according to the present embodiment. It comprises an adder 1, a register 2, an accumulator 3, a divider 8, a look-up table 9, and a correction value estimation circuit 15.

The look-up table 9 outputs the value of the optimum phase and the value of the optimum phase + 1 from the quotient obtained by the divider 8 to the correction value estimation circuit 15. In addition, the remainder obtained from the divider 8 is also input to the correction value estimation circuit 15, and a true value as an oscillator is estimated from these three values, and is output as a numerically controlled oscillator output.

As described above, in this embodiment, even if a value not stored in the lookup table 9 is input by the correction value estimation circuit 15, the phase direction is shifted using the remainder and stored. By estimating the value from before and after the value and outputting a value closer to the true value, it is possible to reduce the harmonic spurious.

(Embodiment 7) FIG. 7 is a conceptual diagram showing a configuration of a numerically controlled oscillator according to the present embodiment. It is configured using an adder 1, a register 2, an accumulator 3, a divider 8, a look-up table 9, and a correction value linear estimation circuit 16.

As in the sixth embodiment, the look-up table 9 outputs the value of the optimum phase and the value of the optimum phase + 1 from the quotient obtained by the divider 8 to the correction value linear estimation circuit 16. In addition, the remainder obtained from the divider 8 is also input to the correction value linear estimation circuit 16, which linearly interpolates the value of the optimal phase and the value of the optimal phase + 1, and estimates an intermediate value according to the magnitude of the remainder.

As described above, in this embodiment, the correction value linear estimating circuit 16 can easily estimate and output an intermediate value that is not stored in the lookup table, and can output a true value. By outputting a close value, it is possible to reduce harmonic spurious.

[0055]

As described above, according to the present invention, noise with small fluctuation such that the collective average is zero is added at random time intervals to the value of the accumulator in the numerically controlled oscillator. As a result, spurious of specific frequency does not occur,
A characteristic in which spurious of a uniform frequency occurs can be obtained.

Alternatively, according to the present invention, by providing means for estimating when a value not stored in the look-up table is input, harmonic spurious can be reduced.

With such a simple configuration, it is possible to realize a numerically controlled oscillator having a small deterioration of the signal-to-noise ratio. For example, for a frequency spectrum analysis performed using the output of this numerically controlled oscillator, The advantageous effect of reducing the influence can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a numerically controlled oscillator according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a numerically controlled oscillator according to one embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a numerically controlled oscillator according to one embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a numerically controlled oscillator according to one embodiment of the present invention.

FIG. 5 is a block diagram showing a configuration of a numerically controlled oscillator according to one embodiment of the present invention.

FIG. 6 is a block diagram showing a configuration of a numerically controlled oscillator according to one embodiment of the present invention.

FIG. 7 is a block diagram showing a configuration of a numerically controlled oscillator according to an embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration of a conventional numerically controlled oscillator.

FIG. 9 is a schematic diagram showing spurious characteristics of a conventional numerically controlled oscillator.

FIG. 10 is a schematic diagram showing ideal spurious characteristics required for a numerically controlled oscillator.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 adder 2 register 3 accumulator 4 random time interval generator 5 noise generator 6 switch 7 adder 8 divider 9 look-up table 10 constant value generator 11 counter 12 memory 13 check circuit 14 operation determination circuit 15 correction value estimation Circuit 16 Correction value linear estimation circuit

Claims (11)

[Claims] 1. An accumulator for inputting a phase signal and accumulating the accumulated signal for each operation clock to output an accumulated value, and adding noise having a small variation such that a collective average is zero to the accumulated value at random time intervals. A numerically controlled oscillator comprising: an adding means for performing the operation; a dividing means for dividing an output of the adding means by a specific integer; and a lookup table for selecting and outputting a value corresponding to the output of the dividing means. 2. The numerically controlled oscillator according to claim 1, wherein the noise having a small fluctuation is a signal in which values having a constant absolute value and different signs are alternately arranged at random time intervals. 3. A noise generating means for generating noise with small fluctuation, a random time interval generating means for outputting information of a random time interval, and outputting or blocking the noise to an adding means based on the information of the random time interval. 3. The numerically controlled oscillator according to claim 1, further comprising: a switch unit that performs switching. 4. The random time interval generating means has a counter for counting an operation clock, and a storage means for outputting information on a random time interval stored in advance based on an output of the counter. Claim 3
Numerically controlled oscillator as described. 5. The numerical value according to claim 3, wherein a phase check unit is arranged before the accumulation unit, and the phase check unit controls the switch unit based on input phase information. Controlled oscillator. 6. The phase checking means divides the input phase information by a specific integer used by the dividing means, and forcibly turns off the operation of the switch means when the remainder is zero. The numerically controlled oscillator according to claim 5, wherein 7. The numerically controlled oscillator according to claim 3, wherein the switch means forcibly turns off the operation when the external processing using the numerically controlled oscillator output is not a frequency spectrum analysis. . 8. An accumulator for inputting a phase signal and accumulating for each operation clock to output an accumulative value, a divider for dividing an output of the accumulator by a specific integer to obtain a quotient and a remainder, A lookup table that selects and outputs a phase value corresponding to a quotient and an adjacent value of the phase value, and a correction value estimating unit that estimates a true value using the remainder, the phase value, and the adjacent value. Numerically controlled oscillator. 9. The numerical value according to claim 8, wherein the correction value estimating means estimates the true value from before and after the value stored in the look-up table by shifting the phase direction based on the remainder. Controlled oscillator. 10. A correction value estimating means for estimating a true value by linearly interpolating between values stored in a lookup table using the remainder, the phase value, and the adjacent value. 9. The numerically controlled oscillator according to claim 8, wherein 11. A frequency conversion circuit using the numerically controlled oscillator according to claim 1.