JP2000223752A - Optical semiconductor device and its forming method - Google Patents

Optical semiconductor device and its forming method

Info

Publication number
JP2000223752A
JP2000223752A JP2323699A JP2323699A JP2000223752A JP 2000223752 A JP2000223752 A JP 2000223752A JP 2323699 A JP2323699 A JP 2323699A JP 2323699 A JP2323699 A JP 2323699A JP 2000223752 A JP2000223752 A JP 2000223752A
Authority
JP
Japan
Prior art keywords
optical semiconductor
resin
flat plate
semiconductor device
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2323699A
Other languages
Japanese (ja)
Other versions
JP4279388B2 (en
Inventor
Ryoma Suenaga
良馬 末永
Yoichi Matsuoka
洋一 松岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nichia Chemical Industries Ltd
Jtekt Column Systems Corp
Original Assignee
Nichia Chemical Industries Ltd
Fuji Kiko Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nichia Chemical Industries Ltd, Fuji Kiko Co Ltd filed Critical Nichia Chemical Industries Ltd
Priority to JP02323699A priority Critical patent/JP4279388B2/en
Publication of JP2000223752A publication Critical patent/JP2000223752A/en
Application granted granted Critical
Publication of JP4279388B2 publication Critical patent/JP4279388B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45015Cross-sectional shape being circular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49107Connecting at different heights on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Led Device Packages (AREA)
  • Led Devices (AREA)
  • Light Receiving Elements (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide an optical semiconductor device of high reliability which can be especially miniaturized, regarding an optical semiconductor device for surface mount which is used as an SMD(surface mount device) or the like, and a forming method of the device. SOLUTION: This optical semiconductor device is provided with a thin plate 111 which is arranged on one surface side of an insulating flat plate 101 in which a penetrating hole is formed, and is thinner than the insulating flat plate 101; an optical semiconductor element 103 which is die-bonded on the thin plate on a bottom surface of a cavity 102 using the penetrating hole, by using die bonding material having at least resin; lead electrodes 105, 106 electrically connecting the optical semiconductor element 103 arranged on the insulating flat plate 101 with an external part; and light transmitting resin with which the optical semiconductor element 103 in the cavity 102 is covered. Especially, the surface of the thin plate 111 is formed of at least, resin or porous material.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はスイッチ内照明やド
ットマトリクスディスプレイの各種光源や光センサな
ど、SMD(Surface Maunt Devic
e)などとして利用される表面実装用の光半導体装置に
係わり、特に小型化可能であり、信頼性の高い光半導体
装置及びその形成方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an SMD (Surface Mount Device) such as an illumination in a switch, various light sources of a dot matrix display, and an optical sensor.
The present invention relates to an optical semiconductor device for surface mounting used as e) and the like, and particularly to an optical semiconductor device which can be miniaturized and has high reliability and a method for forming the same.

【0002】[0002]

【従来の技術】今日、発光素子や受光素子はスイッチ内
照明、ドットマトリクスディスプレイ等の各種光源やセ
ンサとして種々利用されている。利用分野の広がりと共
により小型化され回路基板上に直接実装できるようなS
MD(Surface Maunt Device)な
どとして利用される表面実装用の光半導体装置が開発さ
れつつある。光半導体装置は極めて小さく形成できると
共に内部に配置される光半導体素子を保護するパッケー
ジなどにより、扱い安さを向上させることができる。
2. Description of the Related Art Today, light-emitting elements and light-receiving elements are variously used as various light sources and sensors for illumination in switches, dot matrix displays, and the like. As the field of application expands, S becomes smaller and can be directly mounted on a circuit board.
An optical semiconductor device for surface mounting, which is used as an MD (Surface Mount Device) or the like, is being developed. The optical semiconductor device can be formed extremely small, and the handling efficiency can be improved by a package or the like for protecting the optical semiconductor element disposed inside.

【0003】このような光半導体装置として特開平8−
125227号などが挙げられる。光半導体装置の具体
的一例として本発明と比較のためのチップ部品型発光ダ
イオードを図6に示す。図6に示す表面実装型発光ダイ
オード600は、貫通孔602を有する樹脂基板601
に金属薄板604を設けたパッケージを利用してある。
パッケージの表面から側面、裏面にかけては一対の配線
パターン605、606が形成されている。一方の配線
パターン606は、貫通孔内の側壁に沿って延びた金属
薄板となっている。金属薄板上にはAgペースト607
を用いてLEDチップを固定すると共にLEDチップ6
03の一方の電極と導通を取っている。他方の配線パタ
ーン605はパッケージに設けられた貫通孔の外側上面
においてLEDチップ603の他方の電極と金属細線6
08を用いて導通を取っている。LEDチップ上に透明
樹脂609を設けることにより表面実装型発光ダイオー
ド600を形成してある。
As such an optical semiconductor device, Japanese Patent Application Laid-Open No. Hei 8-
No. 125227 and the like. FIG. 6 shows a chip component type light emitting diode for comparison with the present invention as a specific example of an optical semiconductor device. The surface-mounted light emitting diode 600 shown in FIG. 6 has a resin substrate 601 having a through hole 602.
A package provided with a thin metal plate 604 is used.
A pair of wiring patterns 605 and 606 are formed from the front surface to the side surface and the back surface of the package. One of the wiring patterns 606 is a thin metal plate extending along the side wall in the through hole. Ag paste 607 on thin metal plate
To fix the LED chip and the LED chip 6
03 is electrically connected to one electrode. The other wiring pattern 605 is connected to the other electrode of the LED chip 603 and the thin metal wire 6 on the outer upper surface of the through hole provided in the package.
08 is used for conduction. By providing a transparent resin 609 on the LED chip, a surface-mounted light emitting diode 600 is formed.

【0004】こうして形成された表面実装型発光ダイオ
ードは貫通孔602及び金属薄板604を利用した凹部
にLEDチップ603を配置させてあるため、全体の厚
みを極めて薄くすることができる。そのため、量産性よ
く小型化可能な表面実装型発光ダイオードを形成するこ
とができる。
[0004] Since the LED chip 603 is arranged in the concave portion using the through-hole 602 and the metal thin plate 604 in the surface-mounted light emitting diode thus formed, the overall thickness can be extremely reduced. Therefore, a surface-mounted light-emitting diode that can be miniaturized with high productivity can be formed.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、使用環
境の広がりと共に求められるより厳しい環境下で使用さ
れるにつれ、上記構成の表面実装型発光ダイオードなど
においては十分な信頼性を得ることが難しくさらなる改
良が求められていた。本発明は上記問題点に鑑み、信頼
性が高く且つ薄型化が可能な光半導体装置を提供するこ
とを目的とする。
However, as the device is used in a more severe environment required with the expansion of the use environment, it is difficult to obtain sufficient reliability in the surface mount type light emitting diode and the like having the above structure, and further improvement is required. Was required. The present invention has been made in view of the above problems, and has as its object to provide an optical semiconductor device that is highly reliable and can be made thin.

【0006】[0006]

【課題を解決するための手段】本発明は、貫通孔が形成
された絶縁性平板の一方の面側に設けられ該絶縁性平板
よりも薄い薄板と、貫通孔を利用したキャビティ底面の
薄板上に少なくとも樹脂を有するダイボンド部材により
ダイボンドされた光半導体素子と、絶縁性平板に設けら
れた光半導体素子と外部とを電気的に接続させるリード
電極と、キャビティ内の光半導体素子を被覆する透光性
樹脂とを有する光半導体装置である。特に、薄板の表面
が、少なくとも樹脂又は多孔質材料である光半導体装置
である。これにより、光半導体装置を量産性よく小型化
できると共に信頼性を著しく向上し得るものである。
SUMMARY OF THE INVENTION The present invention provides a thin plate provided on one surface side of an insulating flat plate having a through hole formed therein, the thin plate being thinner than the insulating flat plate, and a thin plate on the bottom surface of the cavity utilizing the through hole. An optical semiconductor element die-bonded by a die-bonding member having at least a resin, a lead electrode for electrically connecting an optical semiconductor element provided on an insulating flat plate to the outside, and a light-transmitting optical element covering the optical semiconductor element in the cavity. An optical semiconductor device having a conductive resin. In particular, an optical semiconductor device in which the surface of a thin plate is at least a resin or a porous material. As a result, the optical semiconductor device can be reduced in size with good mass productivity, and the reliability can be significantly improved.

【0007】本発明の請求項2に記載の光半導体装置
は、薄膜が表面に樹脂を有する金属、或いは表面にセラ
ミックを有する金属である。これにより光半導体素子か
らの放熱性を向上させるばかりでなく機械的強度を向上
し得る。さらに、光利用効率を向上させ得ることもでき
る。
In the optical semiconductor device according to a second aspect of the present invention, the thin film is a metal having a resin on the surface or a metal having a ceramic on the surface. Thereby, not only the heat radiation from the optical semiconductor element can be improved, but also the mechanical strength can be improved. Further, the light use efficiency can be improved.

【0008】本発明の請求項3に記載の光半導体装置
は、薄板を構成する金属が樹脂によって封止され前記リ
ード電極と電気的に独立している。接着シートなど接着
剤で絶縁性平板と薄膜とを添設させた場合、光半導体装
置の半田などの実装時に接着シートの界面から半田など
が浸入する場合がある。同様に水分が浸入することもあ
る。本発明はこのような水分や半田の浸入を防止すると
共に薄板に導電性の部材を利用していたとしてもリード
電極から電気的に独立しているため、薄板を介してリー
ド電極間がショートすることを極めて低減することがで
きる。また、薄板上の樹脂は、絶縁性を高める他に半田
塗れ性を高め、光半導体装置を半田付け等する場合にお
ける電極間の短絡を防止する効果をも有する。
In the optical semiconductor device according to a third aspect of the present invention, the metal constituting the thin plate is sealed with a resin and is electrically independent from the lead electrodes. When the insulating flat plate and the thin film are attached to each other with an adhesive such as an adhesive sheet, solder or the like may enter from the interface of the adhesive sheet when mounting the solder or the like in the optical semiconductor device. Similarly, moisture may enter. The present invention prevents such infiltration of moisture and solder, and is electrically independent from the lead electrodes even if a conductive member is used for the thin plate. Therefore, a short circuit occurs between the lead electrodes via the thin plate. Can be greatly reduced. In addition, the resin on the thin plate has an effect of improving the wettability in addition to enhancing the insulating property and preventing a short circuit between the electrodes when the optical semiconductor device is soldered or the like.

【0009】本発明の請求項4に記載の光半導体装置の
形成方法は、絶縁性平板に貫通穴を形成する工程と、接
着シートを介して絶縁性平板と金属とを添設する工程
と、絶縁性平板上に少なくとも一対のリード電極を形成
する工程と、貫通穴を利用したキャビティ底面の接着シ
ート上に光半導体素子を少なくとも樹脂を有するダイボ
ンド部材によってダイボンドする工程と、光半導体素子
の各電極と絶縁性平板に形成されたリード電極とを導電
性材料でそれぞれ電気的に接続する工程と、少なくとも
光半導体素子を透光性樹脂で被覆する工程とを有する。
これにより比較的簡単な工程で小型化可能且つ信頼性の
高い光半導体装置を量産性よく形成させることができ
る。
According to a fourth aspect of the present invention, there is provided a method for forming an optical semiconductor device, comprising the steps of: forming a through hole in an insulating flat plate; and attaching the insulating flat plate and a metal via an adhesive sheet. A step of forming at least a pair of lead electrodes on an insulating flat plate; a step of die-bonding the optical semiconductor element to a bonding sheet on the bottom surface of the cavity using a through hole by a die bonding member having at least a resin; And electrically connecting the lead electrodes formed on the insulating flat plate with a conductive material, and covering at least the optical semiconductor element with a translucent resin.
This makes it possible to form a highly reliable optical semiconductor device that can be reduced in size by a relatively simple process with high productivity.

【0010】本発明の請求項5に記載の光半導体装置の
形成方法は、接着シートを有する絶縁性平板に貫通穴を
形成する工程と、接着シートを介して絶縁性平板と、少
なくとも絶縁性平板と対向する表面にセラミックを有す
る金属層とを添設する工程と、絶縁性平板に少なくとも
一対のリード電極を形成する工程と、貫通穴を利用した
キャビティ底面のセラミック上に光半導体素子を少なく
とも樹脂を有するダイボンド部材によってダイボンドす
る工程と、光半導体素子の各電極と、絶縁性平板に形成
されたリード電極とを導電性材料でそれぞれ電気的に接
続する工程と、少なくとも光半導体素子を透光性樹脂で
被覆する工程とを有する。これにより上述と同様、比較
的簡単な工程で小型化可能且つ信頼性の高い光半導体装
置を量産性よく形成させることができる。
According to a fifth aspect of the present invention, there is provided a method for forming an optical semiconductor device, comprising the steps of: forming a through hole in an insulating flat plate having an adhesive sheet; Providing a metal layer having ceramic on the surface facing the substrate, forming at least one pair of lead electrodes on the insulating flat plate, and forming at least an optical semiconductor element on the ceramic on the bottom surface of the cavity using a through-hole. Die bonding with a die bonding member having: a step of electrically connecting each electrode of the optical semiconductor element with a lead electrode formed on an insulating flat plate using a conductive material; Coating with a resin. Thus, similarly to the above, an optical semiconductor device which can be reduced in size and has high reliability can be formed with a relatively simple process with high mass productivity.

【0011】[0011]

【発明の実施の形態】本発明者らは種々の実験の結果、
貫通孔を持った絶縁性平板に特定の表面を持った薄板を
添設することにより、小型化と信頼性とを向上させ得る
ことを見いだし本発明をなすに至った。
BEST MODE FOR CARRYING OUT THE INVENTION As a result of various experiments, the present inventors
The inventor has found that by adding a thin plate having a specific surface to an insulating flat plate having a through hole, miniaturization and reliability can be improved, and the present invention has been accomplished.

【0012】本発明の構成による信頼性向上の作用は定
かではないが、貫通孔を持った絶縁性平板に添付された
薄板の表面形状が大きく影響すると考えられる。即ち、
貫通孔を持った絶縁性平板及び薄板を利用することによ
り、量産性よく小型化を図ることができる。特に、キャ
ビティの凹部底面を構成する薄板は、絶縁性平板よりも
薄くするなどすると光半導体素子からの熱を外部に放出
しやすくなり駆動安定性や信頼性などの特性が向上でき
る。他方、光半導体装置の半田接続時や外部環境などか
らの種々の熱を薄板を介して光半導体素子や貫通孔内部
に直接繰り返し与えられる影響も大きくなる。
Although the effect of improving reliability by the structure of the present invention is not clear, it is considered that the surface shape of a thin plate attached to an insulating flat plate having a through-hole greatly affects the reliability. That is,
By using an insulating flat plate and a thin plate having a through-hole, miniaturization can be achieved with good mass productivity. In particular, when the thin plate constituting the bottom surface of the concave portion of the cavity is made thinner than an insulating flat plate, heat from the optical semiconductor element is easily released to the outside, and characteristics such as driving stability and reliability can be improved. On the other hand, the influence that various kinds of heat from the solder connection of the optical semiconductor device, the external environment, and the like are directly and repeatedly applied to the optical semiconductor element and the inside of the through hole via the thin plate increases.

【0013】このような熱は光半導体素子を被覆する透
光性樹脂と貫通孔の側壁や薄板との熱膨張率の差や形成
時に混入した水分の膨張などにより光半導体素子を薄板
などから剥離すると考えられる。特に金属薄板を用いた
場合は、光半導体素子を被覆する樹脂との密着性が相対
的に低いばかりでなく、熱伝導性が高く樹脂との熱膨張
率が著しく異なるために剥離傾向が極めて強いと考えら
れる。光半導体素子と薄板との剥離は光学特性を変化さ
せるばかりでなく、電極近傍の導電性部材である金属細
線の断線などを生じさせる。場合によっては光半導体素
子と外部との電気的に導通がとれないという不都合を生
ずる。
Such heat separates the optical semiconductor element from the thin plate or the like due to a difference in the coefficient of thermal expansion between the translucent resin covering the optical semiconductor element and the side wall or the thin plate of the through hole, or the expansion of water mixed during the formation. It is thought that. In particular, when a metal thin plate is used, not only the adhesion to the resin covering the optical semiconductor element is relatively low, but also the thermal conductivity is high and the coefficient of thermal expansion with the resin is significantly different, so that the peeling tendency is extremely strong. it is conceivable that. The separation between the optical semiconductor element and the thin plate not only changes the optical characteristics, but also causes breakage of a thin metal wire as a conductive member near the electrode. In some cases, there is a disadvantage that the optical semiconductor element cannot be electrically connected to the outside.

【0014】本発明は、図1の斜視図に示す如く、貫通
孔が形成された絶縁性平板101の一方の面側に設けら
れ絶縁性平板よりも薄い薄板111と、貫通孔を利用し
たキャビティ底面の薄板上に少なくとも樹脂を有するダ
イボンド部材によりダイボンドされた光半導体素子10
3と、絶縁性平板に設けられた光半導体素子103と外
部とを電気的に接続させるリード電極105と、キャビ
ティ内の光半導体素子を被覆する透光性樹脂109とを
有する光半導体装置である。特に、キャビティ底面を構
成する薄板111の表面は、少なくとも樹脂112とな
っている。これにより、小型化、量産性を維持しつつ、
光半導体素子を被覆する透光性樹脂、光半導体素子を実
装するダイボンド部材などとの密着性を向上させた薄板
を利用することで、より信頼性を向上せしめ得るもので
ある。以下、本発明の実施例について詳述するがこれの
みに限られないことはいうまでもない。
According to the present invention, as shown in the perspective view of FIG. 1, a thin plate 111 provided on one surface side of an insulating flat plate 101 having a through hole formed therein and thinner than the insulating flat plate, and a cavity utilizing the through hole. Optical semiconductor device 10 die-bonded by a die-bonding member having at least resin on a thin plate on the bottom surface
3, a lead electrode 105 provided on an insulating flat plate for electrically connecting the optical semiconductor element 103 to the outside, and a light-transmitting resin 109 covering the optical semiconductor element in the cavity. . In particular, the surface of the thin plate 111 constituting the bottom surface of the cavity is made of at least the resin 112. As a result, while maintaining miniaturization and mass productivity,
The reliability can be further improved by using a thin plate having improved adhesiveness with a translucent resin for covering the optical semiconductor element and a die bonding member for mounting the optical semiconductor element. Hereinafter, embodiments of the present invention will be described in detail, but it is needless to say that the present invention is not limited thereto.

【0015】[0015]

【実施例】(実施例1)以下、本発明の実施例を図面を
用いて説明する。図2、図3は本発明の一実施例を示す
ものであり、その製造工程を図3に基づいて説明する。
あらかじめ、リード電極の一部を構成する銅箔が好適に
形成されたガラスエポキシを絶縁性平板101として利
用する(図3A工程)。
(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings. 2 and 3 show one embodiment of the present invention, and the manufacturing process will be described with reference to FIG.
A glass epoxy on which a copper foil forming a part of a lead electrode is suitably formed in advance is used as the insulating flat plate 101 (step in FIG. 3A).

【0016】絶縁性平板101には後に、光半導体素子
であるLEDチップ103が配置されるキャビティを構
成する貫通孔を形成する。絶縁性平板101は、LED
チップなどの光半導体素子103を外部から保護すると
共に薄型化が可能なものが好ましく、具体的にはガラス
エポキシ、液晶ポリマー、アクリル樹脂、エポキシ樹脂
やセラミックなど種々のものを利用することができる。
絶縁性平板101に設けられる貫通孔は、内部に光半導
体素子を配置させる程度の大きさでよく、光半導体素子
として、RGB(赤色、緑色、青色)のLEDチップを
配置させる場合、YB(黄色、青色)のLEDチップを
配置させる場合や発光素子と受光素子とを共に配置させ
る場合など複数個利用する場合はそれぞれが配置可能な
大きさとすればよい。したがって、絶縁性平板に形成さ
れる貫通孔は光半導体素子の大きさ、形状や数に合わせ
て絶縁性平板の種々の位置に複数設けることもできる。
In the insulating flat plate 101, a through hole forming a cavity in which an LED chip 103 as an optical semiconductor element is to be formed is formed later. The insulating flat plate 101 is an LED
It is preferable that the optical semiconductor element 103 such as a chip can be protected from the outside and can be made thinner. Specifically, various types such as glass epoxy, liquid crystal polymer, acrylic resin, epoxy resin and ceramic can be used.
The through hole provided in the insulating flat plate 101 may have a size such that an optical semiconductor element is disposed therein. When an RGB (red, green, blue) LED chip is disposed as the optical semiconductor element, YB (yellow) is used. , Blue), or a light emitting element and a light receiving element are arranged together, and when a plurality of light emitting elements and light receiving elements are used together, the size may be set so that each can be arranged. Therefore, a plurality of through holes formed in the insulating flat plate can be provided at various positions on the insulating flat plate according to the size, shape, and number of the optical semiconductor elements.

【0017】同様に、絶縁性平板101の厚みは貫通孔
を利用することによりキャビティの深さを構成するた
め、所望に応じて種々の厚みのものを利用することがで
きる。また、特に光半導体素子として窒化物半導体であ
る活性層をダブルへテロ構造とした発光素子を利用する
場合、活性層の端面方向から放出される光が極めて多い
ため、キャビティの側壁となる貫通孔に反射性の高い材
質を利用することが好ましい。これにより貫通孔を形成
するだけで光利用効率の高い光半導体装置とすることが
できる。具体的には、キャビティ側壁には可視光の短波
長側で光の吸収の大きいAuメッキなどを形成させるこ
となく、絶縁性樹脂平板の白色材質面を露出させること
で効果的に光を利用することができる。
Similarly, the thickness of the insulating flat plate 101 is determined by using the through hole to determine the depth of the cavity, so that various thicknesses can be used as desired. In particular, when a light emitting device having a nitride semiconductor active layer having a double heterostructure is used as an optical semiconductor device, a very large amount of light is emitted from the end face direction of the active layer. It is preferable to use a highly reflective material. Thus, an optical semiconductor device having high light use efficiency can be obtained only by forming through holes. More specifically, light is effectively used by exposing the white material surface of the insulating resin flat plate without forming Au plating or the like that absorbs a large amount of light on the short wavelength side of visible light on the side wall of the cavity. be able to.

【0018】キャビティを構成する貫通孔は絶縁性平板
が薄くとも貫通孔により比較的簡単に制御性よく形成で
きるため、極めて浅く形成することができる。具体的に
は約200μm以下程度の厚さとすることもできる。こ
のような貫通孔は、絶縁性平板をエッチングすることに
より構成することができるし、ドリルを用いて機械的に
構成することもできる。さらに、炭酸ガスを利用したガ
スレーザー、YAGを利用した固体レーザーなど各種レ
ーザーを用いて貫通孔を形成することもできる。エッチ
ング溶液の選択、ドリルの刃先形状やレーザー光の集光
を調整することで貫通孔の形状をすり鉢状や円柱状など
所望に調整することもできる。同様に正面から見た貫通
孔の形状も円形のみに限定されず、楕円形、正方形、長
方形、縁なしの矩形や複数の円形が連続して貫通した形
状など所望に応じて種々のものを選択することができ
る。
The through-hole forming the cavity can be formed relatively easily and with good controllability by the through-hole even if the insulating flat plate is thin, so that it can be formed extremely shallow. Specifically, the thickness can be about 200 μm or less. Such a through-hole can be formed by etching an insulating flat plate, or can be formed mechanically using a drill. Further, the through holes can be formed by using various lasers such as a gas laser using carbon dioxide gas and a solid laser using YAG. The shape of the through-hole can also be adjusted to a desired shape such as a mortar or column by adjusting the selection of the etching solution, the shape of the cutting edge of the drill, and the concentration of the laser beam. Similarly, the shape of the through hole as viewed from the front is not limited to a circle, and various shapes such as an ellipse, a square, a rectangle, a rectangle without an edge, and a shape in which a plurality of circles are continuously penetrated can be selected as desired. can do.

【0019】次に、略中央に貫通穴が形成された絶縁性
平板に薄板として厚さ約60μmのエポキシ樹脂からな
る接着シート112を介して金属層111を張り合わせ
貫通孔を利用したキャビティ102を形成する。薄板1
11を絶縁性平板101よりも薄くすることで光半導体
装置100全体の厚みを薄くできると共に放熱性を向上
させ得ることができる。絶縁性平板101は光半導体素
子103を保護する或いは光利用効率を向上させるなど
のために厚みの制限が設けられやすいのに対し、薄板1
11は光半導体素子103を支持することができればよ
いからである。
Next, a metal layer 111 is adhered to an insulating flat plate having a through hole formed substantially at the center thereof via an adhesive sheet 112 made of epoxy resin having a thickness of about 60 μm as a thin plate to form a cavity 102 using the through hole. I do. Thin plate 1
By making 11 thinner than the insulating flat plate 101, it is possible to reduce the overall thickness of the optical semiconductor device 100 and to improve the heat dissipation. The thickness of the insulating flat plate 101 is likely to be limited in order to protect the optical semiconductor element 103 or to improve the light use efficiency.
No. 11 is only required to be able to support the optical semiconductor element 103.

【0020】薄板111として約30から170μmの
厚さのものを好適に利用することができる。本発明の薄
板111はダイボンド樹脂を介して光半導体素子を固定
する。或いは、透光性樹脂であるモールド部材109な
どと接する場合があり、ダイボンド樹脂107や樹脂モ
ールド部材109などとの密着性が優れた表面を持つ。
薄板の具体的表面としてはダイボンド樹脂などとの化学
的や機械的に結合できるような密着性の優れた樹脂表面
112や多孔質表面を持ったセラミックなどを利用する
ことができる。極めて薄い接着性樹脂シートなどを利用
した薄板の場合、機械的強度が得られ難いため補強用部
材として金属やセラミックなどを添設させることもでき
る。補強用に金属を利用した場合、光半導体装置の各電
極との短絡を防止するためにレジストインクなどの樹脂
を利用して絶縁性被覆していることが好ましい。
As the thin plate 111, a thin plate having a thickness of about 30 to 170 μm can be suitably used. The thin plate 111 of the present invention fixes an optical semiconductor element via a die bond resin. Alternatively, the surface may be in contact with the mold member 109 which is a translucent resin, and has a surface with excellent adhesion to the die bond resin 107, the resin mold member 109, and the like.
As a specific surface of the thin plate, a resin surface 112 having excellent adhesiveness capable of being chemically or mechanically bonded to a die bond resin or the like, a ceramic having a porous surface, or the like can be used. In the case of a thin plate using an extremely thin adhesive resin sheet or the like, it is difficult to obtain mechanical strength, and therefore, a metal, ceramic, or the like can be additionally provided as a reinforcing member. When a metal is used for reinforcement, it is preferable to use a resin such as a resist ink to perform insulating coating to prevent a short circuit with each electrode of the optical semiconductor device.

【0021】なお、接着シート112を白色系の反射率
の高い材質を利用すると共に光半導体素子103を窒化
物半導体発光素子を利用するとさらに光利用効率を高め
ることもできる。同様に、樹脂絶縁性平板101であり
側壁となる白色材質面が露出したキャビティ102内に
絶縁性基板上に少なくとも発光層がダブルへテロ構造の
窒化物半導体であり同一面側に一対の電極を有する光半
導体素子103を、配置させることにより光利用効率を
さらに高めることもできる。また、接着シート112の
組成や溶媒を光半導体素子103を接着するダイボンド
樹脂107の組成に同一或いは近づけることにより、よ
り強固な接着強度を得ることもできる。
If the adhesive sheet 112 is made of a white material having a high reflectance and the optical semiconductor element 103 is made of a nitride semiconductor light emitting element, the light utilization efficiency can be further improved. Similarly, at least a light emitting layer is a double-heterostructure nitride semiconductor on an insulating substrate in a cavity 102 which is a resin insulating flat plate 101 and has a white material surface serving as a side wall, and a pair of electrodes on the same surface side. The light use efficiency can be further increased by disposing the optical semiconductor element 103 that has the light semiconductor element 103. Further, by setting the composition or the solvent of the adhesive sheet 112 to be the same as or close to the composition of the die bond resin 107 for bonding the optical semiconductor element 103, stronger bonding strength can be obtained.

【0022】次に、薄板111となる銅板をキャビティ
底面が絶縁性平板に固定される部位を残してエッチング
した(図3のB工程)。
Next, the copper plate serving as the thin plate 111 was etched leaving a portion where the bottom surface of the cavity was fixed to the insulating flat plate (step B in FIG. 3).

【0023】また、好適には銅板の密着強度を高めると
共に絶縁性を確保するために露出した薄板111である
銅板を樹脂113により封止した。続いて、光半導体装
置の外部リード電極105、106を形成する。外部リ
ード電極105、106は電解及び無電解メッキ法を利
用して絶縁性平板101の発光或いは入射側上面、上面
と対向する下面及び側面にメッキ層を形成することによ
り極めて薄膜のリード電極を比較的簡単に形成すること
ができる。さらに、写真法を利用して、絶縁性平板の発
光側上面及び下面のメッキ層を補強することもできる。
こうして、光半導体素子が配置されるキャビティ102
及びリード電極105、106が形成されたパッケージ
を形成することができる(図3C工程)。
Preferably, the copper plate, which is the thin plate 111 exposed to increase the adhesion strength of the copper plate and ensure insulation, is sealed with a resin 113. Subsequently, external lead electrodes 105 and 106 of the optical semiconductor device are formed. The outer lead electrodes 105 and 106 are compared with extremely thin lead electrodes by forming plating layers on the light emitting or incident side upper surface, the lower surface and the side opposite to the upper surface of the insulating flat plate 101 using electrolytic and electroless plating methods. It can be easily formed. Furthermore, the plating layers on the upper surface and the lower surface on the light emitting side of the insulating flat plate can be reinforced by using a photographic method.
Thus, the cavity 102 in which the optical semiconductor element is arranged
In addition, a package on which the lead electrodes 105 and 106 are formed can be formed (FIG. 3C step).

【0024】なお、キャビティを構成する薄板の補強部
材である金属板とリード電極105、106とは電気的
に独立している。また、樹脂113によってその端部を
封止すると共に絶縁性を高めている。ここでは、リード
電極を形成させた後に樹脂によって薄板を封止すること
を開示したが、薄板を封止した後に樹脂によって封止す
ることもできることはいうまでもない。
The metal plate, which is a thin reinforcing member constituting the cavity, and the lead electrodes 105 and 106 are electrically independent. In addition, the resin 113 seals the end and enhances insulation. Here, it is disclosed that the thin plate is sealed with a resin after the lead electrode is formed, but it is needless to say that the thin plate can be sealed with a resin after the thin plate is sealed.

【0025】続いて、貫通穴を利用して形成されたキャ
ビティ102底面の接着シート112上にダイボンド樹
脂107として透光性エポキシ接着剤により、少なくと
も発光層が窒化ガリウム系化合物半導体のLEDチップ
103をダイボンド機器を用いてダイボンドする。キャ
ビティ102内に配置されたLEDチップ103とパッ
ケージに形成された発光側上面のリード電極105、1
06とを直径約30μmのAuを利用してワイヤボンド
する(図3D工程)。
Subsequently, an LED chip 103 having a gallium nitride-based compound semiconductor at least as a light-emitting layer is formed on the adhesive sheet 112 on the bottom surface of the cavity 102 formed by using the through hole by using a translucent epoxy adhesive as a die bond resin 107. Die bonding is performed using a die bonding device. The LED chip 103 arranged in the cavity 102 and the lead electrodes 105, 1 on the light emitting side upper surface formed in the package.
06 using Au having a diameter of about 30 μm (FIG. 3D step).

【0026】LEDチップ103とパッケージに形成さ
れたリード電極105、106との接続は、小型化、接
続強度や量産性等を考慮して20から40μmの導電性
ワイヤ108を利用して電気的に導通を取ることができ
る。また、導電性ワイヤの材料としては金、アルミニウ
ムなど種々の特性に合わせて適宜選択することができ
る。
The connection between the LED chip 103 and the lead electrodes 105 and 106 formed on the package is made electrically using a conductive wire 108 of 20 to 40 μm in consideration of miniaturization, connection strength and mass productivity. Conduction can be taken. The material of the conductive wire can be appropriately selected according to various characteristics such as gold and aluminum.

【0027】同様に、光半導体素子とリード電極との導
通を取るためだけであれば薄膜との密着性を損なわない
限り光半導体素子の電極同士がショートしないように酸
化珪素などの絶縁性保護膜で電極を除く半導体素子部分
を被覆した後、銀、カーボン、ITOなどの導電性フィ
ラーを含有させた導電性樹脂や半田などをダイボンド部
材兼導電性部材として利用することもできる(不示
図)。また、ダイボンド樹脂としては金、銀、銅などの
金属やITO、酸化錫などの金属酸化物、さらには導線
性に優れたカーボンなどを所望に応じて混入させること
ができる他、ダイボンド樹脂の耐光性を向上させるため
にガラスなどの無機物質などを混入させることもでき
る。これにより半導体層を介して一対の電極を持った光
半導体素子においても本発明を適用することができる。
Similarly, an insulating protective film made of silicon oxide or the like is used only for maintaining conduction between the optical semiconductor element and the lead electrode so that the electrodes of the optical semiconductor element are not short-circuited unless the adhesion to the thin film is impaired. After covering the semiconductor element portion except for the electrodes, a conductive resin or solder containing a conductive filler such as silver, carbon, and ITO can be used as a die-bonding member and a conductive member (not shown). . In addition, a metal such as gold, silver, or copper, a metal oxide such as ITO or tin oxide, or a carbon having excellent conductive properties can be mixed as a die bond resin as required. In order to improve the properties, an inorganic substance such as glass can be mixed. Thus, the present invention can be applied to an optical semiconductor device having a pair of electrodes via a semiconductor layer.

【0028】本発明において光半導体素子103とは、
種々の半導体を利用した発光素子や受光素子を利用する
ことができる。具体的な発光素子としては、サファイ
ア、スピネル、SiCやGaN基板上に窒化物半導体を
積層したものを好適に利用することができる。窒化物半
導体はそのバンドギャップにより紫外域から可視域まで
種々の電磁波を放出することができる。特に、窒化物半
導体はサファイア基板上に形成させることで結晶性と量
産性の両立した発光素子とすることができる。また、サ
ファイア基板上に窒化ガリウム系化合物半導体を有し同
一平面側に一対の電極を形成させたLEDチップは、サ
ファイア基板及び窒化ガリウム共に硬度が高いためサフ
ァイア基板を研磨するなど約150μm以下の薄型にす
ることができる。より具体的には、全高が70〜90μ
mのLEDチップを利用すると、光半導体装置の高さを
約0.3mm以下とすることができる。
In the present invention, the optical semiconductor element 103 is
A light emitting element and a light receiving element using various semiconductors can be used. As a specific light emitting element, a sapphire, spinel, SiC or GaN substrate on which a nitride semiconductor is laminated can be suitably used. A nitride semiconductor can emit various electromagnetic waves from an ultraviolet region to a visible region due to its band gap. In particular, when a nitride semiconductor is formed over a sapphire substrate, a light-emitting element having both crystallinity and mass productivity can be obtained. In addition, an LED chip having a gallium nitride-based compound semiconductor on a sapphire substrate and having a pair of electrodes formed on the same plane side has a high hardness of both the sapphire substrate and gallium nitride. Can be More specifically, the total height is 70 to 90 μ
When the m LED chips are used, the height of the optical semiconductor device can be reduced to about 0.3 mm or less.

【0029】このような光半導体素子103は絶縁性基
板上に一対の電極を形成するため小型化且つ光利用効率
の向上を図ることができ、本発明の効果が特に大きい。
なお、他の半導体素子としてはガリウム燐やガリウム砒
素基板上にインジウム・アルミニウム・ガリウム・燐で
ある発光層を持った発光素子を利用することもできる。
同様に、シリコン基板上に不純物を高濃度にドープした
シリコンである受光層を持った受光素子とすることもで
きる。
Since the optical semiconductor element 103 has a pair of electrodes formed on an insulating substrate, the optical semiconductor element 103 can be reduced in size and improved in light use efficiency, and the effect of the present invention is particularly large.
As another semiconductor element, a light emitting element having a light emitting layer of indium, aluminum, gallium, phosphorus on a gallium phosphide or gallium arsenide substrate can be used.
Similarly, a light receiving element having a light receiving layer made of silicon heavily doped with impurities on a silicon substrate can be used.

【0030】最後に、キャビティ102内にLEDチッ
プ103が配置され、金線108でLEDチップの各電
極とパッケージのリード電極105、106とを接続さ
せたパッケージ表面を部分的にモールド部材109とし
て透光性エポキシ樹脂により射出成型によって封止させ
る(図3E工程)。
Finally, the LED chip 103 is arranged in the cavity 102, and the surface of the package in which each electrode of the LED chip and the lead electrodes 105 and 106 of the package are connected by the gold wire 108 is partially transparent as a mold member 109. It is sealed by injection molding with a light epoxy resin (FIG. 3E step).

【0031】モールド部材はLEDチップや導電性ワイ
ヤなどを外部環境や外力から保護するために好適に設け
られるものであり、エポキシ樹脂、シリコーン樹脂、ユ
リア樹脂や低融点ガラスなど種々のものを利用すること
ができる。モールド部材は光半導体素子に入射される光
や光半導体素子から放出される光を集光或いは拡散させ
るために凸レンズ形状や凹レンズ形状とすることができ
る。また、凸レンズも所望となる指向特性に合わせて単
なる凸レンズや楕円レンズ形状など種々選択させること
ができる。また、モールド部材には不要な波長をカット
する目的で種々の着色剤、拡散光を得る目的で酸化チタ
ン、酸化珪素などの拡散材を含有させることができる。
The mold member is suitably provided for protecting the LED chip, the conductive wire, and the like from the external environment and external force, and various types of materials such as epoxy resin, silicone resin, urea resin, and low melting point glass are used. be able to. The mold member may have a convex lens shape or a concave lens shape in order to collect or diffuse light incident on the optical semiconductor element or light emitted from the optical semiconductor element. Also, the convex lens can be variously selected, such as a simple convex lens or an elliptical lens shape, according to a desired directional characteristic. The mold member may contain various coloring agents for the purpose of cutting unnecessary wavelengths, and a diffusing material such as titanium oxide or silicon oxide for the purpose of obtaining diffused light.

【0032】また、発光素子から放出される電磁波の少
なくとも一部を他の波長に変換させるペリレン系誘導体
やセリウムで付活されたイットリウム・アルミニウム・
ガーネット系酸化物などの蛍光体を含有させ白色発光可
能な光半導体装置とすることもできる。こうして一辺が
それぞれ約1.2mm、約1.8mmの矩形状であっ
て、厚さが約0.3mmとなる極めて小型な光半導体装
置を比較的簡単に形成することができる。
In addition, yttrium aluminum activated by a perylene derivative or cerium for converting at least a part of the electromagnetic wave emitted from the light emitting element to another wavelength.
An optical semiconductor device capable of emitting white light can be obtained by containing a phosphor such as a garnet-based oxide. In this way, an extremely small optical semiconductor device having a rectangular shape of about 1.2 mm and about 1.8 mm on each side and a thickness of about 0.3 mm can be formed relatively easily.

【0033】(実施例2)次に、図4に示す構造の光半
導体装置について詳述する。実施例1と同様の絶縁性平
板401を利用して薄板411を添設しリード電極40
5、406をメッキさせることによりパッケージを形成
させた。なお、実施例1とは異なり、絶縁性平板にエポ
キシ樹脂からなる接着シートを張り合わせ接着層を形成
させた(図5A工程)後、接着層ごと貫通孔を形成させ
た。
Embodiment 2 Next, an optical semiconductor device having the structure shown in FIG. 4 will be described in detail. A thin plate 411 is additionally provided using the same insulating flat plate 401 as in the first embodiment, and the lead electrode 40 is provided.
5, 406 was plated to form a package. Unlike Example 1, an adhesive sheet made of an epoxy resin was adhered to an insulating flat plate to form an adhesive layer (Step A in FIG. 5), and then a through hole was formed together with the adhesive layer.

【0034】キャビティ402を構成する貫通孔を形成
させた絶縁性平板401の接着層412が形成された面
に、あらかじめ銅箔上にセラミック414を蒸着させた
薄膜411をキャビティの底面として利用するため添設
した(図5B工程)。薄板を添設後、銅箔をキャビティ
底部を残して銅箔をエッチングし、リード電極405、
406と電気的に独立させるべく絶縁樹脂413によっ
て封止してある(図5C工程)。なお、キャビティの底
面となる部位を切り抜いた接着シートを張り付けた薄膜
により絶縁性平板に添設させることもできる。
On the surface of the insulating flat plate 401 having the through-holes forming the cavity 402 on which the adhesive layer 412 is formed, a thin film 411 obtained by previously depositing a ceramic 414 on a copper foil is used as the bottom surface of the cavity. It was attached (FIG. 5B step). After attaching the thin plate, the copper foil is etched leaving the bottom of the cavity, and the lead electrode 405,
It is sealed with an insulating resin 413 so as to be electrically independent from 406 (FIG. 5C step). It should be noted that a thin film to which an adhesive sheet obtained by cutting out a portion serving as the bottom surface of the cavity is attached can be attached to the insulating flat plate.

【0035】薄板として具体的には厚さ約35μmのC
u泊上にセラミックを蒸着させ総膜厚約50μmで表面
が白色で多孔性のセラミック複合金属層20である。こ
れ以外は実施例1と同様にして光半導体素子403をマ
ウント部材407としてエポキシ樹脂によりダイボンド
すると共に電気的に導通を取った(図5D工程)。これ
にモールド部材409を形成させ光半導体装置400を
形成させた(図5E工程)。実施例2で形成された光半
導体装置は実施例1に比べて放熱性が優れている反面、
外部からの熱も受けやすい。しかしながら、形成された
光半導体装置の熱衝撃試験では実施例1とほとんど遜色
なかった。
As a thin plate, specifically, C having a thickness of about 35 μm
A ceramic composite metal layer 20 having a total thickness of about 50 μm and a white surface and having a porous surface is formed by depositing a ceramic on the u layer. Except for this, the optical semiconductor element 403 was mounted as a mount member 407 by die bonding with an epoxy resin and electrically connected in the same manner as in Example 1 (step D in FIG. 5). The mold member 409 was formed thereon, and the optical semiconductor device 400 was formed (Step E in FIG. 5). Although the optical semiconductor device formed in the second embodiment has better heat dissipation than the first embodiment,
It is also susceptible to external heat. However, the thermal shock test of the formed optical semiconductor device was almost equal to that of Example 1.

【0036】なお、本発明の具体的実施例においては、
それぞれ一個ずつの光半導体装置において説明している
が、量産性よく形成させるためには絶縁性平板にドット
マトリックス状に複数の貫通穴を形成する。絶縁性平板
全体に接着シートを介して絶縁性平板と金属を個々の貫
通孔に対応などして添設した後、上述の工程を介して光
半導体装置を形成する。形成させた光半導体装置を個々
に分離させることによって複数個の光半導体装置を量産
することができる。また、個々に分離させなければドッ
トマトリックス状の光半導体装置を形成することもでき
る。
In a specific embodiment of the present invention,
Although each of the optical semiconductor devices is described, a plurality of through holes are formed in an insulating flat plate in a dot matrix shape in order to form the semiconductor device with high productivity. After the insulating flat plate and the metal are attached to the entire insulating flat plate via an adhesive sheet so as to correspond to the individual through holes, the optical semiconductor device is formed through the above-described steps. By individually separating the formed optical semiconductor devices, a plurality of optical semiconductor devices can be mass-produced. In addition, a dot matrix optical semiconductor device can be formed if the semiconductor devices are not individually separated.

【0037】(比較例1)薄板を厚さ約50μmの銅板
とし銅板上にエポキシ樹脂により直接LEDをダイボン
ドさせた以外は実施例1と同様にして光半導体装置を形
成させた。形成させた実施例1及び比較例1の光半導体
装置を1400個用いて、それぞれ−20℃30分、8
0℃30分で500サイクルの条件で熱衝撃試験を行っ
た。試験後、実施例1の不灯となった発光ダイオードは
比較例1の発光ダイオードの3割にも満たなかった。不
灯となった比較例1の発光ダイオードを調べたところ薄
膜となる銅板とダイボンド部材とが剥離していると共に
ワイヤの断線も生じていた。
Comparative Example 1 An optical semiconductor device was formed in the same manner as in Example 1 except that a thin plate was made of a copper plate having a thickness of about 50 μm and an LED was directly die-bonded on the copper plate with an epoxy resin. Using 1400 optical semiconductor devices of Example 1 and Comparative Example 1 thus formed, each was -20 ° C. for 30 minutes, and 8
A thermal shock test was performed under the conditions of 500 cycles at 0 ° C. for 30 minutes. After the test, the non-lighted light emitting diode of Example 1 was less than 30% of the light emitting diode of Comparative Example 1. When the light emitting diode of Comparative Example 1 which was not lit was examined, the thin copper plate and the die bond member were peeled off and the wire was broken.

【0038】[0038]

【発明の効果】本発明は、小型化可能な光半導体装置の
薄板表面状態を特定の表面とさせることにより、光半導
体装置を小型化できると共に信頼性を著しく向上し得る
ものである。また、本発明の方法は上述の光半導体装置
を量産性よく形成することができるものである。
According to the present invention, the optical semiconductor device can be miniaturized and the reliability can be remarkably improved by setting the surface state of the thin plate of the optical semiconductor device which can be miniaturized to a specific surface. Further, the method of the present invention can form the above-described optical semiconductor device with good mass productivity.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の光半導体装置の模式的斜視図であ
る。
FIG. 1 is a schematic perspective view of an optical semiconductor device of the present invention.

【図2】 本発明の光半導体装置の模式的断面図であ
る。
FIG. 2 is a schematic sectional view of the optical semiconductor device of the present invention.

【図3】 図1に示す光半導体装置の形成方法を説明す
るための工程図である。
FIG. 3 is a process chart for describing a method of forming the optical semiconductor device shown in FIG.

【図4】 本発明の他の光半導体装置の模式的断面図で
ある。
FIG. 4 is a schematic sectional view of another optical semiconductor device of the present invention.

【図5】 図3に示す光半導体装置の形成方法を説明す
るための工程図である。
FIG. 5 is a process chart for describing a method of forming the optical semiconductor device shown in FIG.

【図6】 本発明と比較のために示す光半導体装置の模
式的断面図である。
FIG. 6 is a schematic sectional view of an optical semiconductor device shown for comparison with the present invention.

【符号の説明】[Explanation of symbols]

100・・・光半導体装置 101・・・絶縁平板 102・・・キャビティ 103・・・光半導体素子 105、106・・・リード電極 107・・・マウント部材 108・・・ワイヤ 109・・・モールド部材 111・・・薄板 112・・・接着シート 113・・・薄板の少なくとも端部を覆う樹脂 400・・・光半導体装置 401・・・絶縁平板 402・・・キャビティ 403・・・光半導体素子 405、406・・・リード電極 407・・・マウント部材 409・・・モールド部材 411・・・薄板 412・・・接着層 413・・・絶縁樹脂 414・・・光半導体素子が配置される側の薄板表面を
構成するセラミック 601・・・樹脂基板 602・・・貫通孔 603・・・LEDチップ 604・・・金属薄板 605、606・・・配線パターンとなるリード電極 607・・・Agペースト 608・・・ワイヤとなる金属細線 609・・・モールド部材となる透明樹脂
Reference Signs List 100 optical semiconductor device 101 insulating plate 102 cavity 103 optical semiconductor element 105, 106 lead electrode 107 mounting member 108 wire 109 molding member 111: Thin plate 112: Adhesive sheet 113: Resin that covers at least the end of the thin plate 400: Optical semiconductor device 401: Insulating flat plate 402: Cavity 403: Optical semiconductor element 405; 406: Lead electrode 407: Mount member 409: Mold member 411: Thin plate 412: Adhesive layer 413: Insulating resin 414: Surface of the thin plate on which the optical semiconductor element is arranged Ceramic 601... Resin substrate 602... Through-hole 603... LED chip 604. 6 ... a wiring pattern lead electrodes 607 ... Ag paste 608 ... wire become fine metal wires 609 ... sealing member to become transparent resin

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5F041 AA43 AA47 CA04 CA40 DA20 DA44 DA74 DA78 DA81 5F088 AA01 BA10 BA11 BA15 JA03 JA06 JA10 LA03  ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F041 AA43 AA47 CA04 CA40 DA20 DA44 DA74 DA78 DA81 5F088 AA01 BA10 BA11 BA15 JA03 JA06 JA10 LA03

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 貫通孔が形成された絶縁性平板の一方の
面側に設けられ該絶縁性平板よりも薄い薄板と、前記貫
通孔を利用したキャビティ底面の薄板上に少なくとも樹
脂を有するダイボンド部材によりダイボンドされた光半
導体素子と、前記絶縁性平板に設けられた光半導体素子
と外部とを電気的に接続させるリード電極と、前記キャ
ビティ内の光半導体素子を被覆する透光性樹脂とを有す
る光半導体装置であって、 前記キャビティ底面を構成する薄板の表面は、少なくと
も樹脂又は多孔質材料であることを特徴とする光半導体
装置。
1. A die bonding member provided on one surface side of an insulating flat plate having a through hole formed therein, the thin plate being thinner than the insulating flat plate, and a resin having at least resin on the thin plate at the bottom of the cavity using the through hole. An optical semiconductor element die-bonded by the method, a lead electrode for electrically connecting the optical semiconductor element provided on the insulating flat plate to the outside, and a light-transmitting resin for covering the optical semiconductor element in the cavity. An optical semiconductor device, wherein the surface of a thin plate forming the bottom surface of the cavity is at least a resin or a porous material.
【請求項2】 前記薄膜が表面に樹脂を有する金属、或
いは表面にセラミックを有する金属である請求項1に記
載の光半導体装置。
2. The optical semiconductor device according to claim 1, wherein the thin film is a metal having a resin on the surface or a metal having a ceramic on the surface.
【請求項3】 前記薄板を構成する金属が樹脂によって
封止され前記リード電極と電気的に独立している請求項
2に記載の光半導体装置。
3. The optical semiconductor device according to claim 2, wherein a metal constituting the thin plate is sealed with a resin and is electrically independent of the lead electrode.
【請求項4】 内部に光半導体素子が配置された光半導
体装置の形成方法において、(a)絶縁性平板に貫通穴
を形成する工程と、(b)接着シートを介して絶縁性平
板と金属とを添設する工程と、(c)前記絶縁性平板上
に少なくとも一対のリード電極を形成する工程と、
(d)前記貫通穴を利用したキャビティ底面の接着シー
ト上に光半導体素子を少なくとも樹脂を有するダイボン
ド部材によってダイボンドする工程と、(e)前記光半
導体素子の各電極と前記絶縁性平板に形成されたリード
電極とを導電性材料でそれぞれ電気的に接続する工程と
(f)少なくとも前記光半導体素子を透光性樹脂で被覆
する工程とを有することを特徴とする光半導体装置の形
成方法。
4. A method of forming an optical semiconductor device having an optical semiconductor element disposed therein, wherein: (a) a step of forming a through hole in an insulating flat plate; and (b) a step of forming an insulating flat plate and a metal via an adhesive sheet. (C) forming at least a pair of lead electrodes on the insulating flat plate;
(D) a step of die-bonding the optical semiconductor element to the adhesive sheet on the bottom surface of the cavity using the through hole by a die bonding member having at least a resin; and (e) forming each of the electrodes of the optical semiconductor element and the insulating flat plate. And (f) covering at least the optical semiconductor element with a light-transmitting resin.
【請求項5】 内部に光半導体素子が配置された光半導
体装置の形成方法において、(a)接着シートを有する
絶縁性平板に貫通穴を形成する工程と、(b)前記接着
シートを介して絶縁性平板と、少なくとも絶縁性平板と
対向する表面にセラミックを有する金属層とを添設する
工程と、(c)前記絶縁性平板に少なくとも一対のリー
ド電極を形成する工程と、(d)前記貫通穴を利用した
キャビティ底面のセラミック上に光半導体素子を少なく
とも樹脂を有するダイボンド部材によってダイボンドす
る工程と、(e)前記光半導体素子の各電極と、前記絶
縁性平板に形成されたリード電極とを導電性材料でそれ
ぞれ電気的に接続する工程と(f)少なくとも前記光半
導体素子を透光性樹脂で被覆する工程とを有することを
特徴とする光半導体装置の形成方法。
5. A method for forming an optical semiconductor device having an optical semiconductor element disposed therein, wherein: (a) a step of forming a through hole in an insulating flat plate having an adhesive sheet; and (b) via the adhesive sheet. (C) forming at least a pair of lead electrodes on the insulating flat plate, and (c) forming at least a pair of lead electrodes on the insulating flat plate; A step of die-bonding the optical semiconductor device to the ceramic on the bottom surface of the cavity using at least a through-hole using a die-bonding member having at least a resin; and (e) each electrode of the optical semiconductor device and a lead electrode formed on the insulating flat plate. Characterized by comprising a step of electrically connecting the optical semiconductor elements with a conductive material, and a step of (f) covering at least the optical semiconductor element with a translucent resin. Method of forming the device.
JP02323699A 1999-01-29 1999-01-29 Optical semiconductor device and method for forming the same Expired - Fee Related JP4279388B2 (en)

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