JP2000172574A - Information processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an information processor which can shorten the hibernation processing time. SOLUTION: This information processor includes a nonvolatile auxiliary memory 1 where a file describing a processing execution program is recorded and then shifts the file recorded in the memory 1 to a main memory 2 to execute the processing there. Then a header is added to record an address where the rewritable data on the file recorded in the memory 1 are recorded together with a hibernation processing part 3 which records the address data on the memory 2 corresponding to the address recorded on the head in a temporary store area IC of the memory 1 when a hibernation state occurs.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus for shortening a hibernation processing time.

[0002]

2. Description of the Related Art In an information processing apparatus, a volatile RA
A file in which a program for executing a process recorded in a non-volatile auxiliary memory is loaded into a main memory constituted by M, and the process is executed.

When the power is turned off for some reason during the execution of a process (for example, in a notebook computer, when the remaining battery power decreases and the process is not executed), the process is executed later. In order to be able to restart continuously, the data recorded in the main memory is transferred to the non-volatile memory and then turned off,
When the cause is eliminated and the power is turned on to resume the processing, hibernation processing is performed in which data recorded in the nonvolatile memory is transferred to the main memory and the processing is resumed.

It takes a long time to transfer data from the main memory to the non-volatile memory during such a hibernation process.
667 and JP-A-9-44418,
The data in the effective area (the area actually used) of the main memory is transferred to the nonvolatile memory to reduce the transfer time.

In Japanese Patent Application Laid-Open Nos. 8-328968 and 9-44417, the main memory is divided into a plurality of blocks, and only the blocks whose data has been updated during processing are transferred to the non-volatile memory. Switching time has been reduced.

[0006]

However, even in the above-described conventional example, the amount of data that needs to be transferred is large, and the transfer requires a long time. SUMMARY OF THE INVENTION It is an object of the present invention to provide an information processing apparatus in which the hibernation processing time is reduced.

[0007]

According to a first aspect of the present invention, there is provided a nonvolatile auxiliary memory storing a file in which a program for executing a process is described; In an information processing apparatus for moving a file recorded in an auxiliary memory to a main memory and executing a process, the auxiliary memory is provided with a header for recording an address at which rewritable data of the recorded file is recorded. A hibernation processing unit that records data of an address of the main memory corresponding to an address recorded in the header in a temporary storage area of the auxiliary memory when hibernation occurs.

Further, in the invention according to claim 2, the hibernation processing unit transfers a file to be resumed from the auxiliary memory to the main memory when the process is resumed,
Thereafter, data is read from the temporary store area, and data in the main memory corresponding to the address recorded in the header is rewritten.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a configuration diagram of an embodiment of the present invention, FIG. 2 is a specific example of an auxiliary memory of the embodiment, and FIG. 3 is an operation flowchart of the embodiment. In FIG. 1, 1 is a nonvolatile auxiliary memory, 2 is a main memory, 3 is a hibernation processing unit, 4 is a display unit, 5 is an input unit, 6 is an interface (I / O), and 7 is a processor (CP
U).

As shown in FIG. 2, the non-volatile memory 1 stores a file 1A in which a program for executing a process is described and an address at which rewritable data in the file 1A is recorded. And a temporary storage area 1C for temporarily storing data in the main memory 1 during hibernation. The address recorded in the header 1B is selected, for example, by the following method and recorded as a header.

A program for executing the processing is generally written in a high-level language, which is compiled, and the compiled data is recorded in a file 1A. A compiler that compiles a program recognizes whether the read data is an instruction word, a variable, or an array, and converts the read data into a machine language based on the recognition result.

Therefore, when compiling a program, for data whose data may be rewritten during processing, such as a variable or an array, an address of the compiled data that may be rewritten is added to the header. Record on 1A.

Next, the operation of the embodiment will be described with reference to FIG. In step S1, the file specified by the input unit 5 is read from the auxiliary memory 1 and recorded in the main memory 2. In step S2, the CPU 7 executes the processing of the program recorded in the main memory 2 according to the processing start instruction from the input unit 5.

In step S3, the hibernation processing section 3 determines whether or not a factor for executing the hibernation processing has occurred. If the determination is NO, steps S2 and S3 are repeated. In step S4, the hibernation processing unit 3 interrupts the process in step S2, and records the data of the main memory 2 corresponding to the address recorded in the header 1B in the temporary storage area of the auxiliary memory 1. Further, data and the like displayed on the display unit 4 are also recorded in the temporary storage area as needed.

When the recording in the temporary store area is completed, the power is turned off. As a result, the data displayed on the main memory 2 and the display unit 4 disappears. In step S5, when the power is turned on and a command to restart processing is input from the input unit 5, the process proceeds to step S6.

In step S6, the hibernation processing unit 3 reads out the file 1A, which was being processed before the power was turned off, from the auxiliary memory 1 and records it in the main memory 2, as in step S1. In step S7, the hibernation processing unit 3 reads the data recorded in the temporary storage area 1C of the auxiliary memory 1, and rewrites the data at the address of the main memory 2 corresponding to the address recorded in the header 1B. In step S8, the hibernation processing unit 3 restarts the processing when the data rewriting is completed.

[0017]

As described above, according to the present invention,
The non-volatile memory records the address where the rewritable data of the file is recorded. During hibernation, only the data in the main memory corresponding to the address where the rewritable data of the file is recorded is recorded in the non-volatile memory As a result, the hibernation processing time can be reduced.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 is a specific example of an auxiliary memory according to the embodiment.

FIG. 3 is an operation flowchart of the embodiment.

[Explanation of symbols]

 Reference Signs List 1 auxiliary memory 1A file 1B header 1C temporary storage area 2 main memory 3 hibernation processing unit 4 display unit 5 input unit 6 interface (I / O) 7 processor (CPU)

Claims (2)

[Claims] 1. A non-volatile auxiliary memory in which a file in which a program for executing a process is described is recorded, and an information processing apparatus for executing a process by transferring a file recorded in the auxiliary memory to a main memory In the auxiliary memory, a header in which an address at which rewritable data of a recorded file is recorded is provided, and when a hibernation occurs, an address of the main memory corresponding to the address recorded in the header is provided. An information processing apparatus comprising a hibernation processing unit for recording data in a temporary storage area of the auxiliary memory. 2. The hibernation processing unit, when processing is resumed, moves a file whose processing is to be resumed from the auxiliary memory to the main memory, reads data from the temporary store area, and stores the data in the address recorded in the header. 2. The information processing apparatus according to claim 1, wherein the corresponding data in said main memory is rewritten.