IT1236994B - Processo per la fabbricazione di dispositivi semiconduttori mos di potenza e dispositivi con esso ottenuti - Google Patents
Processo per la fabbricazione di dispositivi semiconduttori mos di potenza e dispositivi con esso ottenutiInfo
- Publication number
- IT1236994B IT1236994B IT02289189A IT2289189A IT1236994B IT 1236994 B IT1236994 B IT 1236994B IT 02289189 A IT02289189 A IT 02289189A IT 2289189 A IT2289189 A IT 2289189A IT 1236994 B IT1236994 B IT 1236994B
- Authority
- IT
- Italy
- Prior art keywords
- devices
- manufacture
- power mos
- semiconductive
- devices obtained
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
- H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/126—Power FETs
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT02289189A IT1236994B (it) | 1989-12-29 | 1989-12-29 | Processo per la fabbricazione di dispositivi semiconduttori mos di potenza e dispositivi con esso ottenuti |
US07/632,485 US5141883A (en) | 1989-12-29 | 1990-12-24 | Process for the manufacture of power-mos semiconductor devices |
EP90203503A EP0435406B1 (en) | 1989-12-29 | 1990-12-24 | Process for the manufacture of powermos semiconductor devices and the devices obtained therewith |
DE69007449T DE69007449T2 (de) | 1989-12-29 | 1990-12-24 | Verfahren zur Herstellung von Leistungsmos- und Halbleiteranordnungen und damit hergestellten Anordnungen. |
KR1019900022248A KR100202048B1 (ko) | 1989-12-29 | 1990-12-28 | 전력-mos 반도체 장치의 제조공정 및 그에 따른 장치 |
JP2418101A JPH04305978A (ja) | 1989-12-29 | 1990-12-28 | 電力用mos半導体デバイスの製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT02289189A IT1236994B (it) | 1989-12-29 | 1989-12-29 | Processo per la fabbricazione di dispositivi semiconduttori mos di potenza e dispositivi con esso ottenuti |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8922891A0 IT8922891A0 (it) | 1989-12-29 |
IT1236994B true IT1236994B (it) | 1993-05-12 |
Family
ID=11201599
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT02289189A IT1236994B (it) | 1989-12-29 | 1989-12-29 | Processo per la fabbricazione di dispositivi semiconduttori mos di potenza e dispositivi con esso ottenuti |
Country Status (6)
Country | Link |
---|---|
US (1) | US5141883A (it) |
EP (1) | EP0435406B1 (it) |
JP (1) | JPH04305978A (it) |
KR (1) | KR100202048B1 (it) |
DE (1) | DE69007449T2 (it) |
IT (1) | IT1236994B (it) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5288653A (en) * | 1991-02-27 | 1994-02-22 | Nec Corporation | Process of fabricating an insulated-gate field effect transistor |
EP1408542A3 (en) * | 1994-07-14 | 2009-01-21 | STMicroelectronics S.r.l. | High-speed MOS-technology power device integrated structure, and related manufacturing process |
US5474946A (en) * | 1995-02-17 | 1995-12-12 | International Rectifier Corporation | Reduced mask process for manufacture of MOS gated devices |
US5595918A (en) * | 1995-03-23 | 1997-01-21 | International Rectifier Corporation | Process for manufacture of P channel MOS-gated device |
US5830798A (en) * | 1996-01-05 | 1998-11-03 | Micron Technology, Inc. | Method for forming a field effect transistor |
KR100204805B1 (ko) * | 1996-12-28 | 1999-06-15 | 윤종용 | 디엠오에스 트랜지스터 제조방법 |
EP0993033A1 (en) | 1998-10-06 | 2000-04-12 | STMicroelectronics S.r.l. | Gate insulating structure for power devices, and related manufacturing process |
US6214673B1 (en) * | 1999-07-09 | 2001-04-10 | Intersil Corporation | Process for forming vertical semiconductor device having increased source contact area |
DE19959346B4 (de) * | 1999-12-09 | 2004-08-26 | Micronas Gmbh | Verfahren zum Herstellen eines eine Mikrostruktur aufweisenden Festkörpers |
WO2002050878A1 (de) | 2000-12-21 | 2002-06-27 | Micronas Gmbh | Verfahren zum herstellen eines eine mikrostruktur aufweisenden festkörpers |
ITVA20010045A1 (it) * | 2001-12-14 | 2003-06-16 | St Microelectronics Srl | Flusso di processo per la realizzazione di un vdmos a canale scalato e basso gradiente di body per prestazioni ad elevata densita' di corren |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4443931A (en) * | 1982-06-28 | 1984-04-24 | General Electric Company | Method of fabricating a semiconductor device with a base region having a deep portion |
US4489481A (en) * | 1982-09-20 | 1984-12-25 | Texas Instruments Incorporated | Insulator and metallization method for VLSI devices with anisotropically-etched contact holes |
US4677735A (en) * | 1984-05-24 | 1987-07-07 | Texas Instruments Incorporated | Method of providing buried contacts for N and P channel devices in an SOI-CMOS process using a single N+polycrystalline silicon layer |
IT1213234B (it) * | 1984-10-25 | 1989-12-14 | Sgs Thomson Microelectronics | Procedimento perfezionato per la fabbricazione di dispositivi a semiconduttore dmos. |
DE3688057T2 (de) * | 1986-01-10 | 1993-10-07 | Gen Electric | Halbleitervorrichtung und Methode zur Herstellung. |
IT1204243B (it) * | 1986-03-06 | 1989-03-01 | Sgs Microelettronica Spa | Procedimento autoallineato per la fabbricazione di celle dmos di piccole dimensioni e dispositivi mos ottenuti mediante detto procedimento |
US4798810A (en) * | 1986-03-10 | 1989-01-17 | Siliconix Incorporated | Method for manufacturing a power MOS transistor |
US4716126A (en) * | 1986-06-05 | 1987-12-29 | Siliconix Incorporated | Fabrication of double diffused metal oxide semiconductor transistor |
US4842675A (en) * | 1986-07-07 | 1989-06-27 | Texas Instruments Incorporated | Integrated circuit isolation process |
US4772569A (en) * | 1986-10-30 | 1988-09-20 | Mitsubishi Denki Kabushiki Kaisha | Method for forming oxide isolation films on french sidewalls |
US4735680A (en) * | 1986-11-17 | 1988-04-05 | Yen Yung Chau | Method for the self-aligned silicide formation in IC fabrication |
JP2604777B2 (ja) * | 1988-01-18 | 1997-04-30 | 松下電工株式会社 | 二重拡散型電界効果半導体装置の製法 |
US4949136A (en) * | 1988-06-09 | 1990-08-14 | University Of Connecticut | Submicron lightly doped field effect transistors |
US4985740A (en) * | 1989-06-01 | 1991-01-15 | General Electric Company | Power field effect devices having low gate sheet resistance and low ohmic contact resistance |
-
1989
- 1989-12-29 IT IT02289189A patent/IT1236994B/it active IP Right Grant
-
1990
- 1990-12-24 US US07/632,485 patent/US5141883A/en not_active Expired - Lifetime
- 1990-12-24 EP EP90203503A patent/EP0435406B1/en not_active Expired - Lifetime
- 1990-12-24 DE DE69007449T patent/DE69007449T2/de not_active Expired - Fee Related
- 1990-12-28 JP JP2418101A patent/JPH04305978A/ja active Pending
- 1990-12-28 KR KR1019900022248A patent/KR100202048B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
IT8922891A0 (it) | 1989-12-29 |
DE69007449D1 (de) | 1994-04-21 |
JPH04305978A (ja) | 1992-10-28 |
KR100202048B1 (ko) | 1999-06-15 |
EP0435406B1 (en) | 1994-03-16 |
US5141883A (en) | 1992-08-25 |
KR910013450A (ko) | 1991-08-08 |
EP0435406A1 (en) | 1991-07-03 |
DE69007449T2 (de) | 1994-08-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
IT1223135B (it) | Dispositivo semiconduttore e metodo di fabbricazione dello stesso | |
IT8622719A0 (it) | Struttura mos di potenza con dispositivo di protezione contro le sovratensioni e processo per lasua fabbricazione. | |
BR9006876A (pt) | Dispositivo de emissao de campo e processo para sua formacao | |
EP0421735A3 (en) | Semiconductor device and method of manufacturing the same | |
BR8807599A (pt) | Aparelho e processo de resfriamento | |
IT1171668B (it) | Dispositivo termoelettrico e metodo di fabbricazione dello stesso | |
PT87075A (pt) | Aparelho misturador e processo para o fabrico do mesmo | |
BR8506852A (pt) | Processo e dispositivo para ajuntamento de um dispositivo de fiacao de extremidade aberta | |
IT1167444B (it) | Processo e dispositivo per la produzione di profilati | |
IT1236994B (it) | Processo per la fabbricazione di dispositivi semiconduttori mos di potenza e dispositivi con esso ottenuti | |
BR9007797A (pt) | Processo para fabricacao de borracha de nitrila e borracha reduzida | |
IT1193328B (it) | Processo e relativo apparato per la metallizzazione di dispositivi semiconduttori | |
KR910002005A (ko) | 바이폴라트랜지스터와 그 제조방법 | |
IT8968124A0 (it) | Impianto e procedimento per la formatura di elastomeri | |
IT1202657B (it) | Procedimento di fabbricazione di un dispositivo modulare di potenza a semiconduttore e dispositivo con esso ottenento | |
DE69419464D1 (de) | Thermischer Isolator und Herstellungsverfahren | |
KR900015301A (ko) | 반도체장치 및 그 제조방법 | |
IT1236728B (it) | Procedimento per formare la struttura di isolamento e la struttura di gate di dispositivi integrati | |
IT8150042A0 (it) | Procedimento e dispositivo per laproduzione di piastrine di semiconduttore | |
BR9004529A (pt) | Composicao de sabao e processo para sua obtencao | |
KR900015277A (ko) | 반도체장치 및 그 제조방법 | |
IT1230028B (it) | Procedimento di fabbricazione di dispositivi semiconduttori mos avvalentesi di un trattamento "gettering" di migliorare caratteristiche, e dispositivi semiconduttori mos con esso ottenuti | |
IT1185286B (it) | Procedimento e dispositivo per la nastratura di telaietti ad aduttori | |
BR8302251A (pt) | Isolador de disco com anel de guarnicao externo e processo para sua fabricacao | |
IT8920839A0 (it) | Procedimento e dispositivo per la realizzazione di pannelli. |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
0001 | Granted | ||
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19961227 |