IT1015566B - Circuito di memoria - Google Patents
Circuito di memoriaInfo
- Publication number
- IT1015566B IT1015566B IT7424638A IT2463874A IT1015566B IT 1015566 B IT1015566 B IT 1015566B IT 7424638 A IT7424638 A IT 7424638A IT 2463874 A IT2463874 A IT 2463874A IT 1015566 B IT1015566 B IT 1015566B
- Authority
- IT
- Italy
- Prior art keywords
- memory circuit
- memory
- circuit
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Dram (AREA)
- Electronic Switches (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1973077693U JPS5522640Y2 (it) | 1973-06-30 | 1973-06-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
IT1015566B true IT1015566B (it) | 1977-05-20 |
Family
ID=13640960
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT7424638A IT1015566B (it) | 1973-06-30 | 1974-06-28 | Circuito di memoria |
Country Status (8)
Country | Link |
---|---|
US (1) | US3919699A (it) |
JP (1) | JPS5522640Y2 (it) |
CA (1) | CA1025121A (it) |
DE (1) | DE2431580C2 (it) |
FR (1) | FR2235456B1 (it) |
GB (1) | GB1443588A (it) |
IT (1) | IT1015566B (it) |
NL (1) | NL7408737A (it) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4090256A (en) * | 1975-05-27 | 1978-05-16 | Motorola, Inc. | First-in-first-out register implemented with single rank storage elements |
GB1570887A (en) * | 1976-03-13 | 1980-07-09 | Ass Eng Ltd | Speed responsive systems |
DE2740113A1 (de) * | 1977-09-06 | 1979-03-15 | Siemens Ag | Monolithisch integrierter halbleiterspeicher |
JPS5753897A (en) * | 1980-09-14 | 1982-03-31 | Ricoh Co Ltd | Signal detecting circuit |
EP0065219B1 (en) * | 1981-05-08 | 1987-08-26 | Hitachi, Ltd. | Signal voltage dividing circuit |
US4578772A (en) * | 1981-09-18 | 1986-03-25 | Fujitsu Limited | Voltage dividing circuit |
US4656661A (en) * | 1984-12-13 | 1987-04-07 | American Telephone And Telegraph Company | Switched capacitor coupled line receiver circuit |
US6232931B1 (en) | 1999-02-19 | 2001-05-15 | The United States Of America As Represented By The Secretary Of The Navy | Opto-electronically controlled frequency selective surface |
FR2904463A1 (fr) * | 2006-07-27 | 2008-02-01 | St Microelectronics Sa | Programmation d'un circuit de retention de charges pour mesure temporelle |
CN101595530B (zh) * | 2006-07-27 | 2012-12-05 | 意法半导体有限公司 | 读取用于进行时间测量的电荷保持元件的电路 |
FR2904464A1 (fr) * | 2006-07-27 | 2008-02-01 | St Microelectronics Sa | Circuit eeprom de retention de charges pour mesure temporelle |
WO2008012459A2 (fr) | 2006-07-27 | 2008-01-31 | Stmicroelectronics Sa | Circuit de retention de charges pour mesure temporelle |
FR2926382B1 (fr) * | 2008-01-11 | 2010-02-26 | Proton World Internat Nv | Hierarchisation de cles cryptographiques dans un circuit electronique |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3373295A (en) * | 1965-04-27 | 1968-03-12 | Aerojet General Co | Memory element |
GB1256068A (en) * | 1967-12-07 | 1971-12-08 | Plessey Co Ltd | Improvements in or relating to logic circuit arrangements |
US3581292A (en) * | 1969-01-07 | 1971-05-25 | North American Rockwell | Read/write memory circuit |
US3618053A (en) * | 1969-12-31 | 1971-11-02 | Westinghouse Electric Corp | Trapped charge memory cell |
US3646525A (en) * | 1970-01-12 | 1972-02-29 | Ibm | Data regeneration scheme without using memory sense amplifiers |
JPS5244180B1 (it) * | 1970-11-05 | 1977-11-05 | ||
US3652914A (en) * | 1970-11-09 | 1972-03-28 | Emerson Electric Co | Variable direct voltage memory circuit |
-
1973
- 1973-06-30 JP JP1973077693U patent/JPS5522640Y2/ja not_active Expired
-
1974
- 1974-06-27 NL NL7408737A patent/NL7408737A/xx not_active Application Discontinuation
- 1974-06-27 GB GB2861074A patent/GB1443588A/en not_active Expired
- 1974-06-28 US US484313A patent/US3919699A/en not_active Expired - Lifetime
- 1974-06-28 IT IT7424638A patent/IT1015566B/it active
- 1974-06-28 FR FR7422785A patent/FR2235456B1/fr not_active Expired
- 1974-06-28 CA CA203,646A patent/CA1025121A/en not_active Expired
- 1974-07-01 DE DE2431580A patent/DE2431580C2/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE2431580A1 (de) | 1975-01-09 |
DE2431580C2 (de) | 1986-09-11 |
NL7408737A (nl) | 1975-01-02 |
JPS5522640Y2 (it) | 1980-05-29 |
CA1025121A (en) | 1978-01-24 |
FR2235456A1 (it) | 1975-01-24 |
JPS5025444U (it) | 1975-03-24 |
GB1443588A (en) | 1976-07-21 |
US3919699A (en) | 1975-11-11 |
FR2235456B1 (it) | 1978-04-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
AT341253B (de) | Speicheranordnung | |
IT1007147B (it) | Circuito integrato | |
IT1015757B (it) | Memoria integrata | |
IT1012811B (it) | Circuito di commutazione | |
SE398686B (sv) | Minnes-struktur | |
IT1021265B (it) | Circuito integrato | |
IT981982B (it) | Circuito di discriminazione perfezionato | |
IT1015570B (it) | Circuito amplificatore | |
IT1012351B (it) | Circuito integrato semiconduttore | |
BR7402269D0 (pt) | Circuito | |
IT1021494B (it) | Circuito di memorizzazione associativo | |
IT1015566B (it) | Circuito di memoria | |
BR7402420D0 (pt) | Circuito detetor | |
BR7408995D0 (pt) | Arranjo de circuito | |
IT972369B (it) | Circuito di memoria 3on l1mp1d1&1 e565 | |
BR7406029D0 (pt) | Disposicao de circuito | |
IT1002423B (it) | Circuito comparatore | |
IT978033B (it) | Circuito integrato | |
IT1022492B (it) | Dispositivo di memoria | |
BR7406598D0 (pt) | Circuito temporizado | |
AR200937A1 (es) | Circuito de polarizacion | |
IT1014175B (it) | Circuito telefonico interurbano | |
IT1021167B (it) | Circuito semiconduttore darlington | |
IT1011202B (it) | Circuito logico perfezionato | |
IT1027559B (it) | Circuito di commutazione |