GB1383165A - Manufacturing semiconductor devices - Google Patents
Manufacturing semiconductor devicesInfo
- Publication number
- GB1383165A GB1383165A GB2048273A GB2048273A GB1383165A GB 1383165 A GB1383165 A GB 1383165A GB 2048273 A GB2048273 A GB 2048273A GB 2048273 A GB2048273 A GB 2048273A GB 1383165 A GB1383165 A GB 1383165A
- Authority
- GB
- United Kingdom
- Prior art keywords
- wafers
- rod
- plane
- spine
- april
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title abstract 5
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 235000012431 wafers Nutrition 0.000 abstract 8
- 238000004140 cleaning Methods 0.000 abstract 2
- 238000005530 etching Methods 0.000 abstract 2
- 238000003776 cleavage reaction Methods 0.000 abstract 1
- 239000013078 crystal Substances 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 239000007791 liquid phase Substances 0.000 abstract 1
- 230000007017 scission Effects 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
- H01L21/3043—Making grooves, e.g. cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Weting (AREA)
- Processing Of Stones Or Stones Resemblance Materials (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
1383165 Making semi-conductor devices MITSUBISHI DENKI KK 30 April 1973 [28 April 1972] 20482/73 Heading HIK During one or more processing steps semiconductor wafers under treatment remain attached to a parent semi-conductor body. The wafers are separated only at the stage when individual treatment is necessary to continue manufacture. The Figure shows a cylindrical rod of monoerystalline silicon in which wafers 22 have been defined by saw cuts 18 (or other slits) extending nearly through the rod. The end portions 24 are made more substantial and are used as handling bodies and may have apertures 16 to receive the chucks of an etching or cleaning apparatus &c. The wafers 18 in a set need not all have the same thickness. The spine 20 of the rod may be provided with a plane surface so that the wafer set does not roll. Lot identification numbers (not shown) may be marked on the end faces of the handling bodies 24. In alternative arrangements (Figs. 5 and 6, not shown) the wafers may lie parallel to a plane at an angle to that shown or may be defined by slots parallel to the plane containing the axis of the rod. The united wafers may be subjected to cleaning, etching, impurity diffusion, or semiconductor growth from the liquid phase. When making power diodes or thyristors it may not be necessary to etch away the damaged surface produced by a sawing operation. The wafers may be separated from the spine by cleavage along chosen crystal planes.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4306172A JPS495265A (en) | 1972-04-28 | 1972-04-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1383165A true GB1383165A (en) | 1975-02-05 |
Family
ID=12653339
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB2048273A Expired GB1383165A (en) | 1972-04-28 | 1973-04-30 | Manufacturing semiconductor devices |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPS495265A (en) |
DE (1) | DE2321501A1 (en) |
FR (1) | FR2182216B1 (en) |
GB (1) | GB1383165A (en) |
NL (1) | NL7305945A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3840588C1 (en) * | 1988-12-02 | 1990-02-22 | Westdeutsche Quarzschmelze Gmbh & Co. Kg, 2054 Geesthacht, De | Quartz glass container for the thermal treatment of semiconductor wafers |
EP1342259A1 (en) * | 2000-11-29 | 2003-09-10 | Origin Energy Retail Limited | Semiconductor wafer processing to increase the usable planar surface area |
US7828983B2 (en) | 2001-11-29 | 2010-11-09 | Transform Solar Pty Ltd | Semiconductor texturing process |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5255537A (en) * | 1975-10-31 | 1977-05-07 | Sumitomo Electric Ind Ltd | Chargning device |
JPS5421727A (en) * | 1977-07-19 | 1979-02-19 | Ricoh Co Ltd | Detecting and treating method for wire rupture of corona discharge of copier |
DE102006060195A1 (en) * | 2006-12-18 | 2008-06-26 | Jacobs University Bremen Ggmbh | Edge rounding of wafers |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3128213A (en) * | 1961-07-20 | 1964-04-07 | Int Rectifier Corp | Method of making a semiconductor device |
-
1972
- 1972-04-28 JP JP4306172A patent/JPS495265A/ja active Pending
-
1973
- 1973-04-27 NL NL7305945A patent/NL7305945A/xx unknown
- 1973-04-27 FR FR7315498A patent/FR2182216B1/fr not_active Expired
- 1973-04-27 DE DE19732321501 patent/DE2321501A1/en active Pending
- 1973-04-30 GB GB2048273A patent/GB1383165A/en not_active Expired
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3840588C1 (en) * | 1988-12-02 | 1990-02-22 | Westdeutsche Quarzschmelze Gmbh & Co. Kg, 2054 Geesthacht, De | Quartz glass container for the thermal treatment of semiconductor wafers |
EP1342259A1 (en) * | 2000-11-29 | 2003-09-10 | Origin Energy Retail Limited | Semiconductor wafer processing to increase the usable planar surface area |
EP1575087A3 (en) * | 2000-11-29 | 2006-01-18 | Origin Energy Solar Pty.Ltd | Semiconductor wafer processing to increase the usable planar surface area |
EP1342259A4 (en) * | 2000-11-29 | 2006-04-05 | Origin Energy Solar Pty Ltd | Semiconductor wafer processing to increase the usable planar surface area |
US7875794B2 (en) | 2000-11-29 | 2011-01-25 | Transform Solar Pty Ltd | Semiconductor wafer processing to increase the usable planar surface area |
US9583668B2 (en) | 2000-11-29 | 2017-02-28 | The Australian National University | Semiconductor device |
US7828983B2 (en) | 2001-11-29 | 2010-11-09 | Transform Solar Pty Ltd | Semiconductor texturing process |
Also Published As
Publication number | Publication date |
---|---|
FR2182216B1 (en) | 1977-08-19 |
NL7305945A (en) | 1973-10-30 |
JPS495265A (en) | 1974-01-17 |
FR2182216A1 (en) | 1973-12-07 |
DE2321501A1 (en) | 1973-11-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PE20 | Patent expired after termination of 20 years |
Effective date: 19930429 |