GB1372779A - Integrated circuits - Google Patents

Integrated circuits

Info

Publication number
GB1372779A
GB1372779A GB4108472A GB4108472A GB1372779A GB 1372779 A GB1372779 A GB 1372779A GB 4108472 A GB4108472 A GB 4108472A GB 4108472 A GB4108472 A GB 4108472A GB 1372779 A GB1372779 A GB 1372779A
Authority
GB
United Kingdom
Prior art keywords
inclusions
regions
impurity
wafer
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4108472A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1372779A publication Critical patent/GB1372779A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/2205Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Element Separation (AREA)
  • Bipolar Transistors (AREA)

Abstract

1372779 Integrated circuit manufacture INTERNATIONAL BUSINESS MACHINES CORP 5 Sept 1972 [22 Nov 1971] 41084/72 Heading H1K When an epitaxial layer is grown over a semiconductor substrate having diffused inclusions in its surface impurity may evaporate into the atmosphere from the inclusions and diffuse back into adjacent areas of the substrate to cause undesirable short circuits between adjacent inclusions. This is compensated for by diffusing impurity determinative of the conductivity type opposite to that of the inclusions into their surfaces prior to the epitaxial deposition. In the embodiment the inclusions are N+ subcollector regions formed by diffusing arsenic or phosphorus into a silicon wafer via oxide masking. Boron or gallium is then diffused as compensating impurity via the same mask to provide shallow P+ regions. An N-type layer is epitaxially deposited after removal of the mask and P-type isolating regions formed in it by masked acceptor diffusion. Subsequent masked acceptor and donor diffusions provide base and emitter regions and contact is made thereto and to the collector region via holes in oxide masking. The shallow P+ regions are so doped that by the time the above processes are complete they will have been converted to N-type. If desired the wafer may have a plurality of integrated circuits including diodes and resistors formed on it. These may subsequently be diced from the wafer.
GB4108472A 1971-11-22 1972-09-05 Integrated circuits Expired GB1372779A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US20102471A 1971-11-22 1971-11-22

Publications (1)

Publication Number Publication Date
GB1372779A true GB1372779A (en) 1974-11-06

Family

ID=22744168

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4108472A Expired GB1372779A (en) 1971-11-22 1972-09-05 Integrated circuits

Country Status (4)

Country Link
JP (1) JPS5348073B2 (en)
DE (1) DE2250990A1 (en)
FR (1) FR2160830B1 (en)
GB (1) GB1372779A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5410667A (en) * 1977-06-27 1979-01-26 Hitachi Ltd Semiconductor device
NL8006827A (en) * 1980-12-17 1982-07-16 Philips Nv METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
JPS57128953A (en) * 1981-02-02 1982-08-10 Matsushita Electric Ind Co Ltd Manufacture of semiconductor integrated circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1051562A (en) * 1963-11-26

Also Published As

Publication number Publication date
JPS5348073B2 (en) 1978-12-26
FR2160830A1 (en) 1973-07-06
DE2250990A1 (en) 1973-05-24
JPS4860574A (en) 1973-08-24
FR2160830B1 (en) 1974-08-19

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee