GB1262245A - Production of circuit boards - Google Patents

Production of circuit boards

Info

Publication number
GB1262245A
GB1262245A GB1367370A GB1367370A GB1262245A GB 1262245 A GB1262245 A GB 1262245A GB 1367370 A GB1367370 A GB 1367370A GB 1367370 A GB1367370 A GB 1367370A GB 1262245 A GB1262245 A GB 1262245A
Authority
GB
United Kingdom
Prior art keywords
areas
conductors
substrate
layer
built
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1367370A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1262245A publication Critical patent/GB1262245A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09881—Coating only between conductors, i.e. flush with the conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0733—Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

1,262,245. Printed circuits. INTERNATIONAL BUSINESS MACHINES CORP. 20 March, 1970 [2 April, 1969], No. 13673/70. Heading H1R. A substrate; 10, is coated with a conducting layer, 11, on which areas 13 of spacing material are formed, the intervening spaces 14 then being built up with conducting material to form conductors, the areas 13 and the conducting layer beneath being then removed and replaced by an insulator in liquid or powder form, which is then hardened in. position at 16, any excess covering the conductors being subsequently removed. The substrate may be of epoxy resin ceramic or steel of high impedance, the areas 13 being provided by applying and. exposing a photo-resist. The conductors may be built up electrolytically, the areas 13 being removed with a solvent, and the portions of the layer 11 beneath by etching. The insulator applied between the conductors may be of resin or powdered glass which is sintered. The finished board may be used as the substrate for a subsequent layer of a multilayer board.
GB1367370A 1969-04-02 1970-03-20 Production of circuit boards Expired GB1262245A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US81270069A 1969-04-02 1969-04-02

Publications (1)

Publication Number Publication Date
GB1262245A true GB1262245A (en) 1972-02-02

Family

ID=25210373

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1367370A Expired GB1262245A (en) 1969-04-02 1970-03-20 Production of circuit boards

Country Status (4)

Country Link
JP (1) JPS502059B1 (en)
DE (1) DE2015643A1 (en)
FR (1) FR2042059A5 (en)
GB (1) GB1262245A (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5398650U (en) * 1977-01-14 1978-08-10
JPS543202U (en) * 1977-06-08 1979-01-10
DE3315615A1 (en) * 1983-04-29 1984-10-31 Brown, Boveri & Cie Ag, 6800 Mannheim METHOD FOR PRODUCING A MULTILAYER CIRCUIT
US4705606A (en) * 1985-01-31 1987-11-10 Gould Inc. Thin-film electrical connections for integrated circuits
US4996584A (en) * 1985-01-31 1991-02-26 Gould, Inc. Thin-film electrical connections for integrated circuits
JPS6224739U (en) * 1985-07-30 1987-02-14
DE3735959A1 (en) * 1987-10-23 1989-05-03 Bbc Brown Boveri & Cie Multilayer thin-film circuit and a method for its production
JPH01268504A (en) * 1988-04-21 1989-10-26 Cleanup Corp Cabinet for various purpose
DE69633690T2 (en) * 1995-10-23 2005-03-10 Ibiden Co., Ltd., Ogaki Resin filler and multilayer printed circuit board
WO2000025355A1 (en) * 1998-10-26 2000-05-04 Hitachi, Ltd. Method for fabricating semiconductor device
JP6447075B2 (en) * 2014-12-10 2019-01-09 凸版印刷株式会社 Wiring substrate, semiconductor device, and manufacturing method of semiconductor device

Also Published As

Publication number Publication date
FR2042059A5 (en) 1971-02-05
DE2015643A1 (en) 1970-11-05
JPS502059B1 (en) 1975-01-23

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