FR2930059B1 - PROCESSING A VIDEO SEQUENCE IN A CACHE MEMORY - Google Patents

PROCESSING A VIDEO SEQUENCE IN A CACHE MEMORY

Info

Publication number
FR2930059B1
FR2930059B1 FR0852374A FR0852374A FR2930059B1 FR 2930059 B1 FR2930059 B1 FR 2930059B1 FR 0852374 A FR0852374 A FR 0852374A FR 0852374 A FR0852374 A FR 0852374A FR 2930059 B1 FR2930059 B1 FR 2930059B1
Authority
FR
France
Prior art keywords
memory
video sequence
memory block
cache memory
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR0852374A
Other languages
French (fr)
Other versions
FR2930059A1 (en
Inventor
Marc Baillavoine
Pierre Larbier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ateme SA
Original Assignee
Ateme SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ateme SA filed Critical Ateme SA
Priority to FR0852374A priority Critical patent/FR2930059B1/en
Publication of FR2930059A1 publication Critical patent/FR2930059A1/en
Application granted granted Critical
Publication of FR2930059B1 publication Critical patent/FR2930059B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/126—Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/103—Selection of coding mode or of prediction mode
    • H04N19/107—Selection of coding mode or of prediction mode between spatial and temporal predictive coding, e.g. picture refresh
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/136—Incoming video signal characteristics or properties
    • H04N19/137—Motion inside a coding unit, e.g. average field, frame or block difference
    • H04N19/139—Analysis of motion vectors, e.g. their magnitude, direction, variance or reliability
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/176—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/43—Hardware specially adapted for motion estimation or compensation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/43—Hardware specially adapted for motion estimation or compensation
    • H04N19/433—Hardware specially adapted for motion estimation or compensation characterised by techniques for memory access

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

The method involves receiving a field of movement vectors, where each vector associates a pixel macroblock of one image to a memory block assembly of another image. Pixel values of memory blocks of the assembly are read using a cache memory. A count of number of macroblocks is stored in a label corresponding to the memory block. A location for writing pixel values of the given memory block is selected among a set of locations (38-1p-38-4p) of the cache memory using the labels of the memory blocks stored at the locations, during reading of the pixel values of the given memory block. Independent claims are also included for the following: (1) a computer program comprising instructions for implementing a video sequence processing method (2) a device for processing a video sequence of images sub-divided into pixel macroblocks (3) a memory comprising a set of memory zones.
FR0852374A 2008-04-09 2008-04-09 PROCESSING A VIDEO SEQUENCE IN A CACHE MEMORY Active FR2930059B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR0852374A FR2930059B1 (en) 2008-04-09 2008-04-09 PROCESSING A VIDEO SEQUENCE IN A CACHE MEMORY

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0852374A FR2930059B1 (en) 2008-04-09 2008-04-09 PROCESSING A VIDEO SEQUENCE IN A CACHE MEMORY

Publications (2)

Publication Number Publication Date
FR2930059A1 FR2930059A1 (en) 2009-10-16
FR2930059B1 true FR2930059B1 (en) 2010-04-09

Family

ID=40344891

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0852374A Active FR2930059B1 (en) 2008-04-09 2008-04-09 PROCESSING A VIDEO SEQUENCE IN A CACHE MEMORY

Country Status (1)

Country Link
FR (1) FR2930059B1 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2820846B1 (en) * 2001-02-12 2003-05-30 Thomson Multimedia Sa DEVICE AND METHOD FOR MANAGING ACCESS TO A RECORDING MEDIUM
JP2006031480A (en) * 2004-07-16 2006-02-02 Sony Corp Information processing system, information processing method, and computer program thereof
FR2897213A1 (en) * 2006-02-08 2007-08-10 Thomson Licensing Sas BLOCK ENCODING METHOD OF IMAGES OF A SEQUENCE OF VIDEO IMAGES

Also Published As

Publication number Publication date
FR2930059A1 (en) 2009-10-16

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