FR2155253A1 - - Google Patents
Info
- Publication number
- FR2155253A1 FR2155253A1 FR7230964A FR7230964A FR2155253A1 FR 2155253 A1 FR2155253 A1 FR 2155253A1 FR 7230964 A FR7230964 A FR 7230964A FR 7230964 A FR7230964 A FR 7230964A FR 2155253 A1 FR2155253 A1 FR 2155253A1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/386—Special constructional features
- G06F2207/3872—Precharge of output to prevent leakage
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US17667071A | 1971-08-31 | 1971-08-31 | |
US17666771A | 1971-08-31 | 1971-08-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
FR2155253A1 true FR2155253A1 (fr) | 1973-05-18 |
Family
ID=26872463
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7230964A Pending FR2155253A1 (fr) | 1971-08-31 | 1972-08-31 |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2155253A1 (fr) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3415981A (en) * | 1967-10-10 | 1968-12-10 | Rca Corp | Electronic computer with program debugging facility |
US3461434A (en) * | 1967-10-02 | 1969-08-12 | Burroughs Corp | Stack mechanism having multiple display registers |
US3462742A (en) * | 1966-12-21 | 1969-08-19 | Rca Corp | Computer system adapted to be constructed of large integrated circuit arrays |
US3566153A (en) * | 1969-04-30 | 1971-02-23 | Texas Instruments Inc | Programmable sequential logic |
-
1972
- 1972-08-31 FR FR7230964A patent/FR2155253A1/fr active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3462742A (en) * | 1966-12-21 | 1969-08-19 | Rca Corp | Computer system adapted to be constructed of large integrated circuit arrays |
US3461434A (en) * | 1967-10-02 | 1969-08-12 | Burroughs Corp | Stack mechanism having multiple display registers |
US3415981A (en) * | 1967-10-10 | 1968-12-10 | Rca Corp | Electronic computer with program debugging facility |
US3566153A (en) * | 1969-04-30 | 1971-02-23 | Texas Instruments Inc | Programmable sequential logic |
Non-Patent Citations (1)
Title |
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TECHNIQUE THOMSON-CSF, vol. 2, no. 1, mars 1970, pages 13-23, Versailles (FR); * |