EP2604097B1 - Modulation of a pfc during dc operation - Google Patents

Description

The invention relates to methods for operating a control gear for lighting, such as an electronic ballast (ECG) for gas discharge lamps or LEDs. The operating device in this case has an actively clocked power factor correction circuit (PFC, Power Factor Correction) for reducing harmonics in the input current recording, which is formed, for example, in the form of a switching regulator (boost converter) with a clocked switch, wherein the switch is controlled by a control circuit becomes.

As said, the present invention relates to loads in the form of bulbs having PFC circuits. Such, from the DE 10128588 A1 known operating device is in Fig. 1 shown. More specifically, it is in the Fig. 1 shown device to an electronic ballast (ECG). This in Fig. 1 shown ballast is connected on the input side via a high-frequency filter 1 to a mains supply voltage U ₀ . The output of the high-frequency filter 1 is connected to a rectifier circuit 2 in the form of a Full bridge rectifier connected. The rectified by the rectifier circuit 2 AC supply voltage at the same time represents the input voltage U _i for the smoothing circuit 3. This is formed in the present example by a smoothing capacitor C1 and an inductor L1, a controllable switch in the form of a MOS field effect transistor S1 and a diode D1 having boost converter , Instead of the boost converter, other switching regulators can be used. The PFC circuit is formed by the selection of the control of the switch S1.

By a corresponding switching of the MOS field-effect transistor S1 is in a conventional manner (see, for example, also WO 99/34647 A1 ) generates an applied over the subsequently arranged storage capacitor C2 intermediate circuit voltage U _z , which is supplied to the inverter 4. The inverter 4 is formed in the present example by two further arranged in a half-bridge arrangement MOS field effect transistors S2 and S3. By high-frequency clocking these two switches S2 and S3, a high-frequency AC voltage is generated at the center tap, which is supplied to the load circuit 5 with the gas discharge lamp LA connected thereto.

The mode of operation of this boost converter is already known in principle and will therefore be briefly summarized below. If the field effect transistor S1 is conductive, the current in the inductance L1 increases linearly. If, however, the field effect transistor S1 blocks, the current discharges into the storage capacitor C2. By selectively controlling the switch S1, the energy consumption of the boost converter and thus the the DC voltage applied to the storage capacitor C2 (bus voltage) U _{z are} affected.

The triggering of the switch S1 of the boost converter is effected by a control circuit 6 which generates corresponding switching information and transmits it to a driver circuit 7 adjoining the control circuit 6. This in turn converts the switching information into corresponding power control signals and controls via the line 14 the gate of the field effect transistor S1. In the same way, signals for driving the two field-effect transistors S2 and S3 of the inverter 4 are generated by the control circuit 6 and the driver circuit 7. All components of the control unit 6 can be synchronized, for example, via a central clock 8, which transmits corresponding clock signals to them. The control unit 6 is designed as an application-specific integrated circuit (ASIC) and accordingly occupies only little space.

The switching information for the switch S1 of the boost converter is calculated by a digital control circuit 9 arranged within the control circuit 6. For this purpose, the control circuit 2 has analog / digital converters ADC ₁ and ADC ₂ , which supply the input voltage U _i and _i supplied via the input line 15 convert the DC link voltage U _z supplied via the input line 16 into digital values.

The computing block 12 serves to calculate a suitable duty cycle for the switch S1 on the basis of the current value of the intermediate circuit voltage U _z . However, before a control signal for the switch S1 is generated on the basis of the duty cycle determined by the computing block 12, the switch-on time, however, still becomes supplemented (extended) by an additional value determined by the switching time extension block 13. For this purpose, the switching time extension block 13 has a memory with a table which assigns each value of the input voltage U _i a specific time interval by which the switch-on time of the switch S1 is extended. The value of this additional interval is, as mentioned, added to the duty cycle calculated by the calculation block 12 and transmitted to an output block 11. This generates a corresponding switching information which is supplied to the driver circuit 7, which then finally transmitted by a corresponding control signal via the line 14 to the switch S1.

In the most general way, the relationship between the turn-on extension and the input voltage is that the lower the input voltage U _i , the greater the turn-on extension. In particular, therefore, the switch-on extension will take place in the region of the zero crossings of the sinusoidal alternating voltage which is present at the input.

In addition, it should be noted that the control circuit 6 is also used for operating the two switches S2 and S3 of the inverter 4. For this purpose, one or more - not shown - analog / digital converters may be provided, which implement the load circuit 5 taken operating parameters into digital values and the digital control circuit 9 supply. Shown is a control block 10 which calculates control information for the switches S2 and S3 in response to the input signals and transmits the driver circuit 7. The driver circuit 7 in turn generates corresponding control signals and transmits them via the lines 17 and 18 to the gates of the two field effect transistors S2 and S3 of the inverter 4th

The described known from the prior art circuit is well suited for AC operation, after all, yes, the switch-on time extension is dependent on a detection of the zero crossings of the applied sinusoidal AC voltage U ₀ .

Generally, on the other hand, if a DC voltage is applied to such a circuit, the on time extension is disabled. The concern of a DC voltage, for example, in emergency mode. The known circuit thus operates in emergency mode without duty cycle extension and thus with a constant frequency. This fixed operating frequency of the power factor correction circuit (PFC) 3 thus generates substantially fixed frequency noise. This can cause problems with the EMC regulations that also apply to emergency lighting operation (DC operation).

WO 2006/042640 A2 Removes this problem by teaching that, even with a DC supply, the PFC, which would then actually switch at a constant switching frequency, specifically detects a frequency change (a so-called "sweep mode", also known as "wobbling", ie a cyclically recurring acceleration and deceleration of a frequency) is performed.

In the practical embodiment, this is particularly such that, starting from a nominal t _on value for the switch of the converter, the t _on time is incremented incrementally, and then reduced again until it has dropped symmetrically below the nominal t _on value is. This is repeated cyclically.

This means that for the AC operation the off Fig. 1 known circuit can continue to be used. Meanwhile, in DC operation, the operating frequency of the PFC is modulated so as to "dilute" the noise spectrum of the circuit to sub-bands outside the center operating frequency. This allows compliance with EMC regulations. The modulation may be a change in the switch-on time (ie extension / shortening of the switch-on time of the clocked switch) and / or the change of the switching frequency.

At low levels of dimming and / or light load, of course, the nominal value for the _on time of the switch of the PFC is reduced. As a result, when the t _on time is reduced below the nominal value, a very short turn- _on time can be achieved which, due to parasitic effects and delay times, only has a reduced effect on the PFC circuit. Thus, there is the risk with this method that in the symmetrical lowering of t _on- time impermissible switch-on times for the switch are achieved (since these switch-on times can either be critical for individual components or can remain without effect).

The present invention has therefore set itself the task of providing a method for operating a control device for lighting means, which ensures reliable operation of the lighting means.

The invention further forms the idea that the "sweep mode", also known as "wobble", is adaptively adjustable depending on the load, wherein the load can be connected, for example, to multi-lamp devices, to the lamps of different wattage, or can also change at different dimming levels. Therefore, with reduced load and / or reduced t _on time for lower dimming levels, the frequency sweep is reduced such that the deviation above / below the nominal value is reduced. Thus, in particular it is prevented that impermissible (too short) switch-on times for the switch were achieved in the case of the symmetrical lowering of the _on- time.

More specifically, the object is solved by the features of the independent claims.

The dependent claims further form the central idea of the invention in a particularly advantageous manner.

The invention thus provides a method for operating an operating device for loads in the form of lighting means, in particular an electronic ballast (ECG) for gas discharge lamps. The operating device in this case has a power factor correction circuit (PFC) for reducing harmonics in the input power consumption. In this case, the operating frequency of the power factor correction circuit is modulated at the input-side concern of a DC voltage. The frequency deviation of this modulation is load-dependent.

The frequency deviation preferably depends on the wattage of the connected lamps and / or the current dimming level.

• Modulation eines Sollwerts der Ausgangsspannung,
• Beaufschlagung einer Modulation auf einen direkt oder indirekt erfassten Istwert der Ausgangsspannung und/oder
• Modulation der Steuergrösse der Regelung.

The output voltage of the PFC can be regulated. The modulation of the frequency can be done by one or more of the following methods:

• Modulation of a setpoint of the output voltage,
• Actuation of a modulation on a directly or indirectly detected actual value of the output voltage and / or
• Modulation of the control variable of the control.

The switch-on period t _{on of} the switch is preferably modulated stepwise.

The frequency offset of the power factor correction (PFC) circuit may be selected depending on the difference between the current nominal value of the on-time and a lower limit.

It can be automatically switched to the modulation of the timing of the switch of the power factor correction circuit as soon as the operation of the device detects the presence of a DC voltage.

It may also be provided that upon reaching a predetermined lower threshold of the load, the timing of the switch of the power factor correction circuit is no longer modulated.

In the invention, it is further desired to first calculate a nominal value for the on period of the switch, accordingly setting a certain desired bus voltage at the output of the PFC and then modulating the timing of the switch of the power factor correction circuit.

It can also be provided that when a predetermined upper threshold of the load is reached, the timing of the switch of the power factor correction circuit is modulated normally, ie without any restriction. This means that from a certain power the sweep mode of the According to the method of the invention is carried out without restriction and therefore the nominal amplitude of the frequency is not limited. Thus, with stronger performance, the even stronger EMC load is effectively limited, identical to that of the WO 2006/042640 A2 known methods.

The power factor correction circuit (PFC) may be in the form of a switched-mode switching regulator. In order to reduce interference, the switch can be clocked in such a way that its switch-on time duration and / or its switching frequency is modulated on the input-side presence of a DC voltage.

The modulation frequency of the power factor correction circuit (PFC) can be selected such that adjusts a corresponding ripple in the output voltage of the power factor correction circuit (PFC). In other words, the modulation of the PFC circuit is not controlled by this or a Zwischenbusregelung. Rather, the compensation of this "ripples" (residual ripple) takes place in the bus voltage (ie the intermediate circuit voltage which is output by the power factor correction circuit and applied to the storage capacitor) for keeping constant the power consumption of the lighting means by frequency variation of the inverter. For this purpose, the control unit can detect an operating parameter such as, for example, the lamp current and the lamp voltage in a manner known per se and vary the frequency of the inverter depending on this detection and a deviation from a desired value.

The modulation frequency of the power factor correction circuit may be selected, for example, in a range between 15 Hz and 500 Hz, preferably between 90 and 400 Hz. In the prior art, the modulation is known to be associated with the zero crossings of the AC voltage, so that a modulation frequency of 100 Hz (Europe) and 120 Hz (USA) may result. In the invention, however, the modulation frequency is freely adjustable and optimized.

Of course, if a DC voltage is applied, the modulation can no longer be triggered by the zero crossings of the input voltage. According to the invention, it can therefore be provided that the modulation of the PFC circuit takes place by means of a timer circuit, by means of which values are read out of a look-up table. As in the prior art, these values are extension values that are added to the actual controller _value t _{ON_controller of} the control _circuit . The controller _value t _{ON_controller} is the switch-on time for the switch, which was calculated by a controller to _keep the output voltage of the PFC constant. According to the invention, the respective permissible frequency deviation can be stored in a look-up table and be read out depending on the current load state or dimming level. Alternatively, the extension values can be determined based on the deviation of the nominal value of the switch-on time from at least one limit value.

According to the invention can be automatically switched to the modulation by means of the timer circuit and the look-up table as soon as the operating device detects the concern of a DC voltage. Basically, the automatic detection of the emergency light operation (concern of a DC voltage) is already out of the EP 490329 B1 known. It will refer to the Fig. 4 there, reference numerals C25 and R21.

The modulation of the power factor correction circuit (PFC) can also be influenced by specifying at least one limit value, so that the respective allowable frequency deviation can be determined depending on the current load state or dimming level depending on the difference between the current switch-on time and the limit value.

The power factor correction circuit (PFC) can be operated in so-called border mode between random and non-latching operation ("borderline mode").

Finally, the invention also proposes an operating device for lighting means.

Fig. 1

eine aus dem Stand der Technik DE 101 28 588 A1 bekannte Schaltung,

Fig. 2a

eine erfindungsgemäße Schaltung,

Fig. 2b

eine weitere erfindungsgemäße Schaltung, und

Fig. 3

ein Diagramm zur Erläuterung des erfindungsgemäßen Verfahrens.

Further features, aspects and advantages of the present invention will now be made apparent from the explanation of an embodiment. In the accompanying figures show

Fig. 1

one of the prior art DE 101 28 588 A1 known circuit,

Fig. 2a

a circuit according to the invention,

Fig. 2b

another circuit according to the invention, and

Fig. 3

a diagram for explaining the method according to the invention.

It is understood that according to the invention for the AC operation, the circuit of Fig. 1 can be maintained. Fig. 2a and Fig. 2b additionally show the components that may be necessary for operation according to the invention with DC mains voltage. For the rest, those components which bear the same reference numerals in the two figures correspond.

In order to improve the interference spectrum of the circuit in emergency mode (DC network operation), the inventive circuit as in Fig. 2a shown, a control circuit 6, which detects the application of an AC or DC voltage by means of a signal 15, which reproduces the rectified input voltage U _i , and a circuit 20. In this case, for example, a circuit can be used which from Fig. 4 of EP 490329 A1 is basically known. This DC detection circuit 20 drives a clock generator 8. This clock generator 8 replaces, as it were, the zero crossings of the mains voltage which is no longer present during DC operation. The clock generator 8, for example, controls the reading of the extension values for the switch-on period of the switch S1 from a look-up table.

As is generally known from the prior art, the bus voltage U _z is possibly also measured and fed back to the control unit 6 (bus voltage signal 16) in order to regulate the bus voltage U _z to a desired value U _REF by varying the switching frequency of the switch S1. The control of the bus voltage thus results in a controller _value t _{ON_regulator} for the on and off _duration of the switch, which controller _value t _{ON_Regler} is applied during DC operation with a periodically changing additional _value t _{ON_ADD} to the frequency deviation and / or the switching frequency to improve the To modulate the interference spectrum.

When applying an AC voltage, however, the regulation of the bus voltage U _z by means of detecting the bus voltage 16 and the control circuit 9 is relatively slow compared to the modulation frequency or change the on time t _{on of} the switch S1, so that this modulation in the bus voltage U _z Thus, it is not corrected and the bus voltage will have a corresponding in relation to the switching frequency of the switch S1 low-frequency ripple.

This ripple of the bus voltage, however, by the return of the illuminant power reproducing parameter 19 (illuminant voltage, luminous flux, detection of the light output via an optical sensor or the like.) As the actual value and the control of the switching frequency of the inverter 4 to keep the illuminant power constant a predetermined setpoint can be compensated. The compensation of the ripple of the bus voltage can alternatively be done by a so-called "feed forward" setting the switching frequency of the inverter 4. In particular, with increasing height of the current bus voltage, the Switching frequency of the inverter 4 are increased and the switching frequency can be lowered with decreasing bus voltage.

Dabei wird jeder t_on-Index für eine einstellbare Zeitdauer ('Sweep value') eingestellt und anschließend der nächste Index aus der Look-Up-Tabelle ausgewählt. Durch Veränderung des Sweep-Werts kann die Modulationsfrequenz eingestellt werden.If a DC voltage is applied, the additional _values t _{ON_ADD} read from the look-up table can be _loaded into a memory of the ASIC 6. Then, these t _{ON_ADD} values from the switching time _{extension block} 13 are added to the regular t _{ON_controller} by the controller 12: $$t_{On}=t_{ON\_\mathit{ADD}}+t_{ON\_\mathit{regulator}}$$

Each t _on index is set for an adjustable period of time ('sweep value') and then the next index is selected from the look-up table. By changing the sweep value, the modulation frequency can be adjusted.

Alternatively, these t _{ON_ADD} additional values can also be determined as a function of the current nominal value of the switch-on time sweep mode of the PFC. Such a determination of the frequency deviation is based on the Fig. 3 described.

In the practical embodiment, this is in particular such that, starting from a nominal t _on value t _{ON_regulator} for the switch of the converter, the t _on- time is gradually incremented, and then reduced again until it is symmetrically below the nominal t _on - Value has dropped. This is repeated cyclically. The modulation of the t _on value ensures that the t _off value is mitmoduliert, since the PFC is operated in borderline mode, ie it is turned on at a throttle current = 0. Thus, the PFC frequency is modulated with a frequency sweep, which is proportional to the t _on modulation.

It should be emphasized that first the control loop, which is to set a certain setpoint bus voltage at the output of the PFC, calculates a nominal value for the switch-on time duration, and then this nominal value is temporally changed in time. The temporal change does not result as an effect of the control algorithm, but is only applied after calculation of the nominal value. Thus, there is also a cyclic frequency change or t _on-time change even if supply voltage and load are constant.

In order to prevent inadmissible switch-on times under reduced load, the "sweep mode" is thus set adaptively according to the invention, the load being able to be connected, for example, to multi-lamp devices, to lamps of different wattage, or even to different dimming levels can change. Thus, in particular, the frequency deviation for the "sweep mode" of the PFC is set to be adaptively load-dependent.

Fig. 2a shows, for example, another, a lamp information reproducing parameter 22, which provides information about the connected load to the output block 11. This information may be, for example, data about the connected load (such as via detection of the lamp type or wattage and / or their nominal power).

Fig. 2b on the other hand shows an interface 20, which receives a default for the desired dimming level via a control line 21. The interface 20 can also be integrated in the control unit 6. The default of the dimming level can be present as a digital or analog control signal. This predetermined dimming level (dimming level) is supplied via the parameter 23 to the output block 11. The parameter 23 thus contains a Information about the load, in particular information about the deviation from the nominal load. This output block 11 can then adjust the so-called "sweep mode" adaptively with this information as described above, depending on the load. In FIG. 2b not shown is the influence of the interface on the control of the operating device to change the brightness. For example, this can be done in a known manner by changing the frequency of the inverter or by changing the turn-on of the switch of the inverter.

Figure 3 shows in a time-time diagram four examples (from left to right) of "sweep mode" cycles (each with the nominal value t _{ON_Regler} rising, falling and again increasing _incremental changes in the on-time of the switch and a nominal amplitude of 200ns ) at different loads, in which the three right are limited due to a low load by the inventive method in amplitude. The X-axis represents the basic time course without scaling, while the Y-axis represents the time duration of the switch-on time of the switch and thus corresponds to the level of the output voltage of the PFC. Thus, it will be understood that the left example corresponds to a higher load, higher power, or higher dimming level than the others.

As can be seen and explained below, according to the invention, therefore, the frequency deviation depends on the nominal value for the t _on time. The nominal value results from the control algorithm of the PFC and corresponds to 300, 200, 100 and 250ns in the four examples. The nominal value is determined by the control algorithm of the PFC (due to the control loop). exemplary Timing of the determination are shown schematically for the individual examples as times "calc-event".

The nominal value of the switch-on time t _{ON_controller} is incrementally increased by a step value t _{on_step} . From the sum of respective added values step _{on_step} t thus results in each case a supplementary value t _{ON_ADD} which the nominal value t _{ON_Regler} is added and thus the instantaneous value of the duty cycle (on-time) results. In this case, the step _value t _{on_step} can be subtracted from or added to the previous instantaneous value of the switch-on duration depending on the direction of the instantaneous change during the "sweep mode".

At low levels of dimming and / or light load, of course, the nominal value t _{ON_controller is reduced} for the _on time of the switch of the PFC, as shown in the three examples on the right. Therefore, with reduced load and / or reduced t _on time for lower dimming levels, the frequency sweep is reduced such that the deviation above / below the nominal value is reduced. The nominal amplitude of the sweep mode, in this case 200 ns, which results from the frequency sweep, is therefore limited by the method according to the invention as a function of the load and thus of the nominal switch-on _duration t _{ON_controller of} the switch. The difference between the nominal switch-on time t _{ON_controller} and the minimum value t _{on-min is} determined, this difference forms half of the respective permissible frequency deviation. This prevents in particular that in the case of the symmetrical lowering of the _on- time impermissible (too short) turn-on times for the switch would be achieved. The minimum value t _on-min forms a lower limit for the frequency deviation.

The second and fourth examples show that the modulation through the "sweep mode" partially prevented, that can be "cut off" when the duty cycle below the critical value t _on-min (also referred to as minimum value t _on-min ). In a stepwise change of the duty cycle, as shown in the examples, it is possible that thereby individual stages "cut off" (also referred to as "clipping"). The levels that would thus be in the impermissible range are prevented and instead the turn-on time period is set to the lowest permissible value. Thus, in the second example, the two stages prescribed by "sweep mode" are cut off or prevented with t _ON = 50ns and 0ns where the duty cycle remains at the still allowed value t _ON = 100ns. As soon as the duty cycle prescribed by "sweep mode" increases again in the permitted range, ie above 100 ns, the actual duty cycle is also set accordingly. So that the nominal value is not distorted, the upper peaks of the modulation are adjusted according to the lower peaks, so cut off, so that the average value is not distorted. In this way, therefore, the frequency deviation is adjusted indirectly load-dependent. In the Fig. 3 In this case, when changing from the first to the second example, the frequency deviation is limited from 400 ns to 200 ns (ie the deviation from the lower limit t _on-min to the nominal value t _{ON_regulator} is reduced from an amplitude of 200 ns to 100 ns).

The determination at which stage a cycle of the "sweep mode" is to be cut off can be made at the beginning of the cycle of the "sweep mode" or as soon as the current nominal value of the duty cycle t _{ON_regulator has been} determined.

The determination of the frequency deviation by specifying at least one limit value, wherein the respective permissible frequency deviation can be determined as a function of the difference between the current switch-on time t _{ON_controller} and the limit value t _on-min , offers the advantage to the alternative example of the application of a look-up table, from which the values for the respective frequency deviation or the respective additional values t _{ON_ADD} can be read out, that in the simplest case only one limit value has to be stored in the memory and also an indirect one Adaptation to the current load can be made.

At particularly low load, as shown in the third example, even the frequency deviation can be completely prevented. However, because of the correspondingly reduced power and the EMC load is low, such a limitation is not a significant limitation in terms of EMC compatibility. At very low dimming levels and thus very low t _on- time (nominal value) so the stroke can be reduced to zero, ie at certain dimming levels or low loads, the "sweep mode" can be canceled. It can thus be given a lower threshold of the load and on reaching this lower threshold, the timing of the switch of the power factor correction circuit can no longer be modulated. This lower threshold can be set, for example, as a dimming level or load value or else as a value for the switch-on time t _on .

As already mentioned, in the case of the invention there is also a cyclic frequency change or t _on-time change if the supply voltage and the load are constant. Just then, the "sweep mode" with an unrestricted modulation due to the higher power should be chosen to reduce the EMC load through the PFC. This is represented by the left (ie first) example.

It can be specified in the control unit of the PFC as a lower limit for the frequency deviation a minimum value t _on-min , this is in Figure 3 at 100ns. Consequently The control unit can determine the permissible frequency deviation even without knowledge of possibly existing dimming levels or loads due to the value determined by the control algorithm for t _on and the resulting difference to the minimum value t _on-min .

However, it is also conceivable that when the nominal value of t _{on reaches} a predetermined minimum value, for example 250 ns, the "sweep mode" is suspended. This would mean that only in the first example would an unchanged "sweep mode" be applied, while the "sweep mode" would be exposed to the others.

The timing of the switch of the power factor correction circuit is modulated at the input-side concerns a DC voltage, which modulation may have a frequency deviation. This can be defined by limit values. The frequency deviation of the modulated clocking of the switch of the power factor correction circuit can also be adjusted load-dependent by changing the lower and / or the upper limit value.

Basically, therefore, according to the invention, a modulated clocking of the switch of the power factor correction circuit takes place at the input-side concerns a DC voltage, said modulation may have a frequency deviation. The frequency deviation of the modulated clocking of the switch of the power factor correction circuit can be set directly or indirectly load-dependent.

The frequency deviation can also be referred to as a modulation stroke, it identifies the possible frequency range between lowest and highest frequency. It should be noted that in a power factor correction circuit, the turn-on of the switch can change due to the control loop or otherwise specified by the control circuit and thus the frequency is changed as a dependent size of the switch-on time.

In principle, the "sweep mode" can also be achieved in that a modulation of the feedback signal (actual value signal for the output voltage) takes place, so that then due to this 'corruption' the PFC controller will undertake a modulation of the t _on time with the attempt to control the varying output voltage appearing constant. If the chosen solution is chosen, namely a calculation of the t _on -nominal value with subsequent modulation, it must be ensured that the modulation is so fast that the controller can not compensate. Thus, in fact, a constant t _on -nominal value with subsequent fast modulation can be assumed.

Alternatively, of course, the setpoint specification for the output voltage can be modulated. When modulating the setpoint specification or the actual value specification, it must be ensured that this is done in a frequency range that the control algorithm can compensate.

Other parameters of the "sweep mode" may also be set or changed, such as the rate of change of the on-time modulation (ie, the change in the extension values), thereby adjusting the frequency of sweeping one cycle of the sweep mode (the modulation frequency) can.

It should be noted that the method according to the invention for use in operating devices for lighting means in addition to the electronic ballasts (ECG) for gas discharge lamps described in the examples also in control gear for inorganic and organic light-emitting diodes (LED) is applicable.

Claims (15)

1. Method for operating an operating device for loads in the form of lighting means, in particular an electronic control gear (EVG) for gas discharge lamps, wherein

   • the operating device has a power factor correction circuit (PFC), actively clocked by means of a switch (S1), for reducing harmonics during the input current draw, and

   • the pulsing of the switch of the power factor correction circuit (PFC) is modulated when a DC voltage is present on the input side,

   characterized in that

   • the frequency deviation of this modulation is load-dependent.
2. Method according to claim 1, characterized in that the frequency deviation depends on a wattage of the connected lighting means and/or a current dimming level.
3. Method according to claim 1 or 2, characterized in that

   • the output voltage of the power factor correction circuit (PFC) is regulated and in that

   • the modulation of the frequency takes place by means of one or several of the following steps:

   - modulation of a target value of the output voltage

   - applying a modulation to a directly or indirectly determined actual value of the output voltage and/or

   - modulation of the control factor of the regulation.
4. Method according to one of the preceding claims, characterized in that a switch-on duration (t_ON) of the switch (S1) preferably is modulated gradually.
5. Method according to one of the preceding claims, characterized in that the pulsing of the switch (S1) of the power factor correction circuit is not modulated anymore upon reaching a pre-set lower threshold of a load.
6. Method according to one of the preceding claims, characterized in that

   • a nominal value (t_{ON_Regler}) for a switch-on duration (t_ON) of the switch (S1) is calculated first, wherein correspondingly a certain target bus voltage is being adjusted at an output of the power factor correction circuit (PFC), and

   • the modulation of the pulsing of the switch (S1) of the power factor correction circuit (PFC) then takes place.
7. Method according to one of the preceding claims, characterized in that the pulsing of the switch (S1) of the power factor correction circuit (PFC) is modulated normally, i.e. without a restriction, upon reaching a pre-set upper threshold of the load.
8. Method according to one of the preceding claims, characterized in that the modulation frequency of the power factor correction circuit (PFC) is chosen in such a way that in the output voltage of the power factor correction circuit (PFC) a non-regulated ripple materializes.
9. Method according to claim 8, characterized in that the ripple of the output voltage is compensated in a following lighting means control loop for stabilizing the power of a lighting means, wherein preferably the lighting means control loop compensates the ripple of the applied output voltage by varying the operating frequency of the lighting means.
10. Method according to one of the preceding claims, characterized in that the frequency deviation of the power factor correction circuit (PFC) is chosen dependent on a difference between the current nominal value of a switch-on time (t_{ON_Regler}) and a lower limiting value (t_on-min).
11. Method according to one of the preceding claims, characterized by automatically switching over to the modulation of the pulsing of the switch (S1) of the power factor correction circuit (PFC) as soon as the operating device identifies the presence of DC voltage.
12. Method according to one of the preceding claims, characterized in that the power factor correction circuit (PFC) is operated in the so-called marginal mode.
13. Operating device in the form of lighting means, in particular electronic control gear (EVG) for gas discharge lamps, wherein the operating device has a power factor correction circuit (PFC) for reducing harmonics during the input current draw, characterized in that the operating device is designed

    • when a DC voltage is present on the input side, to modulate a pulsing of a switch (S1) of the power factor correction circuit (PFC) between two limiting values, a lower and an upper limiting value, so that the limiting values define a frequency deviation, and

    • to adjust the frequency deviation by changing the lower and/or upper limiting value in a load-dependent manner.
14. Operating device according to claim 13, characterized in that the operating device is designed

    • to choose the modulation frequency of the power factor correction circuit (PFC) in such a way that a corresponding ripple materializes in an output voltage of the power factor correction circuit (PFC).
15. Operating device according to claim 13 or 14, characterized in that the operating device is designed to choose the modulation frequency of the power factor correction circuit (PFC) in a range between 50 Hz and 500 Hz, preferably 90 Hz to 400.

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