EP1901592B1 - Electronic ballast with asymmetrical inverter actuation - Google Patents

Abstract

The method involves adjusting power input of an electric discharge lamp (LA) by presetting duty cycles of two digital control signals. Semiconductor circuit breakers of a direct current to alternating current (DC/AC) converter are controlled by the control signals, where the DC/AC converter supplies a discharge lamp with AC. The circuit breakers are connected to half-bridges in series, and the duty cycles of the control signals are time variantly adjustable. An independent claim is also included for an electronic ballast comprising a converter.

Description

The present invention relates to an electronic ballast (EBG) for AC operation of at least one discharge lamp.

It is known from the prior art that an asymmetrical control of the two power transistors of the inverter half-bridge of an electronic lamp ballast serving for alternating current operation, usually symmetrically (ie with a rectangular signal with a duty cycle of 50%) required for reversing the lamp current, contributes to making the occurrence more continuous Layers in the filling gas and thus prevent flickering of the lamp. For this purpose, control signals with asymmetric, i. from the value of 50% different duty cycles in a value range between 0% and 100% applied.

However, this has the disadvantages that DC components are applied to the lamp, which lead to disruptions of the operation, such as due to a migration of ionized metal or gas atoms in the direction of one of the two electrodes.

EP 1 269 801 B1 relates to a ballast and associated method for dimming a luminaire provided with a fluorescent lamp, wherein the ballast automatically recognizes certain types of lamps by detecting the lamp voltage and sets those operating data, the currently located in the lamp lamp type are assigned according to an operating data register.

In EP 1 095 543 B1 is an electronic lamp ballast for at least one gas discharge lamp with a powered by a DC voltage source, consisting of two mutually connected in series power transistors inverter half bridge disclosed. In this case, an asymmetrical operating mode is provided, which is dependent on the respectively set dimming level, in which the duty cycles of the control signals for the first and second power switches of the inverter half bridge varies in a periodic sequence via a control circuit and set to values deviating from 50% of a value range between 0% and 100% become.

WO 99/34650 describes an electronic ballast for AC operation of at least one gas discharge lamp, which has a powered with a rectified supply voltage inverter half-bridge and a control circuit for controlling the operation of the gas discharge lamp. The two semiconductor power switches of the inverter half bridge are controlled by the control circuit so that the output side of the inverter half bridge an alternating voltage of variable frequency is generated.

EP 0 390 285 B1 discloses a dimmable electronic ballast for AC operation of a mercury vapor discharge lamp having an integrated controllable DC voltage source for stabilizing the Walmverhaltens the lamp, especially at low Dimmleveln has. In this case, the DC voltage source supplies a DC offset which is superimposed on the AC supply voltage of the lamp and whose voltage level is regulated in such a way that the DC voltage source is controlled by the DC voltage source the luminous flux generated by the lamp during dimming operation remains constant.

In US 4,251,752 an electronic ballast for AC operation of at least one fluorescent lamp is described, which has an active power factor correction circuit in the form of acting as a harmonic filter DC boost converter to minimize disturbing mains harmonics and to increase the power factor by compensating the recorded by the lamp reactive power.

OBJECT OF THE PRESENT INVENTION

Starting from the above-mentioned prior art, the present invention is dedicated to the task of making the control of a lamp more flexible in order to better adapt it to current operating conditions.

This object is achieved by the features of the independent claims. Advantageous embodiments which further develop the idea of the invention are defined in the dependent claims.

The document G.-C. Hsieh, J.-F. Yan, "Group-Asymmetrical PWM Controller for Dimmable Fluorescent Lamp Ballast Without Striation and Thermostat Effect", 32nd Annual Conference of IEEE Industrial Electronics Society, IECON 2005. Raleigh, NC, USA, 6-10 November 2005; pp. 792-797 discloses the operation of at least one lamp according to the preamble of the independent claims.

SUMMARY OF THE PRESENT INVENTION

The present invention discloses an electronic lamp ballast for AC operation of at least one lamp. The two semiconductor power switches of the inverter half-bridge are controlled by control signals whose duty cycles can be set time-variably adjustable and, for example, as a function of detected operating parameters of the lamp. The two inverter switches are driven asymmetrically, the asymmetry of the control by specifying a control signal with a time-varying duty cycle can be defined from a value range between 0% and 100%.

In addition, the present invention relates to a method for AC operation of at least one lamp, wherein asymmetric duty cycles of control signals of a predetermined clock frequency is adjustable, which for driving two connected to a half-bridge in series, separately controllable semiconductor power switch one for supplying the lamp with AC used inverter. In this case, the asymmetrical duty cycles of the two inverter control signals according to the invention, in particular with respect to their asymmetry adjustable in time or adjustable depending on at least one feedback signal.

The asymmetrical duty cycles of the two inverter control signals can be varied in a regular clock cycle by pulse width modulation of the inverter control signals.

Alternatively, the asymmetrical duty cycles of the two inverter control signals in dependence on detected operating parameters (eg lamp current, lamp voltage or respectively the DC portion thereof, lamp resistance, ...), the lamp operating state (eg., Before / after ignition) or environmental parameters (Temperature, etc.) of the lamp operation are adaptively changed by pulse width modulation of the inverter control signals.

In the latter case, values of two asymmetrical duty cycles are initially specified and the pulse widths of the two control signals serving to drive the inverter are set in accordance with the values predetermined for the two duty cycles. After that, one is made by the Pulse width determinations caused DC component of an effective active power consumption of the lamp representing operating parameter detected. The relevant operating parameter is then forwarded to a control and control module, whereupon the values prescribed for the two duty cycles are readjusted depending on the detected operating parameter, so that the aforementioned DC signal component, averaged over the number of the aforementioned clock cycles, is substantially equal to zero.

According to the invention, the operating parameters which may be considered as the control variable may be lamp and / or environmental parameters, for example the effective or rectified value, the DC and / or alternating signal component of the lamp firing voltage U _LA or the effective or rectified value DC and / or alternating signal component of the current flowing through the lamp current I _LA , to the lamp in the firing or dimming operation supplied effective active power P _{w, eff} to the calculated lamp impedance Z _LA at a positive or negative half-wave of the lamp current or a Detector output signal for detecting a flickering of the lamp, an unreasonably high temperature rise or a stability affecting the stability of the control disturbance (eg, an interference voltage spike occurred due to an overload). The control of the duty ratio according to the invention can also be carried out depending on the operating mode of the power supply (normal operation or emergency power operation). In addition, it can be provided according to the invention that the precise signal curve of the lamp current I _LA detected, sampled, quantized and evaluated in digitized form to control the recorded by the lamp effective effective power, since this on the performance of the lamp both in Brennals and in dimming a has decisive influence.

According to a variant of the present invention, the regulation of the effective active power picked up by the lamp can take place such that, when the lamp current is applied with a DC component, the latter, averaged over a predefinable period of time, is substantially equal to zero. The generation of this DC component takes place with the aid of an asymmetric half-bridge control via a digital control signal of a preferably high clock rate and a correspondingly small sampling interval to keep the DC component correspondingly low, since in some lamp types already a relatively small DC component with respect to the Walmverhalten the lamp critical is.

The duty cycles of the two inverter control signals can according to the invention either follow a pulse width modulation of the inverter control signals in each case predetermined, dependent on the time function or briefly assume random values from a value of 50% excluding value range between 0% and 100%. A momentarily caused by these random duty cycles change in the effective effective power absorbed by the lamp is then compensated again after the lapse of a predetermined number of clock cycles by appropriately modified duty cycles are set.

It can be provided according to the invention that the duty cycles of the two inverter control signals are either set independently of each other or are correlated to each other, so depend on each other via a functional relationship.

The duty cycles can be adjusted depending on a dimming level of the lamp.

In addition, the present invention relates to a control module for implementing the method described above.

The present invention further relates to an electronic ballast for AC operation of at least one discharge lamp, which has a supplied with a DC voltage to supply the lamp with AC serving inverter in the form of two connected to a half-bridge in series, separately controllable semiconductor power switch and a control module for the separate control of the two semiconductor power switches with two digital inverter control signals of a predetermined clock frequency, wherein the duty cycles of these inverter control signals have asymmetrical values. In order to be able to control the effective active power absorbed by the discharge lamp, the asymmetrical duty cycles of the two inverter control signals are adjustable in accordance with the invention in a time-variable manner.

The aforesaid electronic ballast can have a power factor correction circuit connected upstream of the inverter half bridge and connected to its supply voltage input with an integrated semiconductor power switch controlled by a pulse width modulated power factor control signal to compensate for the reactive power consumed by the discharge lamp in the firing or dimming operation. In order to be able to control the power factor of the power consumed by the lamp, it is provided according to the invention that the power factor control signal can be adaptively changed by pulse width modulation as a function of detected operating parameters of the lamp operation.

BRIEF DESCRIPTION OF THE DRAWINGS

Fig. 1

zeigt ein Blockschaltbild eines elektronischen Lampenvorschaltgeräts (EVG),

Fig. 2

zeigt eine schaltungstechnische Realisierung des in Fig. 1 dargestellten elektronischen Lampenvorschaltgeräts (EVG) mit einer Leistungsfaktorkorrekturschaltung nach dem Stand der Technik,

Fig. 3a+b

zeigen zwei Spannungs-Zeit-Diagramme, in denen die zeitlichen Verläufe zweier während zwei aufeinanderfolgender Taktzyklen erzeugter pulsbreitenmodulierter Steuersignale zur Ansteuerung der beiden Leistungstransistoren einer Wechselrichterhalbbrücke dargestellt sind,

Fig. 3c

zeigt ein Spannungs-Zeit-Diagramm, in dem der zeitliche Verlauf eines während der zwei aufeinanderfolgenden Taktzyklen erzeugten pulsbreitenmodulierten Steuersignals dargestellt ist, welches zur Ansteuerung des Leistungsschalters in der aktiven Leistungsfaktorkorrekturschaltung verwendet wird,

Fig. 3d

zeigt ein Spannungs-Zeit-Diagramm, in dem der näherungsweise sinusförmige, entlang der Zeitachse verschobene Verlauf der Lampenbrennspannung bei Variation der Tastverhältnisse der beiden pulsbreitenmodulierten Steuersignale zur Steuerung der beiden zum Betrieb der Wechselrichterhalbbrücke benötigten Leistungstransistoren dargestellt ist, und.

Fig. 4

Zeigt ein Beispiel für eine zeitliche Änderung des Tastverhältnises ("Duty Cycle")

Other features and advantages of the present invention will now be elucidated with reference to the accompanying drawings and detailed description of an embodiment of the invention.

Fig. 1

shows a block diagram of an electronic ballast (EVG),

Fig. 2

shows a circuit realization of the in Fig. 1 illustrated electronic ballast (EVG) with a power factor correction circuit according to the prior art,

Fig. 3a + b

show two voltage-time diagrams in which the time profiles of two pulse width modulated control signals generated during two consecutive clock cycles for driving the two power transistors of an inverter half-bridge are shown,

Fig. 3c

shows a voltage-time diagram, which shows the time profile of a generated during the two consecutive clock cycles pulse width modulated control signal, which is used to drive the circuit breaker in the active power factor correction circuit,

Fig. 3d

shows a voltage-time diagram in which the approximately sinusoidal, along the time axis shifted course of the lamp burning voltage with variation of the duty cycles of the two pulse width modulated Control signals for controlling the two required for operating the inverter half-bridge power transistors is shown, and.

Fig. 4

Shows an example of a temporal change of the duty cycle ("Duty Cycle")

DETAILED DESCRIPTION OF THE INVENTION

In the following paragraphs, the embodiments of the present invention will be described in detail with reference to the accompanying drawings.

In Fig. 1 1 is a block diagram of an electronic ballast (EVG) according to the present invention, which is used to control the operation of an AC-driven discharge lamp driven by the ECG.

A pulse width modulator with a downstream driver, referred to as a "PWM module", serves for controlling an AC / DC converter which is used for the AC supply of the lamp LA and is supplied with a DC voltage U _v . With the aid of the pulse width modulator PWM the pulse widths t _{a 1} and t _{a 2,} and thus the duty ratios d ₁ and d ₂ of two control voltages U _{G 1} and U _{G 2} varies across the control terminals of the two switches of the half-bridge Wechelrichters. The control of the pulse width modulator PWM takes place as a function of two digital manipulated variables, which are supplied by two data outputs of a designated as "R & S module" digital control and control device. This Measurement signals concerning abbeer operating parameters are supplied as controlled variables.

These measurement signals may be, for example, two measurement voltages U _{M 1} and U _{M 2} , which are proportional to one of the filament currents I _{W 1} and I _{W 2} flowing through the two lamp electrodes (W ₁ and W _2, respectively).

The control and regulating device regulates the two aforementioned manipulated variables in this case depending on the measured signals detected on the detected measurement signals as well as on a reference variable predeterminable via a setpoint input for the radiation power to be generated in the firing or dimming operation by the discharge lamp LA.

Upon detection of a control deviation between a tapped via the load circuit LK of the electronic lamp ballast measuring voltage U _{M 1} and U _{M 2} and the aforementioned reference value Φ _LA, representing reference voltage U _ref changed the control and control device, the frequency and / or duty cycle d ₁ or d ₂ of the required for driving the inverter half-bridge DC / AC control voltages U _{G 1} and U _{G 2} so that this setpoint is achieved at least approximately.

In order to stabilize the reactive power consumed by the power factor correction circuit PFC in order to reduce the reactive power consumed by the lamp to a value close to unity, a further power control circuit LRK ₃ , whose control path is formed by the power factor correction circuit PFC, is used according to the invention as a "power factor control circuit" becomes. At this time, a semiconductor power switch incorporated in the power factor correction circuit PFC is included a pulse width modulated control voltage U _{G 3 is} driven, which is also supplied by the aforementioned pulse width modulator with downstream driver IC. In this case, the pulse width _modulator PWM ensures a variation of the pulse width t _in3 and thus the duty cycle d ₃ of the control voltage U _{G 3} required for driving this semiconductor power _switch, generated by the driver IC. The control of the pulse width modulator PWM is carried out according to the invention in dependence on a digital manipulated variable, which is supplied by an additional data output of the digital control and regulating device.

The control and regulating device regulates the aforementioned manipulated variable dependent on a controlled variable, which may be, for example, the supply voltage U _{V of} the inverter DC / AC provided at the output of the power factor correction circuit PFC or the output current of the power factor correction circuit PFC, as well as dependent on the reference variable Φ _{LA, which can be} specified at the aforementioned setpoint input _{, is intended} for the radiation power Φ _LA to be generated in the firing or dimming operation by the discharge lamp _LA .

Upon detection of a control deviation between the control variable tapped via the output of the power factor correction circuit PFC and the reference voltage U _ref representing the aforementioned reference variable φ _LA, the control and control device changes the duty ratio d ₃ required for driving the semiconductor power switch integrated in the power factor correction circuit PFC Control voltages U _{G 3} so that this setpoint is achieved at least approximately.

As in Fig. 1 1, the electronic ballast according to the invention is connected to an AC network via a switched-mode power supply OWF serving for radio interference suppression and filtering of mains harmonics. The filtered output signal of the harmonic filter OWF is fed to a rectifier circuit AC / DC, which converts the AC line voltage into a rectified DC link voltage and this via the aforementioned power factor correction circuit PFC, which for harmonic filtering and smoothing the voltage supplied by the rectifier circuit AC / DC and for compensation of the Lamp used in the burning or dimming operation reactive power, the inverter circuit DC / AC as supply voltage U _V supplies. The inverter circuit DC / AC serves as a controllable AC voltage source, which converts the rectified and with the help of a charging capacitor C smoothed DC link voltage in a high frequency AC voltage adjustable frequency, which is used to operate the discharge lamp LA.

The output of the inverter DC / AC is connected to a load circuit LK, via which the discharge lamp LA operated by the ECG is driven. The load circuit LK comprises a resonant circuit SRK, via which the high-frequency AC voltage at the output of the inverter circuit DC / AC of the discharge lamp LA is supplied.

In order to extend the service life of the lamp, the electronic ballast according to the invention can optionally also have a heating circuit HzK serving for preheating the two lamp electrodes W ₁ and W ₂ . This may for example comprise a consisting of a primary winding and two separate secondary windings heating transformer HzTr whose secondary windings L _{s 1} and L _{s 2} , as in Fig. 2 represented, for example, to the formed as helical lamp electrodes W ₁ and W _{2 of} the discharge lamp LA are connected in series.

The electronic ballast has a control module μC, which monitors various operating parameters of the electronic ballast and generates a control signal for the inverter DC / AC to adjust the frequency of the AC voltage generated by this or the pulse width of its control signals.

Thus, the control module .mu.C example, the lamp operating voltage U _LA, the pre-heating voltage U _H, the lamp operating current I _LA, the impedance monitor Z _LK of the load circuit LK and / or the functionality provided by the rectifier circuit AC / DC rectified intermediate circuit voltage U _V and or the output frequency of the inverter Set the pulse widths of its control signals such that the respectively detected operating parameters do not exceed or fall short of a predetermined limit value, that the power taken from the rectifier AC / DC is as constant as possible and that a lamp current I _LA that is as constant as possible flows through the discharge lamp _LA at the lamp LA as constant as possible lamp voltage U _LA is applied.

The electronic ballast may have a number of fault detectors that monitor certain operating parameters of the ECG, in particular of the load circuit LK, and upon detection of a specific error condition, a corresponding control of the inverter DC / AC cause, for. to prevent the occurrence of an overvoltage on the discharge lamp LA.

The control module .mu.C of the electronic ballast serves to control a pulse width modulator downstream driver IC, which generates the control signals for the two inverter switches T ₁ and T ₂ described above, wherein the duty cycles of the control signals and in particular their asymmetry can be set time-varying.

The change in the duty cycle is slow compared to the frequency of the inverter.

The temporal change can be sudden ("hard commutation") or gradual, i. in the manner of a ramp ("soft commutation").

Thus, the control signals for the two inverter switches in the firing and dimming operation of the discharge lamp LA are preferably output with an asymmetrical duty cycle, whereby a observable especially at low Dimmleveln Walmen the lamp LA is reduced, while in the preheat and ignition operation of the lamp LA preferably with symmetrical Control signals is worked.

A possible circuit realization of the in Fig. 1 sketched electronic lamp ballast with a given in the form of a half-bridge circuit, consisting of two mutually connected in series controllable semiconductor power switches inverter circuit DC / AC, the circuit breakers T ₁ and T ₂ with two pulse width modulated control signals U _{G 1} and U _{G 2} via a as "Driver IC" designated bridge driver can be controlled, is in Fig. 2 shown. The series connection of the two inverter switches T ₁ and T ₂ is connected between the voltage-carrying output line of the power factor correction circuit PFC and the ground node of the ECG. As the supply voltage U _{v of} the inverter half bridge DC / AC via the charging capacitor C a smoothed, rectified mains AC voltage U _e1 supplied.

The output port of the inverter half-bridge DC / AC formed from the connection node between the two controllable semiconductor power switches T ₁ or T ₂ and the ground node is connected in this embodiment via an integrated in the load circuit LK, a resonant inductor L _res and a series-connected thereto Resonant capacitance C _res existing series resonant circuit with one (W ₂ ) of the two designed as spirals lamp electrodes W ₁ and W ₂ connected. The other lamp electrode (W ₁ ) is connected via a coupling capacitor C _K to the end of the resonant inductance L _res facing away from the output of the inverter half-bridge DC / AC, the series circuit consisting of the coupling capacitor C _K and the load impedance Z _LA consisting of the discharge lamp LA resonating capacitance C _{res of} the series resonant circuit SRK is connected in parallel.

In this exemplary embodiment, the supply voltage U _{v of} the inverter half-bridge DC / AC is converted into a high-frequency alternating voltage by the inverter DC / AC to the series resonant circuit SRK by a switching on and off of the two electronically controllable power switches T ₁ and T ₂ in alternating sequence is delivered. Its resonant capacitance C _res has the function of a firing capacitor. To ignite the lamp LA, the frequency of the AC voltage supplied by the inverter DC / AC is shifted in the vicinity of the resonance frequency f ₀ = (2π) ^-1 · ( L _res C _res ) ^{-1/2 of} the series resonant circuit SRK. In this case, a voltage overshoot occurs in the voltage applied to the ignition capacitor C _res , by which the discharge lamp LA is ignited.

In addition, the power factor correction circuit PFC serving to prevent a load of the power supply network with reactive power is in the in Fig. 2 sketched embodiment of the electronic ballast according to the invention as realized by a DC boost converter (English: "Boost Converter" or "step-up converter") formed active power factor correction circuit according to the prior art. The DC boost converter consists of a power rectifier AC / DC, one connected to the voltage-carrying output, acting as a current-limiting storage inductor inductance L , a series-connected to this inductance L diode D and an output side, to the diode D in series charge capacitor C. to increase _from the output voltage U obtained. The inductance L is connected by a parallel to the series circuit of diode D and the charging capacitor C , via the aforementioned pulse width modulator PWM with downstream driver IC driven semiconductor power switch, for example, as a gate turn-off thyristor or, as in Fig. 2 outlined as self-locking n-channel MOS field effect transistor T ₃ can be realized, connected to ground.

In an initial application of a DC input voltage U _a of the charging capacitor C via the diode D is charged to the voltage U _c, where it is the output voltage U _out of the power factor correction circuit PFC. In steady state operation of the semiconductor power switch S ₃ then for the duration of an on time t _{a 3} = d ₃ / f ₃ = d ₃ · T _3, via a set of a pulse width modulator PWM duty ratio d ₃ and the clock rate f _{a 3} = 1 / T _{3 of} a control signal used for driving the semiconductor power switch S ₃ can be predetermined, switched to pass mode, so that from the diode D and connected in series Parallel circuit of charging capacitor C and load impedance Z _L existing load circuit LK for the duration is short-circuited by _a t. ₃ The rectified input voltage U drops on the inductance L _a from, and the current flowing through the inductor L input current I _a = I _L = (1 / j ω L) · U _L and thus the energy stored in the inductance L, magnetic energy W _L = ½ L · | I _L | ² rise. The blocking voltage U _D = -U _{L is applied} to the diode D during this period.

Upon reaching a predetermined current maximum value of the semiconductor power switch S ₃ for the duration of a by the expression: t ₃ = T ₃ - T _{a 3} = T ₃ · (1 - d ₃₎ given off time t _{of 3} switched to cut operation, so that the ground referenced voltage at the node K of inductance L and diode D is rapidly increased until it exceeds the time stored in the charging capacitor C voltage U _C, while the diode D opens. The coil current I _L then commutates to the diode D and continues to flow through the load circuit, wherein the magnetic field of the inductance L collapses and the charging capacitor C is further charged. Where U is _D = 0, and the output voltage U _out is recharging of the charging capacitor C for a short time to the value U _out = U _a - jω L · I _a> U _a increases, whereby the output current I _out to I _out = I _in = (U _a - U _out) / jω L is reduced. The time average of the voltage drop U _L = jω L · I _L at the inductance L is zero. The power factor correction circuit PFC thus provides at its output port _from a defined DC voltage U, the amount of which is greater than the amount-peak value of the instantaneous AC voltage U _a 'at the gate of the rectifier AC / DC. Since the circuit is in itself neither short-circuit nor idle proof, it must either be adapted exactly to the load impedance Z _L of the load circuit LK, or the semiconductor power switch T ₃ must, as is the case, be controlled via a control loop in order to prevent an overvoltage or an overcurrent at the output of the power factor correction circuit PFC.

In Fig. 3a and 3b two voltage-time diagrams are shown in which the time profiles of the two generated during two consecutive clock cycles, applied to the control electrodes of the two inverter power switches T ₁ and T ₂ pulse width modulated control voltages U _{G 1} and U _{G 2} exemplified in the form of two clocked Rectangular voltages are shown. "High" and "low" levels of these two digital control voltages alternately alternate at regular, predetermined by the clock frequency of the inverter sequence, the voltage U _G1 within the off time of U _{G 2} their "high" level and the voltage U _{G 2} within the off time of U _{G 1} assumes its "high" level. In this way, the two power transistors T ₁ and T _{2 of} the inverter half-bridge DC / AC are controlled so that T ₁ blocks while T ₂ is conducting and vice versa.

As can be seen from the bi-directional arrows drawn boldly in these two diagrams, both the falling clock edges of the rectangular control voltage U _{G 1} and the rising clock edges of the rectangular control voltage U _{G 2 can be} within the clock durations T ₁ or T ₁ prescribed by the respective clock cycle of these signals T be moved in both directions along the time axis. ₂ so that the _out by the respective switch-on times t _{a 1} and t _{a 2,} and the clock periods T ₁ = t _{a 1} + t ₁ and t ₂ = t _{a 2} + t _{2 of} the two control voltages U _{G 1} and U _{G 2} given duty cycles d ₁ = t _{a 1} / T ₁ = 1 - t _{from 1} / T ₁ or d ₂ = t _{a 2} / T ₂ = 1 - t _{from 2} / T ₂ in each clock cycle different values within a value of 50% exclude value range between 0% and 100%.

According to the invention can also be provided, the rising clock edges of the rectangular control voltage U _{G 1} and the falling clock edges of the rectangular control voltage U _{G 2} or both the rising and falling clock edges of the two control voltages within the limits of the respective clock cycle of these signals clock periods T ₁ or T ₂ to move along the time axis, so that d ₁ and d ₂ assume values from the aforementioned range of values. The setting of the duty cycles of U _{G 1} and U _{G 2 to} be carried out in each cycle or after a predefinable number of cycles can be carried out independently of each other or coupled to each other, in the latter case d ₂ as a function of d ₁ or to the same value as d ₁ can be set.

According to the invention, the magnitude and direction of the changes of d ₁ and d ₂ are controlled in such a way that a DC component of the lamp current I _LA generated by the asymmetrical half-bridge control is averaged substantially equal to zero over a predeterminable number of clock cycles.

Fig. 3c shows a voltage-time diagram in which the time course of a generated during these two consecutive clock cycles pulse width modulated control voltage U _{G 3 is} shown for driving the control electrode of the semiconductor integrated circuit breaker T ₃ in the realized as a DC boost converter active power factor correction circuit PFC is used. In Fig. 3c This control voltage is shown as a square wave voltage with a duty cycle of 50%. However, it can also be provided according to the invention that the falling and / or rising clock edges of the rectangular control voltage U _{G 3} can be displaced within the limits of the respective clock cycle of this signal clock period T ₃ along the time axis, so that by the on-time t _{a 3} and the clock period T ₃ = t _{A 3} + t ₃ the control voltage U _{G 3} given duty ratio d ₃ = t _{a 3} / T ₃ = 1 - t ₃ / T ₃ in each clock cycle or after a predetermined number of clocks different values within a value of 50% negative range of values between 0% and 100% can accept.

Fig. 3d shows a voltage-time diagram in which the approximately sinusoidal, shifted along the time axis curve of the lamp voltage U _LA with variation of the duty cycles d ₁ and / or d _{2 of} the two pulse width modulated control signals U _{G 1} and U _{G 2} for controlling the two Operation of the inverter half bridge DC / AC required semiconductor power switch T ₁ and T _{2 is} shown. How out Fig. 3d can be seen, the magnitude of the shift of U _{L A} along the time axis is proportional to the sum | Δ d ₁ | + | Δ d ₂ | the changes in the two duty cycles d ₁ and d ₂ made in the immediately preceding clock cycle.

As in FIG. 4 As can be seen, the duty cycle is preferably 50%, as averaged over time. Between a first, almost stationary duty cycle of more than 50%, the duty cycle can then drop suddenly or, as shown, gradually in the form of a ramp to less than 50% in order to rise again from above this quasi-stationary value to more than 50%.

Claims (24)

1. Method for operating at least one lamp (LA), whose power consumption can be adjusted by inputting the duty cycles (d ₁ and d ₂) of two digital control signals ( U _G1 and U _G2), which are used for actuating two semiconductor power switches (T ₁ and T ₂) of an inverter (DC/AC) used for supplying alternating current to the lamp (LA), said semiconductor power switches being connected in series to form a half bridge and being capable of being controlled separately from one another, the duty cycles (d ₁ and d ₂) of these control signals having asymmetrical values, characterized in that the duty cycles (d ₁ and d ₂) of the two inverter control signals ( U _G1 and U _G2) can be regulated in terms of their asymmetry depending on a measured operational parameter fed back.
2. Method according to Claim 1, in which the duty cycles are controlled in such a way that a DC component of the lamp current ( I _LA ), which DC component is generated by the asymmetrical inverter actuation, when averaged over a predeterminable number of clock cycles, is substantially equal to zero.
3. Method according to Claim 1 or 2, characterized in that the preferably asymmetrical duty cycles (d ₁ and d ₂) of the two inverter control signals ( U _G1 and U _G2 ) in a regulator clock cycle are altered by pulse width modulation of the inverter control signals ( U _G1 and U _G2 ).
4. Method according to Claim 3, characterized in that the preferably asymmetrical duty cycles (d ₁ and d ₂) of the two pulse-width-modulated inverter control signals ( U _G1 and U _G2 ) are adjusted to values from a data set comprising a number of values which are repeated in periodical sequence from a value range of between 0% and 100%, excluding the value 50%.
5. Method according to Claim 3, characterized in that the preferably asymmetrical duty cycles (d ₁ and d ₂) of the two inverter control signals (U _G1 and U _G2 ) are altered adaptively depending on operational parameters of the lamp operation by means of pulse width modulation of the inverter control signals ( U _G1 and U _G2 ).
6. Method according to Claim 5, in which the duty cycles are altered adaptively via at least one control loop (LRK₁ and LRK₂).
7. Method according to Claim 5, in which the duty cycles are altered via at least one control loop and by virtue of setting a dead time in a driver circuit of the inverter.
8. Method according to Claim 5, characterized by the following steps:

   - inputting values of two asymmetrical duty cycles (d ₁ and d ₂) and fixing the pulse width of the two control signals ( U _G1 and U _G2 ) used for the actuation of the inverter (DC/AC), and

   - detecting a DC signal component of an operational parameter, which DC signal component is caused by the operations which have been carried out for fixing the pulse width,

   - wherein the asymmetry of the two duty cycles (d ₁ and d₂) is adjusted depending on the detected operational parameter in such a way that the abovementioned DC signal component, when averaged over time, is substantially equal to zero.
9. Method according to one of Claims 5 to 8, characterized in that the operational parameters of the lamp operation are the rms value or rectified mean value, the DC and/or AC signal component of the lamp running voltage ( U _LA ) or the rms value or rectified mean value, the DC and/or AC signal component of the current (I _LA) flowing through the lamp (LA), the rms active power (P_a,rms) supplied to the lamp (LA) during running or dimming operation, the impedance ( Z _LA ) of the lamp in the positive or negative half cycle of the lamp current (I _LA) and/or a detector output signal for detecting flicker of the lamp (LA), an unreasonably high temperature rise or an overload voltage impairing the stability of the closed-loop control.
10. Method according to one of the preceding claims, characterized in that the duty cycles (d ₁ and d ₂) of the two inverter control signals ( U _G1 and U _G2 ) follow a time-dependent function profile, which is predetermined in each case by pulse width modulation of the inverter control signals ( U _G1 and U _G2 ).
11. Method according to Claim 10, in which a gradual function profile is predetermined for the transition from a first, for example steady-state duty cycle to a second, for example steady-state duty cycle.
12. Method according to one of the preceding claims, characterized in that the duty cycles (d ₁ and d ₂) of the two inverter control signals ( U _G1 and U _G2 ) assume, for a short period of time, random values from a value range of between 0% and 100%, excluding the value 50%, and a change in the rms active power (P_a,rms ) consumed by the lamp (LA), which change is caused temporarily by these random duty cycles (d ₁ and d ₂), is compensated for again once a predeterminable number of clock cycles has elapsed by virtue of correspondingly modified duty cycles (d ₁ and d ₂) being set.
13. Method according to one of the preceding claims, characterized in that the duty cycles (d ₁ and d ₂) of the two pulse-width-modulated inverter control signals (U _G1 and U _G2) are adjusted independently of one another.
14. Method according to one of the preceding claims, characterized in that the duty cycles (d ₁ and d ₂) of the two pulse-width-modulated inverter control signals ( U _G1 and U _G2) are dependent on one another by virtue of a functional relationship.
15. Method according to one of the preceding claims, characterized in that the duty cycles (d ₁ and d ₂) of the two inverter control signals ( U _G1 and U _G2) can be adjusted depending on the dimming level of the lamp.
16. Control module for implementing a method according to one of the preceding claims.
17. Electronic ballast for a discharge lamp (LA), having

    - an inverter (DC/AC) in the form of two switches (T₁ and T₂) which are connected in series to form a half bridge, said inverter being used to supply alternating current to the lamp (LA), and

    - a control module (µC) for actuating the two switches (T₁ and T₂) with two inverter control signals ( U _G1 and U _G2 ), the duty cycles (d ₁ and d ₂) of these inverter control signals having asymmetric values,

    characterized in that the duty cycles (d ₁ and d ₂) of the two inverter control signals ( U _G1 and U _G2 ) can be regulated in terms of their asymmetry depending on a measured operational parameter fed back.
18. Electronic ballast according to Claim 17, in which the duty cycles can be controlled in such a way that a DC component of the lamp current ( I _LA ), which DC component is generated by the asymmetric inverter actuation, when averaged over a predeterminable number of clock cycles, is substantially equal to zero.
19. Electronic ballast according to Claim 17, characterized in that the preferably asymmetrical duty cycles (d ₁ and d ₂) of the two inverter control signals ( U _G1 and U _G2 ) in a regular clock cycle can be altered by pulse width modulation of the inverter control signals ( U _G1 and U _G2 ).
20. Electronic ballast according to Claim 19, characterized in that the preferably asymmetrical duty cycles (d ₁ and d ₂) of the inverter control signals ( U _G1 and U _G2 ) can be adjusted to values from a stored data set comprising a number of values which are repeated in periodical sequence from a value range of between 0% and 100%, excluding the value 50%.
21. Electronic ballast according to Claim 17, characterized in that the duty cycles (d ₁ and d ₂) of the two inverter control signals ( U _G1 and U _G2 ) can be altered adaptively via two separate, closed control loops (LRK₁ and LRK₂) depending on operational parameters of the lamp operation by means of pulse width modulation of the inverter control signals ( U _G1 and U _G2 ).
22. Electronic ballast according to one of Claims 17 to 21, having a power factor correction circuit (PFC), which is connected upstream of the inverter half bridge (DC/AC) and is connected to the supply voltage input thereof and has an integrated semiconductor power switch (T₃), which is actuated via a pulse-width-modulated power factor control signal ( U _G3 ), for compensating for the reactive power (P_r ) consumed by the discharge lamp (LA) during running or dimming operation, characterized in that the power factor control signal ( U _G3 ) can be altered adaptively depending on detected operational parameters of the lamp operation by means of pulse width modulation.
23. Electronic ballast according to either of Claims 21 and 22, characterized in that the operational parameters of the lamp operation are the rms value or rectified mean value, the DC and/or AC signal component of the lamp running voltage ( U _LA ) or the rms value or rectified mean value, the DC and/or AC signal component of the current ( I _LA ) flowing through the lamp (LA), the rms active power (P_a,rms ) supplied to the lamp (LA) during running or dimming operation, the impedance ( Z _LA ) of the lamp in the positive or negative half cycle of the lamp current ( I _LA ) or a detector output signal for detecting flicker of the lamp (LA), an unreasonably high temperature rise or an overload voltage impairing the stability of the closed-loop control.
24. Electronic ballast according to one of Claims 18 to 22, in which the control module adjusts the duty cycles (d ₁ and d ₂) of the two inverter control signals ( U _G1 and U _G2 ) depending on the dimming level of the lamp.

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