DE4006251C1 - Recognising periodicity in pseudo-stochastic sequence of bits - using comparison registers charged with different cycle and generating alarm if last bits of series correspond - Google Patents

Abstract

A certain length of S bits of the sequence under examination is passed to N registers for comparison and each separate register is loaded with a block of these bits cyclically taken from this pseudostochastic sequence. The duration of this cycle varies from register to register. The contents of a register are compared continuously with the last S bits taken from the sequence and, when any agreement appears, an indication is given of the high probability of a periodicity. USE/ADVANTAGE - Quick and reliable method of recognising possible periodicity without undue cost in equipment. Suitable for communication systems, partic. in decoding. Increases cryptographic security.

Description

The invention relates to a method and a Circuit arrangement for recognizing periodicities in Pseudo random bit strings.

In encryption technology are common Pseudo random bit sequences with a long period length are required. The Period length should be long because the Encrypt used pseudorandom bit sequence within the encrypted document may not repeat if the Security of encryption will not be compromised should.

Now there are used in modern encryption devices Pseudorandom bit string generators in which the Period length of the generated bit sequence is not known. Man only knows that the statistical mean is very large and that the likelihood of occurring a short Period length is very small. But you can see the appearance a short period does not completely rule out what the Encryption would be compromised.

It is therefore desirable, for these reasons, that Key device to install a monitoring circuit, which at Detection of a periodicity in the generated Key bit sequence triggers an alarm and z. B. the other Transmission stops.

The invention was based on the object, a method and a Specify circuit arrangement of the type mentioned, the are able to easily in any eventual Recognize periodicities quickly and reliably.

This problem is solved by the characteristic features of claim 1 and 5. Advantageous refinements result themselves through the subclaims.

The invention has the advantages that with uncomplicated Average possible periodicities in pseudorandom bit sequences Detected and alarmed at the latest when the first repetition is made will.

The task and its solution according to the invention are as follows represented in more detail using the figures. It shows

Fig. 1 is a graph showing the form of a periodic bit sequence,

Fig. 2 shows an extended graphic representation of a periodic bit sequence and

Fig. 3 is a block diagram of the circuit arrangement according to the invention to solve the problem.

Fig. 1 illustrates a periodic bit sequence of the (unknown) Length P bit. The bit sequence starts at any point on the circle and begins to repeat by P bits. In this case, the solution to the problem would be very simple: it would only be necessary to save a piece of the bit sequence of length S bits right at the beginning and to continuously compare it with the bit sequence that was further generated. If there is an identity between the stored piece and a piece of the same length of the generated bit sequence, the period is considered recognized and the alarm is triggered. The number S should generally be chosen equal to or greater than the number of state variables in the pseudo random bit sequence generator used.

In practice, however, the pseudorandom bit sequence is generally structured as shown in FIG. 2. It begins with an aperiodic run of length V, and then ends in a period of length P at some point. Unfortunately, both the length V and the period P are unknown. If you take the comparison sample of the pseudorandom bit sequence too early, ie during the lead (or as above at the beginning), you will never discover the periodicity. However, if the comparison sample is taken too late, it can happen that the period up to its discovery (ie, until the alarm is triggered) has already run through several times and the cryptological security has been endangered. So the problem is finding the right time to take the comparison sequence. This would be easy if the length V of the lead were known, then the comparison sequence would have to be extracted once after the first V bits.

If only the period length P were known, all P + S Take bits from a new comparison sequence and would then the alarm at the latest when the period is run through a second time to get. However, since neither V nor P are known in the general case, proposed the following solution according to the invention:

There are N comparison registers of length S bits, whose Content constantly with the last S bits of the Pseudo random bit sequence is compared. Will one Agreement with the content of one of these N Comparison register determined, the alarm is triggered.  

The first comparison register takes a new sample of S bits in length from the pseudo random bit sequence for all n bits, the old content being overwritten (ie lost). The second compare register does the same every 2 _* n bits, the third every 2² _* n bits, the fourth every 2³ _* n bits, etc., and finally the N. comparison register every 2 ^(N-1) _* n bits.

This ensures that from the S. bit the Pseudorandom bit sequence every occurrence of a periodicity too with unknown values of V and P at the latest at the second Going through the period is detected and alarm is triggered, applies so long

P <n _* 2 ^(N-1) .

Since the longest period length P to be recognized does not increase needs to be the longest message to be encrypted, the above requirement can be met by appropriate Adhere to circuit implementation. The fact that the periodicity occurs only during the second Passing through the period is recognized and thus part of the Period repeated once is for most Applications tolerable without cryptographic security restrict the impermissible level.

Claims (6)

1. A method for recognizing and displaying periodicities in pseudo-random bit sequences, characterized in that
that N comparison registers of length S bits are provided,
that a bit block of length S is loaded cyclically into the individual comparison registers from the pseudo random bit sequence,
that this cycle is of different lengths for the individual comparison registers,
that the content of the individual comparison registers is compared in each case with the S last received bits of the pseudo random bit sequences and
that if a match occurs, it is indicated that there is a high probability of periodicity. 2. The method according to claim 1, characterized in that the cycles are distributed as follows:
The 1st comparison register is loaded every n bits,
the 2nd comparison register every 2 n bits, etc., and the Nth comparison register every 2 ^(N-1) _* n bits. 3. The method according to any one of the preceding claims, characterized characterized in that S is equal to or greater than the number of State variables in the to generate the Pseudorandom bit string used pseudorandom bit string Generator is selected. 4. The method according to any one of the preceding claims, characterized characterized in that with a recognized periodicity the Generation of the pseudorandom bit sequence is changed.   5. Circuit arrangement for performing the method according to one of claims 1 to 4, characterized in
that a further register of length S bit is provided, into which the quasi random bit sequence is entered, so that the last incoming S bits are always stored,
that N comparators are provided in which the content of the further register is compared bit by bit with the content of the individual N registers, and
that a control is provided by which the cyclic loading of the N individual registers takes place in parallel with the content of the further register. 6. Circuit arrangement according to claim 5, characterized characterized that the outputs of each comparator combined into an alarm line via an OR gate are.