DE2330263A1 - Transmission method using amplitude selection - involves multiplication of several signals in transmitter by different factors - Google Patents

Abstract

The factors are b0, b1, b2....bi-1, where b is a base, e.g. 2, 3, 4.... and i the number of input signals; the products are then added and the sum is transmitted through a transmission channel; it is decoded at the receiving end by an amplitude filter and the transmission line is a multiplex line. Input signals are D.C. pulses. Addition is carried out by voltage superposition, and the whole dynamic range of the transmission channel (negative and positive amplitudes) is used for transmission. The input signals may be constant frequency A.C. pulses.

Description

Transmission and switching processes with the help of amplitude selection

The invention relates to a transmission and switching method with the help of amplitude selection, especially for use in Telephone switching systems.

State of the art ""

In addition to the time and frequency multiples, the amplitude multiples can also be used for the multiple transmission of signals via a communication channel be used. Often times or frequency multiples transmission of signals via a communication channel only a limited flow of information from the sender to the receiver is transmitted because the transmission medium in its bandwidth

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is limited. This can increase the flow of information can be achieved that auctTthe dynamic range of the transmission channel is exploited. In previous methods, ^ has the amplitude selection however, it has no practical significance. The main difficulty is that due to the finite rise and Fall times due to band limitation in non-synchronous mode of operation Error pulses, pulse interruptions and pulse shortening be evoked ^ /.

task

The invention lj. Is based on the object of a transmission and To design switching procedures that take advantage of the multiple use of the transmission channel in the time and frequency domain, as well as in the dynamic range and avoids the difficulties mentioned above.

The object is achieved in that the individual digital input signals multiplied by various factors (powers of a certain number, e.g. 2), then added and added to the common transmission path are conducted. The prerequisite for using the amplitude selection is the presence of quantized input signals (e.g. telegraph signals, pulse code modulated signals).

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Vort rush '-'"■

The advantage of the invention is that the flow of information on the multiplex line is increased through additional use of the dynamic range with the aid of amplitude selection and that the otherwise common error possibilities are excluded through bit-synchronous operation » _;

If pulsed DC voltage values are transmitted on the transmission channel, in this way, the dynamic range can be used from the limitation for negative voltages to the limitation for positive voltages. Particularly A division of the entire dynamic range is favorable in equidistant discrete levels, but other divisions are possible. Instead of the binary code can be used to reduce errors also use the Gray code or another suitable code. The new transmission method can advantageously be applied to a telecommunications switching system, in particular can be applied to a telephone switching system.

Provided that one has the dynamic range of a transmission channel Divide into 128 discrete amplitude levels (taking into account the maximum permissible error rate during decoding) it is possible to send 7 independent signals at the same time transmitted and clearly separated again on the receiving side.

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O INSPECTED

With a traffic value of y = 0.1 Erlang ', a maximum of 70 subscribers can be connected to a multiplex line using this method. A switching system that works according to this transmission method offers the possibility of increasing the number of subscribers connected by a factor of J.

The amplitude selection process can also be applied to ternary, quaternary, etc. codes are applied. This makes it possible, with optimal utilization of the channel capacity, also three- and four-value Codes (multi-level PCM) to be transmitted and according to this method too Conveying messages.

Explanation of the invention

The invention will now be described in more detail on the basis of exemplary embodiments. Show it:

Fig. 1 block diagram of an amplitude multiple transmission for

3 binary input signals
Fig. 2 Formation of the amplitude multiple
FIG. 5 exemplary embodiment of a demodulator for the circuit according to FIG. 1

Fig. 4 timing diagram to explain the demodulation Fig. 5 block diagram for carrying out the switching method

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ir. with the help of amplitude selection through analog transmission

the amplitude sum
Pig. 6 Block diagram for. Implementation of the mediation process with the aid of amplitude selection by transferring the

Arr.plitude sum in coded form in general representation FIG. 7 As in FIG. 6, but for the case that the multipliers output the information in binary form

FIG. 8 As in FIG. 6, but for the case of polyadic transmission 9 switching process with the aid of amplitude selection Transmission of the amplitude sum in the time division in coded form.

1 shows the block diagram of an amplitude multiple transmission according to the invention for 3 binary input signals s 1, s _p and s. The input signals are each fed via a coefficient multiplier 11, 12, 13 to a summing element 2 and then to the transmission channel 3. The signal s is multiplied by the factor 2 ° = 1, Sp by the factor 2 = 2, 3 ^ by the factor 2 ~ = 4. The; sum signal s can assume 8 discrete values (O, 1, ..., 7). To separate the 3 signals at the end of the transmission path 3, an amplitude filter 4 is provided as a demodulator, which can differentiate between these 8 amplitude values. The demodulation process is explained with reference to FIG.

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Pig. As an example, FIG. 2 shows three different input signals S ₁ , S _{2 and} s ^ as a function of time. The multipliers 11 to 13 (FIG. 1) convert them into the signal forms shown in dashed lines. Due to the different factors of the multipliers, the amplitude of the signal s 1 is retained, that of the signal Sp is doubled and that of the signal s 1 is quadrupled. As a result of the summation of the three signals, the Suminensig ^na ^ ^s m *

As an example, FIG. 3 shows an amplitude filter 4 with 16 amplitude stages for the separation of a maximum of 4 superimposed binary. Input signal en. The bit clock BT is either transmitted from the input of the transmission skanals 3 to its output or to its output generated. He controls a sawtooth generator 4-1, sets one. Counter 43 via its input R to zero and triggers a counter clock generator 44.

The comparator 42 constantly compares the sawtooth voltage U des Generator 41 with the buzz signal s received from channel 3. If both amplitudes are the same, it sends a stop pulse St.

As shown in FIG. 4, the voltage of the sawtooth generator 41 increases

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after each bit clock pulse linearly from 0 to a maximum value. The abscissa (time) and ordinate (amplitude) are divided into an equal number of discrete steps 2 ⁿ , where η is the number of binary input signals. The number of stages 2 ^{n also} determines the speed of the counter clock generator 44, which generates a count clock ZT ^{2 n times faster than the bit clock BT.} These counting cycles are counted by the counter 43 until the stop signal arrives. If this counter ^ 3 (Pig * 3) is implemented as a binary counter that is not fed back, the output signals corresponding to the synchronous bit streams at the input before the coding can be tapped off in parallel at its stages at the end of the bit clock period. In Fig. 4, for example, η = 4 and s = 11. The binary counter 4 3 thereby sets itself to the counter reading LOLL, so that the original signals S ₁ = L, S ₂ = L, s, = 0 and s ^ = L can be tapped at its output.

The amplitude selection method can also be ternary or quaternary etc. codes are applied. In these cases, multiples of the base 3 * 4 are used as factors in the multipliers and decoders and so on. For example, in the case of ternary code, the input signals on the first line with the factor 1, on the second line with the factor 3 * on the third line with the factor 9i on the i-th line multiplied by a factor of 3.

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Fig. 5 shows the ^ .Block diagram of a switching system that according to the transmission method with the help of amplitude selection

is working. .. ". '"

If one of the participants Tlnl. ... TIn n, for example TIn i, a connection request / so the control provides the one assigned to the Tin i Multiplier Ii on a factor (power of 2) not yet used by other participants. Because of The control is not in Pig for clarity. 5 is drawn. The arrows on the multipliers 11, 12, ..., In indicate the intervention of the control. It is assumed that the Signals coming to participants are already available in coded form as synchronous bit streams.

The input functions multiplied by the various factors (1, 2, 4, ..., 2 ⁿ ~) are added and transmitted via the multiplex line 3. The input signals are recovered from the sum signal s on the receiving side with the aid of decoders 401, 402,..., 4θη, which are also set by the controller to the corresponding factor.

The decoders are constructed according to the circuit of FIG. 3,

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The counters can, however, consist of a single bit level here, wherein the control determines the duration between two tilts. The clock pulse generator in the decoder of the respective called subscriber is' accordingly. the factor 2 set in the multiplier of the calling subscriber is controlled so that the counting clock frequency is twice as slow as the clock frequency of the fastest counting stage. Let me give you an example explainedΓ

With a maximum of 7 participants (n = 7), the factor of the multiplier of the 7th participant is set to 2 ⁿ ~ = 64. This creates in connection with. the signals of the other 6 participants a maximum of 128 amplitude levels, so that the maximum clock frequency

ZTF = 2 ⁿ 'BTF = 128 · BTF "

must be, where BTF is the bit clock frequency. If the amplitudes of the signal s, of the third participant were multiplied at the input of the transmission channel by a gain factor of 2? the fastest counting level. This results in the following assignments:

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2 3 4 ■ 5 6th 7th 32 16 8th 4th 2 1 64 32 ■ 16 ^: < 8th 4th 2

Subscriber "· '■" ■ 1
Factor for multiplier 64
ZTF / BTF ■ ^: ';. '128

Are the total voltage s and the sawtooth voltage U at the input of the grain

III O

parators, the counting process of the binary level will end. Of the value "0" or "L" present at this point in time is the output variable, represented by a bit for the called subscriber and is queried at the end of the bit clock period.

A particularly advantageous development of the switching method according to the invention consists in the combination of the amplitude "selection" with the time and / or frequency selection. The ^{bit-synchronous signals additively superimposed at the input of the transmission channel 3 after multiplication by a factor of 2 1} "are here in groups according to time division multiplexing - or frequency division multiplexing. With ζ time slots or ζ frequencies and a array amplitude levels per time slot or frequency, η = ζ · ld (a) simultaneously possible connections. If the number of amplitude levels that can be transmitted is limited, for example for reasons of resolution during decoding, this procedure can further increase the number of signals that can be transmitted. Here, the sum of the input signals multiplied by the various factors (powers of 2, 3, 4) is calculated in the cycle of the time slot

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frequency is formed as an amplitude value and this via the multiplex line transfer. The sum of the signals can be generated in a very simple manner by adding currents or adding voltages a summing element are formed.

Pig. 6 shows a further advantageous embodiment of the switching system according to the invention. The sum of the input signals is not coded as an analog amplitude value, but rather coded transmitted, whereby the number of participants η can be greater than 7.

The input signals are first multiplied by the factors 2 ~ in the multipliers 11, 12, ..., Ii, ..., In, then combined and coded in the encoder 20, transmitted over the multiplex line 3, in the decoders 4β1, Λ62 . .. 46n decoded and supplied to the called subscribers.

There are a number of options for further processing the signals:

In the case of binary processing "the multipliers 11, 12, In binary signals.

In FIG. 7, for the case in which the multipliers 11 to In output the binary signals in serial form as the encoder 20

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INSPECTED

series-connected adders 22 to 2n are provided. The adder 22 adds the output signals of the multipliers 11 and 12, the adder 23 the. Output signals of the adding element 22 and of the multiplying element 13 etc., the output signals of the adding element 2 (il) and the multiplier element Ii being fed to the adding element 21. The multiplier and the adder assigned to it are each connected by a single line, so that the transmission speed is increased ^{by the factor 2 n ~.} This is permissible at normal transmission speeds on the subscriber lines, since the bit rate is a maximum of 2 Mbit / s, while on the short lines, 100 Mbit / s can be selected and also processed between the multiplier and the adder assigned to it.

As already described for the counter 43 in FIG. 13, the ordered information for the connected subscribers is available at the output of the last binary adder 2n. The transfer of this information to the called subscriber takes place at the output of the adder 2n via η lines with the bit rate of the subscriber lines. The adders must be designed so that they ^{can add up to 2 n} -l values.

The same arrangement shown in Fig. 7 can also be used when the multipliers the information in parallel

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ORIGINAL!, NSPcCTED

Output form. With the same transmission speed as in the subscriber lines, a multiplier and the same are allocated to it
necessary.

i 1 "" ·; and the adder assigned to it, 2 parallel lines each

It is also possible to add a single one instead of the n-1 adders use, whereby the addition of the η input variables can be done serially with the help of shift registers or memories.

A polyadic processing, in particular, a decimal addition can be carried out. When combined with the time division multiplexing method, for example, the sum of the input signals converted as a polyadic number in the encoder 20 (FIG. 6) to the time slot frame or a part thereof

assigned and the place value of the polyadic number is assigned to the amplitude in the Zeitsohlitz ^.

For example, a maximum of 9 binary synchronous input signals should be superimposed. The instantaneous value of the signals is s, = 0, S ₂ = L, s ^ = L, Sj. = 0, S- = L, Sg = L etc., so that the following binary number can be written _{for the signals s to s g: LOOLLOLLO.} When converted to the decimal code, this binary number results in the decimal number 310. Using a time

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ORIGINAL! NSPECTED

The raultiplex method is now carried out in the encoder 20 according to the invention for example the first 'time slot the hundreds of the Number 310 and the amplitude level the value of the hundreds, Namely assigned to 3 j. The amplitude in the second time slot is corresponding to the value 1 of the tens and the amplitude im assigned to the third time slot corresponding to the value 0 of the ones place of the number 310. This results in 9 occurring at the same time Input signal pulses each have 3 time slots that form a time frame that is in the cycle of the input signal pulses repeated with different amplitude levels. In this case it is

thus a 3-fold bit clock frequency compared to the bit clock frequency the information received from the participants on the transmission channel and thus a 3-fold bandwidth of the transmission channel is required.

An exemplary embodiment for polyadic transmission is shown in FIG. 8. Each adder 22 to 2'n of the encoder 20 or the total adder of the encoder 20 processes the received multilevel signals and expediently gives the total in the same representation

on the multiplex line 3. In this case, a decimal binary Decoder 45 required. The called subscribers can in turn be connected directly to its output stages,

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as this is already explained ^one .anhand .the Fig. 3 using the example of the counter 43>. .. ...

The amplitude range within a time slot is in this Example can be subdivided into 10 discrete levels. In total, η. «Ζ · ld ('a), where ζ = number of time slots, a = number of amplitude levels, connections possible, the same applies when the frequency multiple is used, whereby, for example, the frequency is assigned to the digit and the amplitude to the digit can be.

A further implementation of a switching method according to the invention is the method described in Fig. 6 ^v overall measure FIG. 9 so alter that the frames are divided into Teilrahraen with large time-division multiplex frame with, for example, 100 Zeischlitzen. In this way it is possible to use many small, much cheaper adding elements 21... 2n instead of an expensive adding unit. The control ensures that the subscriber adders 21 ... 2n are switched on at the right time by switching the changeover switches 71 ... 7n and the switches 711 ... 7nl.

ZT1_7 K. Steinbuch, communications engineering

W. Rupprecht Springer-Verlag, Berlin, Heidelberg,

New York (1967), in particular

see 27V277

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INSPECTED

Claims (20)

Patent claims l) Transmission method with the help of amplitude selection, since • that .. characterized by, \ on the transmit side a number of digital synchronous input signals each with different factors b, b, b, ..., b "(with b = base, e.g. 2,3, ^, ... and i = number of Input signals) are multiplied, that then the products are added, that the sum is transmitted via a transmission channel and decoded on the receiving side with the aid of an amplitude filter. 2. The method according to claim 1, characterized in that a multiplex line is used as the transmission channel. 35. The method according to claim 1 or 2, characterized in that DC voltage pulses are used as input signals that the addition is carried out with the help of the voltage superposition and that the entire dynamic range of the transmission channel (negative and positive amplitudes) is used for transmission. 4. The method according to claim 1 or 2, characterized in that the input signals are AC voltage pulses with a constant frequency be used. 409882/0537 ORIGINAL INSPECTED 5. The method according to · claim 1 or 2, characterized in that the DC impulses can be used as input signals and the Addition is carried out with the aid of the current superposition. 6. The method according to claim 1 or 2, characterized in that the input signals are alternating current pulses with a constant frequency used (alternating current telegraphy). 7. The method according to claim 1 or 2, characterized in that the sum is transmitted on the transmission channel in coded form will. 8. The method according to claim J, characterized in that a polyadic representation for coding the signal sum is selected, the digit of the number of a number system being assigned to a first selection feature. 9. The method according to claim 8, characterized in that at Time division multiplex transmission is a time slot as the first selection feature and the amplitude is selected as the second selection feature, and the total number of digits in the number of a number system forms part or all of the timeframe ;. 10. The method according to claim 8, characterized in that at - 18 409882 / 0S37 ORIGINAL INSPECTED Frequency multiplex transmission is selected as the first selection feature, the frequency and as the second selection feature, the amplitude will. '.. -: 11. The method according to claim 7 to 10, characterized in that ca3 those with powers of 2, * $, ^ * ♦ ·. multiplied input signals as binary, ternary, quaternary, ..., signals are first added digitally on the transmit side, that the signal sum is encoded in the selected number system, that this encoded sum is transmitted over the transmission channel to the receiving location, that a Decoder converts the sum back into binary, ternary, quaternary, ..., representation and that an output line is connected to each point of the decoder, so that the signals appearing at the input are recovered at the output. 12. The method according to claim 1 to 11, characterized in that when it is used in a telephone switching system, the signals from a subscriber present as a bit stream after he has expressed a connection request, with the assistance of the controller as input signals, each with the various factors (powers of 2, j5, h, ...) are multiplied, that these signals are then added to the corresponding-treated signals of the other participants, that the sum signal has a - 19 409882/0537 BAD ORK3INAL common multiplex line is transmitted and that when called Subscriber a decoder "that sent out by the calling subscriber Signal restores. .. · -. · 13. The method according to claim 12, characterized in that the with a subscriber's signal multiplied according to a factor the claim 9 is coded that this coded signal then to the likewise coded signals of other participants is added in synchronism with the time frame and that the obtained in this way encoded polyadic sum signal is transmitted. 14. The method according to claim 13 »characterized in that the participants are combined into groups, that the participant groups are each assigned a time frame, that these individual ¹ participants are combined into a superordinate time frame and that the control for ^ as time-correct switching on the subframe by pressing switches on the calling and called subscriber. . · ■ · 15- Arrangement for carrying out the. Method according to the claims 1 to 6, characterized in that the amplitude filter has a Comparator (42) contains, at one input of which the sum signals of the transmission channel (3) are supplied and at the other - 20 - 409882/0537 ORIGINAL INSPECTED Input a function generator (41) is connected, which generates a time-dependent amplitude that at the output of the comparator a binary counter (4j5) is connected, which is determined by the output signal of the! Comparator is stopped so that the counter clock input of the A counter generator (44) is connected to the counter, the counter clock frequency of which is higher by the factor b ~ than the bit clock frequency of the transmission channel that at each counting stage of the counter (43) one Output circuit is connected and that the bit clock the counter clock generator, controls the puncture generator and the counter. 16. The arrangement according to claim 16, characterized in that the function generator generates a stepped curve in the amplitude filter. 17. The arrangement according to claim 16, characterized in that the caS Function generator in the amplitude filter implemented as a sawtooth generator is. 18. The arrangement according to claim l6, characterized in that about 2 instead of the puncture generator in the Arr.plitudenf ilter an integr-i-cor is provided, to which the counting cycle of the counting cycle generator is fed as a series of needle pulses. 19- arrangement according to claim 16, characterized in that ca5 ar. - 21 - 409882/0537 BAD ORiGiNAL Site of the _funct: a capacitor is provided in ionsgenerators amplitude filter, which the count clock of the Zählgenerators is fed as a bit stream. .. -. ·. ~ 20. Arrangement for performing the method according to claim 12,
characterized in that the decoder contains only a single counting stage and that the controller sets the counting clock frequency in the counting clock generator as a function of the factor used for the input signal of the calling subscriber, 409882/0537 ORIGINAL SUSPECTED Blank page