DE202018005633U1 - Device for the selective etching of substrates - Google Patents
Device for the selective etching of substrates Download PDFInfo
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- DE202018005633U1 DE202018005633U1 DE202018005633.2U DE202018005633U DE202018005633U1 DE 202018005633 U1 DE202018005633 U1 DE 202018005633U1 DE 202018005633 U DE202018005633 U DE 202018005633U DE 202018005633 U1 DE202018005633 U1 DE 202018005633U1
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- substrate
- etching solution
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- conveyor
- wafer
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- 238000005530 etching Methods 0.000 title claims abstract description 47
- 239000000758 substrate Substances 0.000 title claims abstract description 39
- 238000000034 method Methods 0.000 claims abstract description 35
- 238000004381 surface treatment Methods 0.000 claims abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 19
- 229910052710 silicon Inorganic materials 0.000 claims description 19
- 239000010703 silicon Substances 0.000 claims description 19
- 238000007789 sealing Methods 0.000 claims description 2
- 238000005507 spraying Methods 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 description 40
- 239000002019 doping agent Substances 0.000 description 6
- 239000000443 aerosol Substances 0.000 description 3
- 239000007921 spray Substances 0.000 description 3
- 238000009736 wetting Methods 0.000 description 3
- 239000002253 acid Substances 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- BUHVIAUBTBOHAG-FOYDDCNASA-N (2r,3r,4s,5r)-2-[6-[[2-(3,5-dimethoxyphenyl)-2-(2-methylphenyl)ethyl]amino]purin-9-yl]-5-(hydroxymethyl)oxolane-3,4-diol Chemical compound COC1=CC(OC)=CC(C(CNC=2C=3N=CN(C=3N=CN=2)[C@H]2[C@@H]([C@H](O)[C@@H](CO)O2)O)C=2C(=CC=CC=2)C)=C1 BUHVIAUBTBOHAG-FOYDDCNASA-N 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000005499 meniscus Effects 0.000 description 1
- 238000000746 purification Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000003631 wet chemical etching Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67706—Mechanical details, e.g. roller, belt
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67075—Apparatus for fluid treatment for etching for wet etching
- H01L21/6708—Apparatus for fluid treatment for etching for wet etching using mainly spraying means, e.g. nozzles
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67075—Apparatus for fluid treatment for etching for wet etching
- H01L21/67086—Apparatus for fluid treatment for etching for wet etching with the semiconductor substrates being dipped in baths or vessels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
- H01L21/6776—Continuous loading and unloading into and out of a processing chamber, e.g. transporting belts within processing chambers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Weting (AREA)
Abstract
Vorrichtung zur Oberflächenbehandlung von flachen Substraten mit einem Fördermittel zum Transport des Substrates in einer vom Fördermittel bestimmten Transportebene und einem Prozessmedium zum Ätzen des flachen Substrates ist dadurch gekennzeichnet, dass das Fördermittel die Substratoberfläche mindestens zu einer Seite gegen das Prozessmedium abgrenzt und die Funktion einer Dichtung hat. A device for surface treatment of flat substrates with a conveying means for transporting the substrate in a transport plane determined by the conveyor and a process medium for etching the flat substrate is characterized in that the conveyor delimits the substrate surface at least to one side against the process medium and has the function of a seal ,
Description
Die vorliegende Erfindung betrifft eine Vorrichtung zur Behandlung bzw. Bearbeitung von Substratoberflächen insbesondere die einseitige Ätzung der Substratoberfläche.The present invention relates to a device for the treatment or processing of substrate surfaces, in particular the one-sided etching of the substrate surface.
Zur Herstellung von Silizium basierenden Solarzellen werden die Siliziumsubstrate (Silizium Wafer) in mehreren Prozessschritten behandelt. Hierbei werden zunächst die Silizium Wafer chemisch geätzt, wobei es von Vorteil ist, dass in Folge des Ätzprozesses die Oberfläche texturiert wird. Üblich ist hierbei, je nach Beschaffenheit des Silizium Wafer (mono- oder multikristallin), für die Texturierung entweder eine alkalische Ätzlösung oder eine saure Ätzlösung zu verwenden. Durch die Texturierung der Silizium Wafer wird die Einkopplung von Licht erhöht. Anschließend folgen Reinigungsprozesse. Die so behandelten Silizium Wafer werden dann in den folgenden Prozessschritten mit unterschiedlichen Verfahren mit Dotierstoffen behandelt, so dass eine Halbleiterstruktur mit pn-Übergang aufgebaut wird. Das hier meist eingesetzte Verfahren ist ein Gasphasenprozess bei Hochtemperatur, bei dem Dotierstoff in das Silizium oberflächlich hineinlegiert wird. Bei dem Dotierprozess werden beide Seiten des Silizium Wafers mit Dotierstoff behandelt. In einer besonderen Ausführungsform wird das Substrat mit 2 unterschiedlichen Dotierstoffen behandelt, wobei die Prozessschritte so ausgelegt sind, dass die Vorderseite und die Rückseite mit einem unterschiedlichen Dotierstoff legiert werden. Unabhängig vom Dotierverfahren legieren die Dotierstoffe auch auf den Kanten der Siliziumsubstrate. Dies hat zur Folge, dass es zu einem elektrischen Kurzschluss der Solarzelle kommt. Um dies zu verhindern werden die Silizium Substrate mit einem Ätzverfahren oder mit Laser elektrisch isoliert. Am häufigsten wird ein Nasschemisches Ätzverfahren eingesetzt, bei dem die Silizium Wafer einseitig mit einer Ätzlösung benetzt werden.For the production of silicon-based solar cells, the silicon substrates (silicon wafers) are treated in several process steps. In this case, first the silicon wafers are chemically etched, wherein it is advantageous that the surface is textured as a result of the etching process. It is customary here, depending on the nature of the silicon wafer (monocrystalline or multicrystalline), to use either an alkaline etching solution or an acid etching solution for the texturing. By texturing the silicon wafer, the coupling of light is increased. Then follow cleaning processes. The silicon wafers thus treated are then treated with dopants in the following process steps with different methods, so that a semiconductor structure with pn junction is built up. The most commonly used method is a gas phase process at high temperature, in which dopant is superficially alloyed into the silicon. In the doping process, both sides of the silicon wafer are treated with dopant. In a particular embodiment, the substrate is treated with 2 different dopants, wherein the process steps are designed such that the front side and the rear side are alloyed with a different dopant. Regardless of the doping process, the dopants also alloy on the edges of the silicon substrates. This has the consequence that there is an electrical short circuit of the solar cell. To prevent this, the silicon substrates are electrically isolated by an etching process or by laser. Most commonly, a wet chemical etching process is used in which the silicon wafers are wetted on one side with an etching solution.
Anschließend müssen die so behandelten Substrate in einer Sequenz aus Reinigungsschritten behandelt werden. Danach werden Schichten zur Verbesserung der Oberflächenqualität sowie einer verbesserten Lichteinkopplung auf den Silizium Wafer aufgebracht. Abschließend werden auf die so prozessierten Silizium Wafer metallische Kontakte aufgebracht.Subsequently, the so treated substrates must be treated in a sequence of purification steps. Thereafter, layers for improving the surface quality and an improved light coupling are applied to the silicon wafer. Finally, metallic contacts are applied to the silicon wafers processed in this way.
Eine Aufgabe der vorliegenden Erfindung besteht darin, dass flache Substrate, insbesondere aber nicht ausschließlich Silizium Wafer, einseitig geätzt werden, um die Vorderseite und die Rückseite des flachen Substrates voneinander elektrisch zu isolieren.An object of the present invention is that flat substrates, in particular but not exclusively silicon wafers, are etched on one side to electrically isolate the front and the back of the flat substrate from each other.
Stand der Technik ist die alkalische Ätzung oder saure Ätzung eines Silizium Wafers im horizontalen Durchlaufverfahren (auch Inline Verfahren genannt).The prior art is the alkaline etching or acid etching of a silicon wafer in the horizontal flow method (also called inline method).
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Der Erfindung liegt die Aufgabe zugrunde, eine Vorrichtung zur Behandlung von flachen Substraten zu schaffen, mit denen Probleme des Standes der Technik vermieden werden und insbesondere aber nicht ausschließlich Halbleitersubstrate (im folgenden Wafer genannt) im Inlineverfahren auf der Oberfläche einseitig geätzt werden können.The invention has for its object to provide an apparatus for the treatment of flat substrates, with which problems of the prior art are avoided and in particular but not exclusively semiconductor substrates (hereinafter referred to as wafers) can be etched in one-sided inline on the surface.
Die vorliegende Erfindung umfasst eine Vorrichtung, dass eine einfachere und verbesserte Lösung zum Stand der Technik darstellt. Dabei wird ein Wafer horizontal in einer Vorrichtung mit Hilfe eines Fördermittels oberhalb eines Prozessmediums transportiert. Der Wafer liegt am Randbereich auf einem schmalen Auflagebereich auf dem Fördermittel auf. In dem Randbereich wird der Wafer mit Ätzlösung benetzt, um diese Seite elektrisch zu isolieren.The present invention includes a device that provides a simpler and improved prior art solution. This is a Wafer horizontally transported in a device by means of a conveyor above a process medium. The wafer rests on the edge area on a narrow contact area on the conveyor. In the edge region, the wafer is wetted with etching solution to electrically isolate this side.
Der Auflagebereich des Fördermittels ist so ausgestaltet, dass der Wafer zu einer Seite soweit abgedichtet ist, dass nur ein schmaler Bereich am äußeren Rand den Wafer mit dem Ätzmedium benetzt wird.The support region of the conveying means is designed such that the wafer is sealed to one side to the extent that only a narrow region on the outer edge of the wafer is wetted with the etching medium.
Kennzeichen des Fördermittels ist, dass es neben dem Transport auch den Wafer in einem Bereich gegen die großflächige Benetzung mit Ätzlösung abgrenzt, so dass nur ein schmaler Bereich am Rand des Wafers geätzt wird. Characteristic of the conveying means is that apart from the transport, it also delimits the wafer in a region against the large-area wetting with etching solution, so that only a narrow region is etched at the edge of the wafer.
Die Auflagebereich des Fördermittels oder das Fördermittel erfüllt auch die Funktion einer Dichtung.The support area of the conveyor or the conveyor also fulfills the function of a seal.
Die Auflagevorrichtung des Fördermittels kann ein Substrathalter mit einer Dichtleiste sein, ein Transportband, das eine Lippendichtung aufweist, ein Transportband, das so ausgestaltet ist, dass es auch die Funktion einer Dichtung erfüllt oder eine Transportvorrichtung, die aus Segmenten besteht und dabei in ihrer Ausführungsform auch die Funktion einer Dichtung erfüllt.The supporting device of the conveying means may be a substrate holder with a sealing strip, a conveyor belt having a lip seal, a conveyor belt which is designed so that it also fulfills the function of a seal or a transport device which consists of segments and in its embodiment also fulfills the function of a seal.
In einer weiteren Ausführungsform kann das Fördermittel eine Auflagevorrichtung enthalten oder selbst einen Auflagevorrichtung sein, die in ihrer Ausführungsform die Ätzlösung über Kapillarkräfte an die Wafer-Oberfläche heranführt. Als weitere Ausführungsform wird der Wafer auf dem erfindungsgemäßen Fördermittel liegend über eine Sprühvorrichtung oder einer Schwallvorrichtung geführt oder über eine Vorrichtung angeströmt, die die Wafer-Unterseite mit Ätzlösung benetzt. Dabei verhindert die Auflagevorrichtung in der Ausführungsform einer Dichtung eine Benetzung des Wafers über den am Rand abgegrenzten Bereich hinaus.In a further embodiment, the conveying means may comprise a support device or may itself be a support device, which in its embodiment brings the etching solution via capillary forces to the wafer surface. As a further embodiment, the wafer is guided lying on the conveyor according to the invention lying over a spray device or a surge device or flowed through a device which wets the wafer bottom with etching solution. In the embodiment of a seal, the support device prevents wetting of the wafer beyond the area delimited at the edge.
Unterhalb der Fläche wo der Wafer nicht mit Ätzlösung benetzt wird, liegt die Oberfläche der Ätzlösung tiefer als in dem Bereich, wo der Wafer mit Ätzlösung benetzt wird. In einer Ausführungsform befindet sich die Ätzlösung nur unterhalb des zu ätzenden Bereichs.Below the area where the wafer is not wetted with etching solution, the surface of the etching solution is deeper than in the area where the wafer is wetted with etching solution. In one embodiment, the etching solution is located only below the area to be etched.
In einer weiteren Ausführungsform kommt der Wafer nicht direkt mit der Ätzlösung in Kontakt, sondern die Ätzung wird über vom Ätzmedium aufsteigende ätzende Dämpfe oder Aerosole geätzt.In a further embodiment, the wafer does not come into direct contact with the etching solution, but the etching is etched via corrosive vapors or aerosols rising from the etching medium.
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BezugszeichenlisteLIST OF REFERENCE NUMBERS
- 11
- Behandlungsanlage zur selektiven Ätzung von SubstratenTreatment plant for the selective etching of substrates
- 22
- Flaches Substrat, WaferFlat substrate, wafer
- 33
- Fördermittelfunding
- 44
- Prozesslösung, ÄtzlösungProcess solution, etching solution
- 55
- Randbereich des flachen SubstratesEdge region of the flat substrate
- 66
- Tiefer liegendes ÄtzmediumLower etching medium
- 77
- Fördermittel mit KapillareConveyor with capillary
- 88th
- Sprühvorrichtung mit ProzessmediumSpray device with process medium
- 99
- Ätzende Dämpfe oder AerosoleCorrosive vapors or aerosols
ZITATE ENTHALTEN IN DER BESCHREIBUNG QUOTES INCLUDE IN THE DESCRIPTION
Diese Liste der vom Anmelder aufgeführten Dokumente wurde automatisiert erzeugt und ist ausschließlich zur besseren Information des Lesers aufgenommen. Die Liste ist nicht Bestandteil der deutschen Patent- bzw. Gebrauchsmusteranmeldung. Das DPMA übernimmt keinerlei Haftung für etwaige Fehler oder Auslassungen.This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.
Zitierte PatentliteraturCited patent literature
- EP 1961035 B1 [0006, 0007, 0008]EP 1961035 B1 [0006, 0007, 0008]
- DE 10313127 B4 [0006, 0007, 0008]DE 10313127 B4 [0006, 0007, 0008]
- DE 102012210618 A1 [0006, 0007, 0008]DE 102012210618 A1 [0006, 0007, 0008]
- US 2008/0041526 A1 [0006, 0007, 0008]US 2008/0041526 A1 [0006, 0007, 0008]
- EP 1960119 B1 [0007, 0009]EP 1960119 B1 [0007, 0009]
Claims (8)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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DE202018005633.2U DE202018005633U1 (en) | 2018-12-08 | 2018-12-08 | Device for the selective etching of substrates |
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Application Number | Priority Date | Filing Date | Title |
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DE202018005633.2U DE202018005633U1 (en) | 2018-12-08 | 2018-12-08 | Device for the selective etching of substrates |
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DE202018005633U1 true DE202018005633U1 (en) | 2019-03-26 |
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DE202018005633.2U Expired - Lifetime DE202018005633U1 (en) | 2018-12-08 | 2018-12-08 | Device for the selective etching of substrates |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10313127B4 (en) | 2003-03-24 | 2006-10-12 | Rena Sondermaschinen Gmbh | Process for the treatment of substrate surfaces |
US20080041526A1 (en) | 2006-08-16 | 2008-02-21 | Pass Thomas P | Single-sided etching |
EP1961035A1 (en) | 2005-12-16 | 2008-08-27 | Gebr. Schmid GmbH + Co. | Device and method for treating the surfaces of substrates |
EP1960119A1 (en) | 2005-12-16 | 2008-08-27 | Gebr. Schmid GmbH + Co. | Device, system and method for treating the surfaces of substrates |
DE102012210618A1 (en) | 2012-01-26 | 2013-08-01 | Singulus Stangl Solar Gmbh | Apparatus and method for treating plate-shaped process material |
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2018
- 2018-12-08 DE DE202018005633.2U patent/DE202018005633U1/en not_active Expired - Lifetime
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10313127B4 (en) | 2003-03-24 | 2006-10-12 | Rena Sondermaschinen Gmbh | Process for the treatment of substrate surfaces |
EP1961035A1 (en) | 2005-12-16 | 2008-08-27 | Gebr. Schmid GmbH + Co. | Device and method for treating the surfaces of substrates |
EP1960119A1 (en) | 2005-12-16 | 2008-08-27 | Gebr. Schmid GmbH + Co. | Device, system and method for treating the surfaces of substrates |
US20080041526A1 (en) | 2006-08-16 | 2008-02-21 | Pass Thomas P | Single-sided etching |
DE102012210618A1 (en) | 2012-01-26 | 2013-08-01 | Singulus Stangl Solar Gmbh | Apparatus and method for treating plate-shaped process material |
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