DE1173527B - Pulse divider for broken divider ratios - Google Patents

Description

FEDERAL REPUBLIC OF GERMANY

GERMAN

PATENT OFFICE

EDITORIAL

Boarding school Class: H 03 k

German KI .: 21 al -36/22

Number: 1173 527

File number: S 79930 VIII a / 21 al

Filing date: June 15, 1962

Opening day: July 9, 1964

The invention relates to a pulse scaler for fractional division ratios with partial blanking the impulses to be reduced.

The invention is based on the object of a pulse reducer for fractional division ratios to create, d. H. to enable scaling according to a factor that is not an integer, but rather still has one or more decimal places after the comma.

It is already a pulse scaler for fractional division ratios, ζ. B. 1.5, known that a multivibrator circuit contains. However, this arrangement has several disadvantages that affect its applicability severely restrict: The well-known multivibrator circuit must be based on the frequency of the gear to be reduced Pulse signal be matched so that frequency fluctuations and signal interruptions the Impair the operation of the circuit. Furthermore, it is not possible to take individual pulses into account. On the other hand, the known circuit arrangement is not suitable for a pulse reduction to allow with larger divisional amounts.

A pulse scaler free of the disadvantages of the above-mentioned known arrangement according to FIG the invention is characterized in that a counting decade is provided for each digit of the divider and that the counting decade for the digit after the decimal point of the divider during each reduction interval receives the number of pulses corresponding to this point and causes one of the incoming pulses to be reduced is blanked at each zero crossing of this counting decade will. According to the further invention, the counting decade is for the place after the decimal point of the divider is controlled via a gate, which is set before the end of each reduction interval for the feed one of the number of pulses corresponding to the decimal point after the decimal point is opened. One embodiment of the invention is characterized in that the decimal point after the decimal point of the The number of pulses corresponding to the divider of one of the counting decades for the digits before the decimal point of the divider is removed.

An exemplary embodiment of the invention is explained below with reference to the block diagram.

The pulse signal that is to be scaled down according to a fractional division ratio is fed to the input E of the arrangement. The signal fed to the input E reaches the counter Z via the gate stage T ₁ , which in the illustrated embodiment, for which the divider 17.5 is assumed, contains two decades D ₁ , D ₂ . The counter Z is for this pulse scaler for fractional
Dividing ratios

Applicant:

Siemens & Halske Aktiengesellschaft,

Berlin and Munich,

Munich 2, Witteisbacherplatz 2

Named as inventor:
Hubert Hoetzel, Karlsruhe

Purpose set to the hundreds complement of the coaster number, neglecting the decimal places after the decimal point. The counter Z counts

ao from 83 to 100 and then jumps back to 83. To take into account the digits after the decimal point of the divider, the second decade D _{2 of} the counter Z is used before the end position is reached, e.g. B. at 90, the gate step T _{11 is} opened, so that in a further counting decade D _s pulses can be stored, each corresponding to the digit after the decimal point of the divider. These pulses, in the present case five pulses - since the division ratio has the number 5 after the decimal point - can be branched off from the first decade D _{1 of} the counter Z via the switches shown. As soon as ten pulses are stored in the counting decade D, the bistable multivibrator K, for example a flip-flop circuit, is activated, which in turn causes the gate stage T _{1 to be blocked.} As a result of the blocking of the gate stage T ₁ , however, only one of the pulses supplied to the input E is blanked, since this pulse already throws back the toggle circuit K via the line L , so that the blocking of the gate stage T _{1 is} reversed again with a little delay. The mode of operation of the arrangement is therefore that - assuming a division ratio of 17.5 - one of the input pulses, for example every thirty-fifth pulse, is blanked during every second reduction interval and does not affect the counter Z. The arrangement described can be extended to the effect that several decimal places after the decimal point of a divider are taken into account. It is also possible to add additional pulses to the circuit instead of a pulse blanking.

^: +09 629/332

Claims (3)

Patent claims: 1. Pulse scaler for fractional divider ratios with partial blanking of the pulses to be reduced, characterized in that a counting decade (D ₁ , D ₂ , D ₃ ) is provided for each digit of the divider and that the counting decade (D ₃ ) for the place behind the Comma of the divider receives the number of pulses corresponding to this point during each reduction interval and causes one of the incoming pulses to be reduced to be blanked _{at each zero crossing of this decade (D 3).} 2. Pulse scaler according to claim 1, characterized in that the counting decade (D ₃ ) for the digit after the decimal point of the divider is _{controlled via a gate stage (T 11} ) which, before the end of each step-down interval, is used to supply one of the decimals after the decimal point Number of pulses is opened. 3. Pulse scaler according to claim 1 or 2, characterized in that the number of pulses corresponding to the decimal behind the decimal point of the divider is taken from one of the counting decades (e.g. D ₁ ) for the digits before the decimal point of the divider. Considered publications:
U.S. Patent No. 2,572,698. For this purpose, 1 sheet of drawings 409 629/332 6.64 © Bundesdruckerei Berlin