DE10259338A1 - Monolithic integrated circuit power amplifier, e.g. for portable radio equipment, has LC balun with matching network presenting definable impedance to output of amplifier circuit - Google Patents

Abstract

The amplifier circuit (101) receives a single-ended input signal (103, 104) and supplies an amplified balanced output to an on-chip LC balun circuit (102). The balun circuit presents a definable impedance to the output of the amplifier and acts as a matching network for the amplifier output terminal (105). A capacitor (137) is preferably included in the output circuit as a DC blocking device. An Independent claim is included for mobile radio equipment using a monolithic integrated circuit amplifier circuit arrangement according to the invention.

Description

The invention relates to a monolithic Integrated amplifier circuit arrangement and a cellular device.

In recent years, the Mobile radio and wireless LAN systems ("local area network") have become important technological and economic Areas developed. The trend in these areas is towards low power Low supply voltage applications for wireless devices and to one if possible energy-saving operation when transmitting and processing signals. Thus there is also a need for energy-saving Power amplifiers, especially for the High frequency technology.

In [1] is an overview of radio frequency power amplifiers for mobile radio given.

In a power amplifier for high frequency technology becomes common an input signal coupled into an input and due to the functionality of the amplifier circuit is the power of the signal down to an output signal on a Output of the amplifier circuit elevated. On such power amplifier is common with an external so-called balun circuit (balanced / unbalanced) coupled between the amplifier circuit and a signal processing circuit can. A balun circuit is used for impedance and symmetrical matching of different transmission media or signal processing instances. A balun circuit is according to the state technology usually implemented as an external adaptation network, with which an external adaptation of power amplifiers can be made.

[2] discloses a balun circuit for high-frequency technology in a frequency range between 2.1 and 3.6 GHz. The Balun circuit known from [2] has a dimension of 75 × 49 mm ² .

[3] discloses a power amplifier circuit integrated in a chip, which is connected to an external balun circuit formed on a printed circuit board. The power amplifier known from [3] has a chip dimension of 1.5 × 0.95mm ² . The balun circuit provided externally by the power amplifier has a dimension of 36 × 29 mm ² .

[4] discloses a power amplifier monolithically integrated in a chip, which is connected together with an external balun circuit having a dimension of 36 × 29 mm ² on a common test circuit board.

[5] discloses a monolithic integrated transformer especially for high-frequency applications for example in GSM mobile radio facilities.

From [6], [7] is one in a chip integrated power amplifier known in which a passive output matching network using a transformer is realized.

In [8] it is described which contribution provides a bond wire to an inductance of a circuit.

Many amplifier circuits known from the prior art have the disadvantage that they contain an external matching network, with the one for needs sufficient gain in the mobile radio area cannot be achieved in all cases. Moreover are during of signal transport via Conductor tracks between the amplifier circuit and the matching network the signals are subjected to strong ohmic damping and other disturbing influences, which in particular makes processing weak signals difficult. This is particularly useful in battery-operated, wireless or low-power applications disadvantageous. Furthermore, the frequency bandwidth is up to date amplifier circuits known in the art in many cases not big enough.

The invention lies in particular based on the problem of being able to operate in a broad frequency band, sufficiently powerful amplifier circuit arrangement and To provide cellular device.

The problem becomes monolithic Integrated amplifier circuit arrangement and by a cellular device solved with the features according to the independent claims.

The monolithically integrated amplifier circuit arrangement of the invention an amplifier circuit to generate an opposite one at an input of the amplifier circuit arrangement Provided input signal amplified at the output of the amplifier circuit arrangement available output signal. Furthermore, the monolithically integrated Amplifier circuit arrangement one with the amplifier circuit and LC-Balun output circuit coupled to the output as a matching network for setting a specifiable, at the output of the amplifier circuit arrangement applied output resistance.

The mobile radio device according to the invention has an amplifier circuit arrangement with the above characteristics.

According to the invention, a fully integrated one is descriptive Power amplifier, especially for high frequency applications, created that has an on-chip integrated LC balun.

A basic idea of the invention is to be seen in one for an amplifier circuit arrangement To use amplifier circuit and an LC balun output circuit and monolithically integrate these two sub-circuits in a common substrate. A miniaturized amplifier circuit arrangement is thereby obtained, in which short signal transport paths are made possible and thus undesired signal attenuation and undesired signal noise are reliably avoided. Furthermore, the amplifier circuit arrangement according to the invention can be operated in a broad frequency band with an approximately constant output power.

An inexpensive amplifier circuit arrangement is thus according to the invention created while avoiding external components.

The integration of Amplifier circuit and LC-Balun output circuit in a single chip has the additional one Advantage that the signal transport paths between the amplifier circuit and LC balun output circuit are kept small, so that the signals only over a short transport route signal attenuation are subject. This is especially for low power applications and for applications with Low amplitude signals cheap.

Another important advantage of the amplifier circuit arrangement according to the invention is the monolithically integrated implementation of a Balun output circuit as a particularly compact LC balun output circuit with the functionality of a Output matching network.

With monolithic integration of inductors, as contained in the LC balun output circuit themselves often the problem that an inductor is high enough processing current density a sufficiently high conductor thickness must have. With an integration and thus miniaturization of coils in an integrated circuit is also the track thickness low. thin Conductor tracks limit the quality of the Signal processing and processable power. With an LC balun output circuit, like that disclosed in [3], it is possible to have two or more parallel ones Provide current signal paths, so that advantageously one to be processed Current divided between the inductances contained in the different paths can be. Using a monolithic integrated LC balun output circuit is therefore the total processable current density using several inductors connected in parallel are sufficiently large. Clearly can using n inductors connected in parallel trouble-free processable current across from the use of a balun circuit without inductors around one Factor n increased become.

The further development also brings about in high frequency technology, especially the tendency to use ever higher Frequencies that the required values of integrated inductors successively decrease, so fewer turns are required, and an integration more and more possible in the future becomes.

Is expressed clearly in the monolithically integrated amplifier circuit arrangement of Invention a matching network together with an amplifier circuit to a fully integrated solution merged.

Another advantage with the monolithic integrated amplifier circuit arrangement can be seen in the fact that due to their small size, which is preferably less than the wavelength of one to be processed Signals in the GHz range are different, broadband for signals Frequencies can be used without the need for constant input power significant fluctuations in output performance occur. investigations have shown that in the amplifier circuit arrangement according to the invention for frequencies between 4.8GHz and 6GHz there is no significant fluctuation in output power occurs.

The use of an LC balun output circuit represents a particularly compact realization of a balun, the thus for a miniaturization as part of an integration of an amplifier circuit arrangement particularly well suited. The implementation of the inductance required for the LC balun can be found at Use a planar integrated coil.

According to the invention, an on-chip is implemented Adjustment of the output load enables.

Preferred developments of the invention result themselves from the dependent Claims.

The amplifier circuit arrangement can in a semiconductor substrate be monolithically integrated, preferably in a silicon substrate (for example a silicon wafer or a silicon chip).

The LC balun output circuit can a parallel connection of a series connection of a first inductance and one first capacity and a series connection of a second capacitance and one second inductance exhibit.

The LC balun output circuit can a DC blocking capacity to avoid a DC component at the output of the amplifier circuit arrangement which DC blocking capacity between the parallel connection the inductance / capacitance of the LC-Balun output circuit and the output of the amplifier circuit arrangement can be arranged. In other words, the DC blocking capacity (DC blocking capacity) can be between the parallel connection and the output a DC component suppress a signal.

The value of the capacitance of the DC blocking capacitance can be set in such a way that the DC blocking capacitance, together with at least one parasitic impedance of the LC balun output circuit, forms a real output impedance. At least part of the parasitic impedance can be from at least one connection pad and / or a conductor track of the amplifier circuit arrangement.

In other words, a series connection can from a bond pad (or a conductor track or similar) and the DC blocking capacity can be used to by means Dimensioning the DC blocking capacitance is essentially pure real, i.e. free from imaginary components, Get load. Clearly can Imaginary impedance components bond pads etc. by means of the imaginary impedance of the DC blocking capacitance at least partially, preferably mostly, more preferably completely be compensated.

To the amplifier circuit arrangement externally to contact, a connection pad (or several connection pads) be used. Such a connection pad has an ohmic Resistance, an inductance (typically about 1nH / mm, compare [8]) and a capacity (a pad can be conceived of a capacitor plate) on, so that a load impedance is a complex or imaginary value can have which ohmic, capacitive and inductive impedance components contains the connection pads. through Setting the capacity the DC blocking capacity can now the inductance can be brought to a real value, free of an imaginary component. According to this The criterion can be set the value of the DC blocking capacity become.

The values of the first and the second capacity and the first and second inductances of the LC balun can be based be set to the value of the output resistance.

Is the value of the DC blocking capacity to compensate of imaginary components of the Load impedance selected, in this way a load impedance with a real value can be obtained. Based on the load impedance or the output resistance, you can then considering the frequency (for example 5 GHz) of a high-frequency signal to be processed the values of the inductors and capacities of the LC balun can be selected. The two inductors preferably have the same value, and show the two capacities same value.

Furthermore, between the entrance the amplifier circuit arrangement and the Parallel connection (of LC branches of the LC balun) a choke inductance (RF choke) be provided.

A first connection of the inductor can be done with a first connection of the first inductor and with a first connection the second inductance be coupled, and a second connection of the inductor inductor can with a first connection of the second inductor and with a second connection the second capacity be coupled.

Alternatively, a first connection the choke inductance with a first connection of the second inductor and with a first connection of the second capacitance, and it can be a second connection of the inductor to an electrical reference potential, for example, brought to a supply potential. at the latter connection of the inductor is advantageous that with the associated Layout of the amplifier circuit arrangement crossovers are particularly well avoided by conductor tracks.

The LC balun output circuit can be connected in such a way that at least two separate current flow paths (preferably electrically parallel current flow paths) for a signal are formed between input and output, preferably in an inductance is arranged in each of the current flow paths. So can a stream to be processed is divided into several branches, whereby even with high currents a trouble-free Signal processing is ensured.

The amplifier circuit arrangement of the Invention can be set up as a high-frequency power amplifier preferably used in the frequency range between 4.8GHz and 6GHz can be. According to one preferred embodiment becomes the amplifier circuit arrangement operated at a frequency of 5.8GHz.

Thus, the amplifier circuit arrangement preferably set up for operation in a frequency band between 4.8GHz and 6GHz.

The amplifier circuit arrangement is preferably in at least two dimensions (preferably two dimensions, which the thickness of the substrate into which the amplifier circuitry is integrated is orthogonal) is smaller than the wavelength of one to be amplified Input signal.

In this case it is ensured that a particularly high bandwidth, that is, a particularly large area from at constant input power with approximately the same output power processable input signals, can be processed.

It should be noted that the inventive monolithic Integrated amplifier circuit arrangement for one differential signal processing, i.e. in push-pull mode, is suitable is. Furthermore, the amplifier circuit arrangement technology independent of the invention and can for example in CMOS technology or in Si-BiCMOS technology be implemented.

Preferably, the bond wires and the like are included in the calculation when determining the values of the capacitances and inductances of the LC balun output circuit, ie when planning a layout, in order to reliably avoid that the functionality of the matching network due to the parasitic ohmic Resistance, inductance and capacitance of the bond wires and leads are not undesirably shifted. In other words, the free parameters of the LC balun output circuit are Si mulation of the parasitic quantities dimensioned in the desired manner.

According to the invention, a fully integrated radio frequency or microwave frequency power amplifier is created, in particular for the frequency range between 4.8 GHz and 6 GHz. The amplifier circuit arrangement can be implemented in 38GHz-f _T , 0.25μm-Si-BiCMOS technology.

The amplifier circuit arrangement can be as two-stage push-pull power amplifier using two Transformers implemented on-chip implemented as an input balun and as an intermediate adaptation network his. The LC-Balun output circuit can be made using planar integrated inductors, such as they are described, for example, in [6]. As a result the use of the on-chip implemented output network external elements can be dispensed with so that the signal paths are kept short are and the signal attenuation are minimized. The amplifier circuit arrangement the invention can, for example, with a supply voltage operated from 1.2Volt, 1.5Volt or 2Volt.

Thus, according to the invention, it is a fully integrated one Amplifier circuit provided, in particular for the frequency band of 4.8GHz up to 6GHz approximately provides constant output. By using one monolithic integrated LC balun output circuit can cause losses in signal transmission be kept small. Preferably, the LC balun output circuit contains an integrated choke coil (RF choke) and a DC blocking capacitance (DC block capacitance) for providing a 50Ω output, as is often sought in high-frequency technology.

Thus, components are external to the chip unnecessary according to the invention as an adaptation network. There are no restrictions regarding the external DC potential at the input terminals of the Circuit, and it's not an external DC blocking capacitor required. The input signal can be supplied "balanced" or "unbalanced" at the input of the amplifier circuit arrangement.

An important area of application of the invention is, in particular, high-frequency technology or mobile radio. The amplifier circuit arrangement according to the invention can be used in particular as a wireless LAN amplifier ("Local Area Network"), ie in a local network, more precisely in a spatially limited local data network. The amplifier circuit arrangement of the invention can also be used as a DECT amplifier ("Digital Enhanced Cordless Telecommunications technology") or as a Bluetooth ^™ amplifier.

When generating a layout the amplifier circuit arrangement of the invention can ohmic resistors for example of conductor tracks, parasitic inductances and / or parasitic capacities are taken into account to determine the values L, C of the LC balun. This can ensure that the operating point of the amplifier circuit arrangement is due parasitic impedances not undesirable is moved.

Embodiments of the invention are shown in the figures and are explained in more detail below. It demonstrate:

1 the circuit diagram of an amplifier circuit arrangement according to an embodiment of the invention,

2 2 shows a plan view of a monolithically integrated amplifier circuit arrangement according to an exemplary embodiment of the invention,

3 a plan view of a circuit board on which the in 2 shown amplifier circuit arrangement according to the embodiment of the invention is included, including external contacting,

4 3 shows a layout view of a monolithically integrated amplifier circuit arrangement according to an exemplary embodiment of the invention,

5 1 shows a diagram showing the dependence of an output power on a variable frequency for an input signal of a fixed input power,

6 is a circuit diagram showing an LC balun output circuit of an amplifier circuit arrangement according to another embodiment of the invention.

Same or similar components in different Figures are given the same reference numerals.

The following will refer to l a monolithically integrated amplifier circuit arrangement 100 described according to an embodiment of the invention.

The amplifier circuit arrangement 100 contains an amplifier circuit 101 to generate one versus one at a first input 103 or a second entrance 104 Provide available input signals RFin +, RFin– at one output 105 the amplifier circuit arrangement 100 available output signals RF-out. The amplifier circuit arrangement also includes 100 one with the amplifier circuit 101 and with the exit 105 coupled LC balun output circuit 102 as an adaptation network for setting a specifiable, at the output 105 the amplifier circuit arrangement 100 applied output resistance.

The first entrance 103 is with a first connection of a first input capacitor 106 coupled, the second connection with a first connection of a second input capacitor 107 is coupled. The second connector of the second input capacitor 107 is with the second one gear 104 coupled. The first port of the first input capacitor 106 and the second terminal of the second input capacitor 107 are with a first and a second connection of a primary coil 109 of a first transformer 108 coupled. A first connection of a secondary coil 110 of the first transformer 108 is with the base terminal of a first bipolar transistor 111 coupled. The first transformer 108 has a number of turns ratio between the primary and secondary coils 109 . 110 from 3: 2 to. A second connection of the secondary coil 110 is with a base terminal of a second bipolar transistor 112 coupled. A center tap of the secondary coil 110 is with a first connection of a first ohmic resistor 113 coupled, the second connection to a first reference potential 114 brought. Furthermore, the center tap of the secondary coil 110 with a first connection of a first diode 115 coupled. The second connection of the first diode 115 is with an emitter connection of the first bipolar transistor 111 and with an emitter connection of the second bipolar transistor 112 coupled. The collector connection of the first bipolar transistor 111 is with a first connection of a first auxiliary capacitor 116 coupled, the second connection with a first connection of a second auxiliary capacitor 117 is coupled. The second connection of the second auxiliary capacitor 117 is with the collector terminal of the second bipolar transistor 112 coupled. The second connection of the first diode 115 is at a second electrical reference potential 118 , The second connection of the first auxiliary capacitor 116 and the first terminal of the second auxiliary capacitor 117 are at a third electrical reference potential 119 , The second connection of the first auxiliary capacitor 116 and the first terminal of the second auxiliary capacitor 117 are also with a center tap of a primary coil 121 of a second transformer 120 coupled. The second transformer 120 has a ratio of turns between the primary coil 121 and the secondary coil 122 from 2: 1 to. A center tap of the secondary coil 122 is with a first connection of a second ohmic resistor 123 coupled, the second connection to a fourth electrical reference potential 124 brought. The first connection of the second ohmic resistor 123 is with a first connection of a second diode 125 coupled. A first connection of the secondary turn 122 is with a base terminal of a third bipolar transistor 126 coupled. A second connection of the secondary coil 122 is with a base terminal of a fourth bipolar transistor 127 coupled. A second connection of the second diode 125 is with an emitter connection of the third bipolar transistor 126 and with an emitter connection of the fourth bipolar transistor 127 coupled. Furthermore, the second connection is the diode 125 to a fifth electrical reference potential 128 brought. By means of the collector connections of the third and fourth bipolar transistors 126 . 127 is the amplifier circuit 101 with the LC-Balun output circuit 102 coupled.

An essential part of the LC balun circuit 102 is formed from a first balun inductor 129 , a first balun capacity 130 , a second Balun inductor 131 and a second balun capacity 132 , The collector connection of the third bipolar transistor 126 is with a first connection of the first balun inductor 129 and with a first connection of the first balun capacitance 130 coupled. The second connection of the first balun inductor 129 is with a first connection of the second balun capacitance 132 coupled, the second connection with a first connection of the second balun inductor 131 is coupled. A second connection of the second balun inductor 131 is with a second connection of the first balun capacity 130 coupled. Between the second connection of the second balun capacitance 132 and the first connection of the second balun inductor 131 on the one hand and the first connection of the second balun inductor 132 on the other hand is a choke inductor 133 connected. Furthermore, the second connection of the second balun capacitance 132 and the first terminal of the second balun inductor 131 with the collector terminal of the fourth bipolar transistor 127 coupled. The first port of the second balun capacity 132 and a first connection of a third auxiliary capacitor 136 are at a sixth electrical reference potential 134 , The second connection of the third auxiliary capacitor 136 is at a seventh electrical reference potential 135 , There is also between the second terminals of the first balun capacitance 130 and the second balun inductor 131 one hand and the exit 105 on the other hand, a DC blocking capacity 137 connected. Between the exit 105 and an eighth electrical reference potential 139 is a load resistor 138 connected.

The reference potentials in 1 can be supplied by means of bond pads which couple the chip with the amplifier circuit arrangement to external supply devices.

The main components of the amplifier circuit arrangement 100 are the first transformer 108 as input balun circuit, a driver stage from the first and second bipolar transistors 111 . 112 , the second transformer 120 as an intermediate matching network and the output stage from the third and fourth bipolar transistors 126 . 127 , The driver stage biases from the first and second bipolar transistors 111 . 112 and the output stage from the third and fourth bipolar transistors 126 . 127 are by means of the first and second diodes serving as current mirrors 115 . 125 set.

The effective emitter area of the first and second bipolar transistors 111 . 112 is 40μm ² or for the third and fourth bipolar transistors 126 . 127 100μm ² . The size of the first transformer is 165 × 165μm ² . The primary turn 109 contains three turns. The secondary coil 110 contains two turns. The total coupling coefficient at 5.8GHz is k = 0.7.

The transformers 108 . 120 can be designed as described in [6], ie as planar integrated inductors, the coil axis being oriented perpendicular to the substrate in which the amplifier circuit arrangement is located 100 is integrated.

The main components of the LC Balun output circuit 102 are the first and second Balun inductors 129 . 131 and the first and second balun capacities 130 . 132 , The first ohmic resistance 113 is the "balanced" input impedance of the bridge. The load transistor 138 has a value of 50Ω according to the described embodiment.

The values L _A , L _{B of} the Balun inductors 129 . 131 and the Balun capacities C _A , C _B 130 . 132 are determined according to the following equations: L A = L B = Z 1 / ω1 (1) C A = C B = 1 / (ω 1 Z 1 ) (2) in which: Z 1 = √R 1 R L (3)
Z ₁ is the characteristic impedance of the bridge. ω ₁ = 2πf ₁ is the operating frequency.

At those points in the amplifier circuit arrangement 100 , on which the first to eighth reference potentials are applied, bond wires or bond pads, ie flat connection elements for contacting external electronics, are provided in the implementation. The use of such bond wires leads to a load impedance which has an imaginary value, ie not a purely real value, since a parasitic ohmic, capacitive and inductive impedance is assigned to a bond wire or bond pad. According to the invention, the series circuit is made up of bond wires and the DC blocking capacitance 137 used to get a load with a real value. In other words, the value of the DC blocking capacity 137 (for example, using a simulation tool) determined such that the effective load becomes a real quantity. Knowing the real value of this load, the values of the capacitances and inductances L _A , L _B , C _A , C _B can be calculated from (1), (2).

In addition, impedances of bond wires for the supply of the supply voltages or of leads between the components of the amplifier circuit arrangement can 100 be taken into account.

The inductors 129 . 131 can in turn be planar inductors (ie essentially formed flat on the substrate surface), according to the described embodiment with a size of 150 × 135 μm ² . inductors 129 . 131 each have between 2.7 and 3 turns, preferably 2.75 turns. The width of the conductor tracks of the inductors 129 . 131 are for example 15μm. For example, L _A and L _B can have a value of 1nH.

The capacities 130 . 132 and 137 are preferably designed as MIM capacitors (metal-insulator-metal capacitors). For example, C _A and C _B can have a value of 0.5pF In 2 is a top view 200 of a silicon chip 201 shown in which the in 1 amplifier circuit arrangement shown 100 is integrated monolithically. Corresponding names of the connections in 1 are also in 2 shown. The size of the silicon chip 201 out 2 is 0.9 × 1mm ² . On the edges of the 2 shown silicon chips 201 in which the in 1 Components shown are monolithically integrated, are a variety of external bond connections 202 shown, for supplying the electrical reference potentials or for providing the input signal and output signal of the amplifier circuit arrangement 100 ,

The one used to form the chip 2 The technology used is a 0.25 μm Bi-CMOS technology in accordance with the exemplary embodiment described.

In 3 is a top view of a circuit board 300 shown on which the silicon chip 201 out 2 is applied. Furthermore, in 3 some components for external contacting, i.e. for coupling the bond connections 202 out 2 shown with external components. In particular is a global entrance 301 to provide an input signal and a global output 302 shown to provide an output signal.

The circuit board 300 has a dielectric substrate with ε _r = 3.38 and a dielectric thickness of 0.51mm. Metallization layers are in 3 made of 18μm copper with a nickel diffusion barrier and 5μm gold on the top for bonding. The silicon chip 201 is on the circuit board 300 bonded.

The following will refer to 4 a layout top view 400 the monolithic in a silicon chip 401 integrated amplifier circuit arrangement 100 out 1 described. The reference numerals in 4 correspond to the respective reference symbols in the circuit diagram 1 ,

An amplifier circuit arrangement. the on the layout 400 of 4 based, can with an operating frequency between 5GHz and 6GHz and with with a supply voltage of 2Volt. A small signal gain of 22.5dB and a maximum output power of 20.2dBm can be achieved.

The following will refer to 5 a diagram 500 described on the basis of which the broadband functionality of the amplifier circuit arrangement 100 can be explained.

Along an abscissa 501 is the frequency of an input signal in MHz, along an ordinate 502 is an output power P _OUT in dBm of an output signal of the amplifier circuit arrangement 100 applied. A curve 503 shows the frequency-dependent curve of the output power for a constant input power of 10dBm and a supply voltage Vcc of 2Volt. The output power is almost constant, so that a constant output power is obtained over a wide bandwidth from 4800 MHz to 6000 MHz, which is extremely advantageous for broadband applications.

The following will refer to 6 an LC balun output circuit 600 described according to another embodiment of the invention.

The LC-Balun output circuit 600 differs essentially from that in 1 LC Balun output circuit shown 102 ,

The first aspect concerns the connection of the choke inductance 133 (Choke coil). According to 6 is the choke inductance 133 with a first connection of the second balun inductor 131 with a first connection of the second balun capacitance 132 coupled. In contrast to 1 is however according to 6 a second connection of the choke inductance 133 to the sixth electrical reference potential 134 brought.

Furthermore, in 6 for a plurality of connections ("pads") 601 Equivalent circuit diagrams are shown, each taking into account that each pad 601 a capacitive component and an ohmic component contribute to the impedance (C _SUB , R _SUB ). Furthermore, parasitic inductances of bond wires ("bond wire") 602 or conductor tracks 603 shown. For the coils 133 . 129 . 131 Equivalent circuit diagrams are also shown, which contain ohmic, capacitive and inductive impedance components (cf. 6 ). When dimensioning the amplifier circuit arrangement according to the invention, these parasitic components of pads 601 and bond wires are taken into account according to the invention in order to achieve a desired functionality of the amplifier circuit arrangement or to set a desired operating point. By skillfully choosing the degrees of freedom of the system (in particular by choosing the value of the capacity of the DC blocking capacity 137 or the values L _A , L _B , C _A , C _B , a desired functionality can be set.

In particular, in 6 conductor tracks 603 between the collector connections of the third and fourth bipolar transistors 126 . 127 on the one hand and the Balun capacities 130 . 132 or the Balun inductors 129 . 131 shown on the other hand. Since the amplifier circuit and the LC balun output circuit are implemented on a common chip and thus in a confined space according to the invention, such conductor tracks are 603 kept short, the corresponding parasitic inductances kept small and the usable output power kept large.

It should be noted that the parasitic capacitive and ohmic impedances of the connection pads typically have values of C _SUB = 90fF and R _SUB = 250Ω. The output power at an output 105 of the circuit is typically 0.1W. However, it should be noted that an output power of 0.5W and more is possible. The also in 6 MIM capacitance (metal-insulator-metal) shown is of the order of a few pF, for example 10 pF.

The following are in this document Publications quotes:

• [1] Baltus, P, van Bezooijen, A (2001) "Design Considerations for RF Power Amplifiers demonstrated through a GSM / EDGE Power Amplifier Modules ", AACD2001, Noordwijk, p.1-20, MSM-50 [06.11]
• [2] Raicu, D (1998) "Design of planar, single-layer microwave baluns ", 1998 IEEE MTT International Microwave symposium
• [3] Bakalski, W, Simbürger, W, Kehrer, D, Wohlmuth, HD, Rest, M, Scholtz, AL (2002) "A monolithic 2.45 GHz, 0.56 W Power Amplifier with 45% PAE at 2.4V in standard 25 GHz F _T SI-BIPOLAR ", IEEE International Symposium on Circuits and Systems, IV.803-IV.806
• [4] Bakalski, W, Simbürger, W, Knapp, H, Wohlmuth, HD, Scholz, AL (2002) "Lumped and Distributed Lattice Type LC Baluns", Proceedings of IEEE International Microwave Symposium 2002 (IMS 2002), Seattle, p. 209-211
• [5] DE 199 44 741 A1
• [6] Aoki, I, Kee, SD, Rutledge, D, Hajimiri, A (2001) "A 2.4 GHz, 2.2 W, 2 V Fully Integrated CMOS circular geometry Active Transformer Power Amplifier ", IEEE Custum Integrated Circuits Conference, San Diego
• [7] Aoki, I, Dee, SD, Rutledge, DB, Hajimiri, A (2002) "Fully Integrated CMOS Power Amplifier Design Using the Distributed Active Transformer Architecture "IEEE Journal of Solid-State Circuits, Vol.37, No.3, pp.371-383
• [8] Lee, TH "The Design of CMOS Radio-Frequency Integrated Circuits ", Cambridge University Press, Chapter 2.4.2 "Bondwire inductors "

100

Amplifier circuit arrangement

101

Amplifier circuit

102

LC balun output circuit

103

first entrance

104

second entrance

105

output

106

first Input capacitor

107

second Input capacitor

108

first transformer

109

primary coil

110

secondary coil

111

first bipolar transistor

112

second bipolar transistor

113

first ohmic resistance

114

first electrical reference potential

115

first diode

116

first Auxiliary capacitor

117

second Auxiliary capacitor

118

second electrical reference potential

119

third electrical reference potential

120

second transformer

121

primary coil

122

secondary coil

123

two ohmic resistance

124

fourth electrical reference potential

125

second diode

126

third bipolar transistor

127

fourth bipolar transistor

128

fifth electric reference potential

129

first Balun inductance

130

first Balun capacity

131

second Balun inductance

132

second Balun capacity

133

choke inductor

134

sixth electrical reference potential

135

seventh electrical reference potential

136

third Auxiliary capacitor

137

DC blocking capacitance

138

load resistance

139

eighth electrical reference potential

200

Top view

201

Silicon chip

202

Bond connections

300

circuit board

301

global entrance

302

global output

400

Layout plan view

401

Silicon chip

500

diagram

501

abscissa

502

ordinate

503

curve

600

LC balun output circuit

601

pads

602

Bond wires

603

conductor tracks

Claims (13)

Monolithically integrated amplifier circuit arrangement - with a Amplifier circuit to generate an opposite one at an input of the amplifier circuit arrangement available input signal amplified, at an output of Amplifier circuit arrangement available output signals; - with one with the amplifier circuit and LC-Balun output circuit coupled to the output as Adaptation network for setting a specifiable, at the output the amplifier circuit arrangement applied output resistance. Monolithically integrated amplifier circuit arrangement according to Claim 1, wherein the LC balun output circuitry is a parallel circuit a series connection of a first inductance and a first capacitance and off a series connection of a second capacitance and a second inductance. Monolithically integrated amplifier circuit arrangement according to Claim 2 wherein the LC balun output circuitry avoids DC blocking capacitance a DC component at the output which has DC blocking capacitance between the parallel connection and the output is arranged. Monolithically integrated amplifier circuit arrangement according to Claim 3, wherein the value of the capacitance of the DC blocking capacitance is such is set that the DC blocking capacity is common with at least one parasitic The impedance of the LC balun output circuit is essentially one real output resistance forms. Monolithically integrated amplifier circuit arrangement according to Claim 4, in which at least part of the parasitic impedance of at least one connection pad and / or at least one conductor track the amplifier circuit arrangement is formed is. Monolithically integrated amplifier circuit arrangement according to Claim 4 or 5, wherein the values of the first and the second capacity and the first and second inductors based on the value of the Output resistance are set. Monolithically integrated amplifier circuit arrangement according to one of the claims 2 to 6, with a choke inductance between the input and the parallel connection. Monolithically integrated amplifier circuit arrangement according to Claim 7, in which a first connection of the inductor with a first connection of the first inductor and with a first connection the second capacity is coupled, and in which a second connection of the inductor inductor with a first connection of the second inductor and with a second connection the second capacity is coupled. Monolithically integrated amplifier circuit arrangement according to Claim 7, in which a first connection of the inductor with a first connection of the second inductor and with a first connection the second capacity is coupled, and in which a second connection of the inductor to a electrical reference potential can be brought. Monolithically integrated amplifier circuit arrangement according to one of the claims 1 to 9, set up as a high-frequency power amplifier. Monolithically integrated amplifier circuit arrangement according to one of the claims 1 to 10, set up for operation in a frequency band between 4.8GHz and 6GHz. Monolithically integrated amplifier circuit arrangement according to one of the claims 1 to 11, their expansion in at least two dimensions each smaller than the wavelength one to be reinforced Input signal is. Mobile radio device with a monolithically integrated Amplifier circuit arrangement according to one of claims 1 to 12.