CN2763836Y - Storage capacitance and LCD using same - Google Patents

Storage capacitance and LCD using same Download PDF

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Publication number
CN2763836Y
CN2763836Y CN 200420103130 CN200420103130U CN2763836Y CN 2763836 Y CN2763836 Y CN 2763836Y CN 200420103130 CN200420103130 CN 200420103130 CN 200420103130 U CN200420103130 U CN 200420103130U CN 2763836 Y CN2763836 Y CN 2763836Y
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CN
China
Prior art keywords
capacitance
electrode
capacitance electrode
lcd
memory
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Expired - Lifetime
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CN 200420103130
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Chinese (zh)
Inventor
洪肇逸
陈弘育
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Hongfujin Precision Industry Shenzhen Co Ltd
Innolux Corp
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Hongfujin Precision Industry Shenzhen Co Ltd
Innolux Corp
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Priority to CN 200420103130 priority Critical patent/CN2763836Y/en
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Publication of CN2763836Y publication Critical patent/CN2763836Y/en
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Abstract

The utility model discloses a storage capacitor and an LCD which adopts the storage capacitor. The storage capacitor comprises a first capacitor electrode, a dielectric layer and a second capacitor electrode, wherein the dielectric layer is arranged on the first capacitor electrode; the second capacitor electrode is arranged on the dielectric layer; at least one electrode of the first capacitor electrode and the second capacitor electrode comprises at least one hole. Because of the edge effect of the hole, the storage capacitor has a big capacitance value. Further improvement is carried out by that at least one electrode of the first capacitor electrode and the second capacitor electrode is provided with a plurality of convex blocks which are mutually separated, and because of the edge action of the convex blocks and the transparent action of the gaps among the convex blocks, the capacitance value of the storage capacitor can be increased further. The LCD which adopts the storage capacitor has a big storage capacitance value, and the aperture opening ratio of pixel regions can be increased.

Description

The LCD of memory capacitance and this memory capacitance of employing
[technical field]
The utility model relates to a kind of memory capacitance and adopts the LCD of this memory capacitance.
[background technology]
Adopt the LCD of active matrix array to generally comprise a plurality of pixel region and a plurality of thin film transistor (TFT) (Thin Film Transistor that are arranged on gate line and source electrode line infall that intersect to form mutually by gate line and source electrode line, TFT), wherein, each pixel has a pixel electrode, and this thin film transistor (TFT) is used to control the switch switching of this pixel electrode.
When a signal was loaded into thin film transistor (TFT), pixel region was activated, and signal of video signal is applied on this pixel electrode.For reaching high-quality display effect, be applied to voltage on the pixel electrode and must keep a certain normal value when next signal is received.Yet; usually can leak fast in order to the electric charge of keeping voltage on the pixel electrode; cause the voltage on the pixel electrode to reduce too early; thereby reduce the display effect of LCD, therefore each pixel of LCD uses a memory capacitance to keep the voltage of its pixel electrode to stablize constant in the given time usually.
Seeing also Fig. 1, is a kind of synoptic diagram of a pixel region of prior art LCD.This pixel region 2 comprises pixel electrode 20, source electrode line 23, gate line 28, thin film transistor (TFT) 200 and memory capacitance 27.Source electrode line 23 intersects to form pixel region 2 mutually with gate line 28, and pixel electrode 20 is electrically connected with source electrode line 23 via thin film transistor (TFT) 200, and the switch that this thin film transistor (TFT) 200 is controlled pixel electrode 20 as a switch switches.
Seeing also Fig. 2, is the cut-open view along this memory capacitance 27 of II-II direction shown in Figure 1.This memory capacitance 27 is positioned on the substrate of glass 29, comprises first capacitance electrode (being gate line) 28, is positioned at first insulation course 26 on this substrate of glass 29 and first capacitance electrode 28 and is positioned on first insulation course 26 and is positioned at second capacitance electrode 24 directly over first capacitance electrode 28.Second insulation course 22 is positioned at this second capacitance electrode, 24 tops, and pixel electrode 20 is positioned on second insulation course 22.The subregion that is positioned at these second capacitance electrode, 24 tops on this second insulation course 22 has a connecting hole (not indicating), and pixel electrode 20 forms with second capacitance electrode 24 through this connecting hole and is electrically connected.
As mentioned above, this memory capacitance 27 is equivalent to one and has two plane-parallel electric capacity, and its electric capacity is calculated as follows:
C ST = ϵ · A d - - - ( 1 )
In the formula (1), C STThe capacitance of expression memory capacitance, ε represents to be positioned at the specific inductive capacity of first insulation course 26 of 24 of first capacitance electrode 28 and second capacitance electrodes, A represents the useful area of this first capacitance electrode 28 and second capacitance electrode 24, and d represents the thickness of this first insulation course 26.Therefore, the capacitance C of this memory capacitance 27 27A is directly proportional with useful area, is inversely proportional to thickness d, and during energising, the electric charge of assembling on first capacitance electrode 28 of this memory capacitance 27, second capacitance electrode 24 is q 27
In sum, when the DIELECTRIC CONSTANT of the thickness d and first insulation course 26 is constant, increase the capacitance C of this memory capacitance 27 27Can realize by increasing useful area A.Can make the aperture opening ratio of pixel region 2 reduce but increase useful area A, thereby influence the display effect of LCD.
[utility model content]
For overcoming the defective that memory capacitance capacitance that prior art is used for LCD in increase can reduce the pixel region aperture opening ratio simultaneously, the utility model provide a kind of be used for LCD, have big capacitance and can not reduce the memory capacitance of pixel region aperture opening ratio.
The utility model also provides a kind of LCD that adopts above-mentioned memory capacitance.
The technical scheme that the utility model technical solution problem is adopted is: a kind of memory capacitance is provided, comprise that one first capacitance electrode, is arranged on dielectric layer and on this first capacitance electrode and is arranged on second capacitance electrode on this dielectric layer, wherein comprise at least one hole on one of them at least in this first capacitance electrode and second capacitance electrode.
As further improvement, can also in this first capacitance electrode and second capacitance electrode, on one of them a plurality of projections that are separated from each other be set at least.
Another technical scheme that the utility model technical solution problem is adopted is: a kind of LCD is provided, the one pixel region comprises that a substrate and is arranged on this suprabasil memory capacitance, this memory capacitance comprises that one first capacitance electrode, is arranged on dielectric layer, on this first capacitance electrode and is arranged on second capacitance electrode on this dielectric layer, wherein, comprise at least one hole on one of them at least in this first capacitance electrode and second capacitance electrode.
As further improvement, can also in this first capacitance electrode and second capacitance electrode, on one of them a plurality of projections that are separated from each other be set at least.
Compared with prior art, the beneficial effects of the utility model are: the memory capacitance that the utility model provides, since there is at least one hole on its first capacitance electrode, bigger at the quantity of electric charge of this first capacitance electrode surface aggregation, thus the capacitance of memory capacitance is bigger.That is, equate and use under the situation of dielectric layer of identical material that at the first capacitance electrode area capacitance of the utility model memory capacitance is bigger.Be provided with the memory capacitance of a plurality of projections,, can further increase the capacitance of memory capacitance owing to the edge effect of projection and the printing opacity effect in projection gap.
Equally, adopt the LCD of this memory capacitance, owing to have at least one hole on its first capacitance electrode, bigger at the quantity of electric charge of this first capacitance electrode surface aggregation, thus the capacitance of memory capacitance is bigger.That is, equate and use under the situation of dielectric layer of identical material that at the first capacitance electrode area capacitance of the utility model memory capacitance is bigger.Be provided with the memory capacitance of a plurality of projections,, not only can further increase the capacitance of memory capacitance, can also improve the aperture opening ratio of pixel region, improve the display effect of this LCD owing to the edge effect of projection and the printing opacity effect in projection gap.
[description of drawings]
Fig. 1 is a kind of pixel region synoptic diagram with memory capacitance of prior art LCD.
Fig. 2 is the diagrammatic cross-section of pixel region shown in Figure 1 along the II-II direction.
Fig. 3 is the pixel region synoptic diagram that has memory capacitance in the utility model LCD first embodiment.
Fig. 4 is the diagrammatic cross-section of pixel region shown in Figure 3 along the IV-IV direction.
Fig. 5 is the pixel region synoptic diagram that has memory capacitance in the utility model LCD second embodiment.
Fig. 6 is the pixel region synoptic diagram that has memory capacitance in the utility model LCD the 3rd embodiment.
[embodiment]
The pixel region that has memory capacitance in the utility model LCD first embodiment as shown in Figure 3 and Figure 4.Seeing also Fig. 3, is a pixel region synoptic diagram of the utility model LCD first embodiment.This pixel region 3 comprises pixel electrode 30, source electrode line 33, gate line 38, thin film transistor (TFT) 300 and memory capacitance 37.Source electrode line 33 intersects to form pixel region 3 mutually with gate line 38, and pixel electrode 30 is electrically connected with source electrode line 33 by thin film transistor (TFT) 300, and the switch that this thin film transistor (TFT) 300 is controlled pixel electrode 30 as a switch switches.
Please consult Fig. 4 together, wherein Fig. 4 is the cut-open view along this memory capacitance 37 of IV-IV direction shown in Figure 3.This memory capacitance 37 is positioned on the substrate of glass 39, comprises first capacitance electrode (being gate line) 38, is positioned at first insulation course 36 on this substrate of glass 39 and first capacitance electrode 38 and is positioned on first insulation course 36 and is positioned at second capacitance electrode 34 directly over first capacitance electrode 38.Second insulation course 32 is positioned at this second capacitance electrode, 34 tops, and pixel electrode 30 is positioned on second insulation course 32.The subregion that is positioned at these second capacitance electrode, 34 tops on this second insulation course 32 has a hole (not indicating), and pixel electrode 30 forms with second capacitance electrode 34 through this hole and is electrically connected.
Wherein, this first insulation course 36 is as dielectric layer, and this first capacitance electrode 38 is provided with a plurality of holes 380 in the plane.Because first capacitance electrode 38 has certain thickness, in the curvature of the edge of hole 380 curvature greater than the planar surface that does not have hole fully; And the thickness of first capacitance electrode 38 is little with respect to the thickness difference of first insulation course 36, can not form desirable capacity plate antenna.Compared with prior art, by electrostatics knowledge as can be known, the electric density of hole 380 edges is greater than the electric density on first capacitance electrode, 28 surfaces in the pixel region 2, under first capacitance electrode 38 situation identical with first capacitance electrode, 28 areas, when keeping the magnitude of voltage of memory capacitance 27 and 37 two pole plates identical, the quantities of electric charge of the quantities of electric charge of gathering greater than first capacitance electrode, 28 surfaces are gone up on first capacitance electrode, 38 surfaces.Owing to there is the capacitance equation of capacitor:
C=q/V (2)
In the formula (2), C represents the capacitance of capacitor, and q represents to be positioned at the quantity of electric charge on first capacitance electrode 38 or second capacitance electrode 34, and V represents the voltage between first capacitance electrode 38 and second capacitance electrode 34.According to formula (2), when memory capacitance 27 and 37 when in running order, its two-plate keeps stable fixed value voltage, and promptly V be normal value, and owing to have a plurality of holes 380 on first capacitance electrode 38 of memory capacitance 37, at the quantity of electric charge q of these first capacitance electrode, 37 surface aggregations 37Quantity of electric charge q greater than prior art first capacitance electrode 27 surface aggregations 27, i.e. the capacitance C of memory capacitance 37 37Capacitance C greater than memory capacitance 27 27That is, equate and use under the situation of dielectric layer of identical material that at first capacitance electrode 38 and first capacitance electrode, 28 areas the capacitance of memory capacitance 37 is greater than the capacitance of memory capacitance 27.
In this pixel region 3, also can only on second capacitance electrode 34, a plurality of holes be set, perhaps on first capacitance electrode 38 and second capacitance electrode 34, a plurality of holes are set all, utilize the edge effect of this hole, make the capacitance of memory capacitance 37 increase; Simultaneously, owing to the printing opacity effect of this hole, can also improve the aperture opening ratio of pixel region 3.
Seeing also Fig. 5, is the pixel region synoptic diagram that has memory capacitance in the utility model LCD second embodiment.Be with pixel region 3 differences that have memory capacitance in the first embodiment LCD: in the pixel region 5, second capacitance electrode 54 that constitutes memory capacitance 57 is provided with a plurality of strip projections 502 that are separated from each other, like this, each projection 502 and first capacitance electrode 58 all can constitute a sub-memory capacitance, promptly, memory capacitance 57 is equivalent to the memory capacitance that is formed in parallel by a plurality of sub-memory capacitance, because the existence of the edge effect of the hole on this projection 502 and second capacitance electrode 58 (not indicating) makes that the capacitance of this memory capacitance 57 is bigger than memory capacitance 37; And, because at interval space is arranged between this projection, but transmitted light, thereby also can increase the aperture opening ratio of pixel region 5 simultaneously.
In this pixel region 5, also a plurality of projections that are separated from each other can only be set on first capacitance electrode 58, perhaps on first capacitance electrode 58 and second capacitance electrode 54, a plurality of projections are set all, can effectively increase the capacitance of memory capacitance 57 equally, improve the aperture opening ratio of pixel region 5 simultaneously.
Seeing also Fig. 6, is the synoptic diagram that has the pixel region of memory capacitance in the utility model LCD the 3rd embodiment.Be with pixel region 5 differences that have memory capacitance in the second embodiment LCD: in this pixel region 6, also comprise a plurality of holes 602 on second capacitance electrode 64 of formation memory capacitance 67.Owing to the edge effect of this hole 602, can effectively increase the capacitance of memory capacitance 67.
Wherein, described first capacitance electrode can be single layer structure, double-decker or three-decker.If described first capacitance electrode is a single layer structure, it can adopt conductive materials such as aluminium, chromium, Nb-Al alloy, molybdenum and tungsten alloy or molybdenum niobium alloy to make; If described first capacitance electrode is a double-decker, its double-deck material can adopt following combination of materials: molybdenum/neodymium aluminium alloy or neodymium aluminium alloy/chromium; If described first capacitance electrode is a three-decker, its material of three layers can adopt following combination of materials: titanium/aluminium/titanium or molybdenum/aluminium/molybdenum.In addition, above-mentioned aluminium alloy replaces as all available aluminium such as neodymium aluminium alloy, Nb-Al alloy.The structure of described second capacitance electrode and material are selected with described first capacitance electrode roughly the same, and difference is: when described second capacitance electrode was double-decker, the material of its bilayer can adopt following combination of materials: aluminium/chromium or aluminium/titanium.
In addition, described second capacitance electrode and pixel electrode also can adopt tin indium oxide (IndiumTin Oxide, ITO) or indium zinc oxide (In dium Zinc Oxide, IZO) etc. transparent conductive material is made, first insulation course and second insulation course can adopt silicon nitride, monox, phenylpropyl alcohol cyclobutane (Benzocyclobutene) or acryl materials such as (Acryl) to make, and described projection can also be trapezoidal projection or triangular bump.

Claims (6)

1. memory capacitance, comprise that one first capacitance electrode, is arranged on dielectric layer and on this first capacitance electrode and is arranged on second capacitance electrode on this dielectric layer, it is characterized in that: comprise at least one hole on one of them at least in this first capacitance electrode and second capacitance electrode.
2. memory capacitance as claimed in claim 1 is characterized in that: one of them is provided with a plurality of projections that are separated from each other at least in this first capacitance electrode and second capacitance electrode.
3. memory capacitance as claimed in claim 2 is characterized in that: this projection is at least a in following three kinds of projections: rectangle projection, trapezoidal projection and triangular bump.
4. LCD, the one pixel region comprises that a substrate and is arranged on this suprabasil memory capacitance, this memory capacitance comprises that one first capacitance electrode, is arranged on dielectric layer, on this first capacitance electrode and is arranged on second capacitance electrode on this dielectric layer, it is characterized in that: comprise at least one hole on one of them at least in this first capacitance electrode and second capacitance electrode.
5. LCD as claimed in claim 4 is characterized in that: one of them is provided with a plurality of projections that are separated from each other at least in this first capacitance electrode and second capacitance electrode.
6. LCD as claimed in claim 5 is characterized in that: this projection is at least a in following three kinds of projections: rectangle projection, trapezoidal projection and triangular bump.
CN 200420103130 2004-12-16 2004-12-16 Storage capacitance and LCD using same Expired - Lifetime CN2763836Y (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100383648C (en) * 2004-11-24 2008-04-23 鸿富锦精密工业(深圳)有限公司 Storage capacitor and liquid crystal display using said storage capacitor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100383648C (en) * 2004-11-24 2008-04-23 鸿富锦精密工业(深圳)有限公司 Storage capacitor and liquid crystal display using said storage capacitor

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GR01 Patent grant
AV01 Patent right actively abandoned

Effective date of abandoning: 20080423

AV01 Patent right actively abandoned

Effective date of abandoning: 20080423

C25 Abandonment of patent right or utility model to avoid double patenting