CN2033144U

CN2033144U - Overspeed warning and recording device for automotive vehicle

Info

Publication number: CN2033144U
Application number: CN 88219721
Authority: CN
Inventors: 汲波; 周建军; 孙迎光
Original assignee: Individual
Current assignee: Individual
Priority date: 1988-06-02
Filing date: 1988-06-02
Publication date: 1989-02-22

Abstract

The utility model relates to an over-speed warning and recording device for automotive vehicle device, which is used for warning and recording the traffic-breaking and over-speeding automotive vehicles. The device is characterized in that the device is provided with an over-speed record circuit on the basis of the over-speed warner; the circuit comprises a delayer, an inverter, an and circuit, an analog switch and a calculator. The utility model has the advantages of simple device, high reliability, less power consumption and safety assurance and the utility model is helpful for the check of the traffic management and can reduce traffic accident.

Description

Overspeed warning and recording device for automotive vehicle

The utility model relates in highway traffic safety management, a kind ofly is used for warning, and the device that exeeds the regulation speed of logging machine motor-car.

Because the increase of motor vehicles, the incidence of highway traffic accident improves year by year.The reason of most of traffic accident is to cause owing to road speed is too fast, therefore manages, controls the speed of a motor vehicle effectively, just can significantly reduce the generation of traffic accident.For this reason, in disclosed patented claim and on the publication, many automobile overspeed alarms are arranged, these overspeed warning devices when all being hypervelocity, send police whistle sound, remind the driver to slow down.Have also can give a warning after, the driver is not slowed down, automatic shutdown circuit forces its parking.These can effectively be controlled and drive over the speed limit.But these overspeed warning devices all can not carry out record to the hypervelocity behavior, are unfavorable for the inspection management of vehicle superintendent office.

Task of the present utility model be manufacture and design a kind of in vehicle ', phenomenon can be alarmed to the driver at any time if any exeeding the regulation speed, and the hypervelocity behavior of untimely deceleration shown, notes, so that managerial personnel, in each security check point or pipe car personnel when returning the vehicle to the garage and knock off, checking, verifying this car hypervelocity behavior in a few days.

The task that the utility model proposed is to realize like this, promptly installed the hypervelocity writing circuit additional on known basis with automobile overspeed alarm that tachometer circuit, speed limit initialization circuit and overspeed alarming circuit constituted, used register is a kind of counter of cheapness in this circuit.Its concrete structure can be given to describe in detail with reference to accompanying drawing.

Accompanying drawing is an electrical schematic diagram of the present utility model.

Among the figure, the 1st, tachometer circuit, the 2nd, speed limit initialization circuit, the 3rd, overspeed alarming circuit, the 4th, hypervelocity writing circuit, the 5th, hypervelocity record purge circuit.In addition, 7 among the figure, 8, the 9th, the numerical key of counter, AC are reset keys.

The principle of work of circuit is as follows:

M in the tachometer circuit 1 is a speed pickup, is connected with engine.M produces different voltage along with the difference of the speed of a motor vehicle.The voltage that M produces send the end of oppisite phase of comparer A1-1 after D1-1, R1-1, C1-1, C1-2, RW1 rectifying and wave-filtering dividing potential drop.The reference voltage that the homophase termination speed limit initialization circuit of A1-1 is sent here.Two voltages compare, if when the voltage of tachometer circuit is higher than the voltage that the speed limit initialization circuit sends here, the output terminal of A1-1 becomes low level by high level, and chimes of doom is sent in 3 work of overspeed alarming circuit.The output terminal of A1-1 links to each other with 2,4 ends of chronotron U4 simultaneously, after linking to each other, 6,7 ends join with the positive pole of electrochemical capacitor C4-1 and the end of resistance R 4-1, and the minus earth of C4-1,8 ends of another termination U4 of R4-1 also are connected with power supply VCC.3 ends of U4 and the input end of phase inverter A4-1 join.When the time-delay certain hour, when still being in overspeed condition, 3 end output low levels convert the positive logic level to through phase inverter A4-1, and are added to the input end of AND circuit Y1～Y3.When if the wherein a certain input end of Y1～Y3 also is high level (a set level in the speed limit initialization circuit, for example: if speed limit is 70, then 7 of U2 is high level), the output high level, and make the analog switch closure that is connected with this AND circuit.

Because the numerical key (7,8,9) that K4-1～K4-3 connects counter respectively therefore, when switch closure wherein, a corresponding digital will be presented on the display screen of counter.

For example, be 70 kilometers/hour when setting speed limit, promptly 7 is that high level exceeded the speed limit 2 minutes continuously, just shows one 7 word on the counter display screen, and keeps.Just write down one 7 word if take place again once to exceed the speed limit again on the phenomenon display screen.If counter uses 8 cheap common counters in position, can write down the phenomenon of overtaking other vehicles altogether 8 times.

Numeral on the counter display screen keeps always, treats that managerial personnel check.

Fall for the record purge of naming a person for a particular job the same day, can utilize common electronic watch to finish at midnight 12.The monumented point in afternoon is arranged on the display screen of common electrical sublist, and this point disappears when arrive 12 of midnights, and after point disappeared, the driving pulse of point also just disappeared.This phenomenon is used for producing a pulse that connects counter AC key, makes the counter zero clearing.

Particular circuit configurations can give to describe in detail with reference to 5 in the accompanying drawing, electronic watch monumented point in afternoon signal wire connects the input end of phase inverter A5-1, the positive pole of the output terminating diode D5-1 of A5-1, the negative pole of D5-1 connects the positive pole of electrochemical capacitor C5-1, the end of while connecting resistance R5-1, connect the input end of phase inverter A5-2 again, A5-3 and A5-2 series connection, the output terminal of A5-3 is by capacitor C 5-2 and resistance R 5-2, R5-3 links to each other, the end of oppisite phase of another termination comparer A5-4 of R5-3, its in-phase end connects the intermediate point of potentiometer RW5-1 by resistance R 5-4, the anodal VCC of the termination power of RW5-1, other end ground connection.The output termination analog switch K5-1 of A5-4, the two-end-point of the output termination counter AC key of K5-1.

Its principle of work is:

The monumented point signal is drawn after A5-1 amplifies, the D5-1 rectification, and C5-1 is filtered into a positive direct-current level, charges to C5-2 after phase inverter A5-2, A5-3 processing and amplifying again.When some blackout, the output terminal of A5-3 transfers low level suddenly to, and make C5-2 export a negative skip signal, be transformed into a high level pulse through comparer A5-4 again, this pulse makes analog switch K5-1 closure once, because of K5-1 connects the AC key of counter, so the numeral on the counter display screen was eliminated, in order to work in second day.

Employed chronotron U4 can adopt LM555 in the middle of the utility model, phase inverter A4-1, A5-1, A5-2, A5-3 can adopt CC4069, comparer A5-4 can adopt LM324, and AND circuit Y1～Y3 can adopt CC4081, and analog switch K4-1, K4-2, K4-3 can adopt CC4066.

Because the utility model has increased the hypervelocity recording section, helps the inspection of administrative authority, and impels the driver to abide by chapter and travel.This device is with drive over the speed limit number of times and utilize electronic watch to control a zero clearing in per 24 hours of electronic calculator displayed record whole day, thus the utility model also have simple in structure, reliable operation, advantage such as power consumption is little.

Claims

1, a kind of tachometer circuit (1) that includes, speed limit initialization circuit (2), the automobile overspeed alarm logging device that overspeed alarming circuit (3) is constituted, it is characterized in that the input end of said overspeed alarming circuit (3) and connect hypervelocity writing circuit (4), this hypervelocity writing circuit (4) is by chronotron U4, phase inverter A4-1, A5-1, A5-2, A5-3, comparer A5-4, AND circuit Y1-Y3, analog switch K4-1, K4-2, K4-3 and counter are barricaded as, 2 of chronotron U4, the output terminal that 4 ends connect the comparer A1-1 in back and the tachometer circuit (1) is connected, 6, after connecting, 7 ends connect the positive pole of electrochemical capacitor C4-1, and and the end of resistance R 4-1 join, the minus earth of C4-1,8 ends of another termination U4 of R4-1 also are connected with power supply VCC, 3 ends of U4 and the input end of phase inverter A4-1 join, the input end of the output termination AND circuit Y1-Y3 of A4-1, another input end of Y1-Y3 is connected with each limit value circuit in the speed limit initialization circuit (2) respectively, the output terminal of Y1-Y3 meets analog switch K4-1 respectively, K4-2, the input end of K4-3, K4-1, K4-2, two output terminals of K4-3 are connected on the two ends of counter corresponding digital key respectively.

2, according to the said automobile overspeed alarm logging of claim 1 device, it is characterized in that the reset key AC in the said counter is connected with a hypervelocity record purge circuit (5), this circuit is by electronic watch, phase inverter A5-1, A5-2, A5-3, comparer A5-4, analog switch K5-1 is barricaded as, electronic watch monumented point in afternoon signal wire connects the input end of phase inverter A5-1, the positive pole of the output terminating diode D5-1 of A5-1, the negative pole of D5-1 connects the positive pole of electrochemical capacitor C5-1, the end of while connecting resistance R5-1, connect the input end of phase inverter A5-2 again, A5-3 and A5-2 polyphone, the output terminal of A5-3 is by electrolysis C5-2 and resistance R 5-2, R5-3 links to each other, the end of oppisite phase of another termination comparer A5-4 of R5-3, its in-phase end connects the intermediate point of potentiometer RW5-1 by resistance R 5-4, the anodal VCC of the termination power of RW5-1, other end ground connection, the output termination analog switch K5-1 of A5-4, the two-end-point of the output termination counter AC key of K5-1.