CN117272122A

CN117272122A - Wafer anomaly commonality analysis method and device, readable storage medium and terminal

Info

Publication number: CN117272122A
Application number: CN202311559707.1A
Authority: CN
Inventors: 请求不公布姓名
Original assignee: Advanced Manufacturing EDA Co Ltd
Current assignee: Advanced Manufacturing EDA Co Ltd
Priority date: 2023-11-20
Filing date: 2023-11-20
Publication date: 2023-12-22
Anticipated expiration: 2043-11-20
Also published as: CN117272122B

Abstract

A commonality analysis method and device for wafer abnormality, readable storage medium and terminal, the method includes: traversing each dimension to be analyzed, under any dimension to be analyzed, if a single object to be analyzed produces abnormal wafers exceeding a first preset proportion and the number of the wafers produced by the object to be analyzed does not exceed a second preset proportion of the total number of the wafers, assigning the classification common modulation coefficient of the dimension to be analyzed as a first value, otherwise assigning the classification common modulation coefficient of the dimension to be analyzed as a second value, wherein the first value is larger than the second value; determining the difference value of each dimension to be analyzed; and determining a commonality analysis coefficient according to the classified commonality modulation coefficient and the difference value of each dimension to be analyzed so as to determine a commonality analysis result. The invention can obtain more comprehensive analysis results of commonality, effectively improve the accuracy of sequencing and improve the subsequent investigation efficiency.

Description

Wafer anomaly commonality analysis method and device, readable storage medium and terminal

Technical Field

The present invention relates to the field of semiconductor technologies, and in particular, to a method and apparatus for analyzing commonality of wafer anomalies, a readable storage medium, and a terminal.

Background

The wafer manufacturing process includes thousands of process steps, and problems with low yields, high defects, or abnormal wafer test parameters may occur with any one step.

In failure analysis, it is required to find out whether there is commonality between batches or wafers with low yield, high defects or abnormal test parameters by various classification commonality analysis methods, for example, manufactured by a common execution machine (equivalent), a common execution chamber (chamber), a common program recipe (recipe) or the like, so as to adjust and improve the execution machine, the execution chamber or the program recipe which is determined to be problematic.

However, the existing commonality analysis method is poor in accuracy.

Disclosure of Invention

The invention solves the technical problem of providing a commonality analysis method and device for wafer abnormality, and a readable storage medium and a terminal, so that a more comprehensive commonality analysis result can be obtained, the sequencing accuracy is effectively improved, and the subsequent investigation efficiency is improved.

In order to solve the above technical problems, an embodiment of the present invention provides a method for analyzing commonality of wafer anomalies, including: traversing each dimension to be analyzed, under any dimension to be analyzed, if a single object to be analyzed produces abnormal wafers exceeding a first preset proportion and the number of the wafers produced by the object to be analyzed does not exceed a second preset proportion of the total number of the wafers, assigning a first value to the classification common modulation coefficient of the dimension to be analyzed, otherwise assigning a second value to the classification common modulation coefficient of the dimension to be analyzed, wherein the first value is larger than the second value, and the abnormal wafers are part of the wafers with the largest degree of abnormality extracted from a plurality of wafers; determining the difference value of each dimension to be analyzed; and determining a commonality analysis coefficient according to the classified commonality modulation coefficient and the difference value of each dimension to be analyzed so as to determine a commonality analysis result.

Optionally, determining the commonality analysis coefficient according to the classification commonality modulation coefficient and the difference value of each dimension to be analyzed includes: normalizing the difference values of all the dimensions to be analyzed to obtain normalized difference values of all the dimensions to be analyzed; and determining a commonality analysis coefficient according to the classified commonality modulation coefficient and the normalized difference value of each dimension to be analyzed.

Optionally, normalizing the difference value of each dimension to be analyzed to obtain a normalized difference value of each dimension to be analyzed, including: determining the maximum difference value in all dimensions to be analyzed; and taking the quotient of the difference value of each dimension to be analyzed and the maximum difference value as the normalized difference value of the dimension to be analyzed.

Optionally, determining the commonality analysis coefficient according to the classification commonality modulation coefficient and the normalized difference value of each dimension to be analyzed includes: for each dimension to be analyzed, determining the sum and the product of the classification commonality modulation coefficient and the normalized difference value of the dimension to be analyzed; and adopting a difference value obtained by subtracting the product from the sum value as a commonality analysis coefficient of the dimension to be analyzed.

Optionally, the step of determining the abnormal wafer includes: sequencing the test values in a plurality of wafers, and extracting the wafers with preset proportions, which are most forward in sequence, as abnormal wafers; or, in a plurality of wafers, acquiring the wafer with the test value exceeding the preset threshold range as an abnormal wafer; the test value is a numerical value of a preset target test item of the wafer.

Optionally, the first preset ratio is selected from: 80% to 95%, and/or the second preset ratio is selected from: 70% to 80%.

Optionally, the different dimensions to be analyzed have respective first and second preset proportions; the larger the number of the objects to be analyzed contained in the dimension to be analyzed is, the larger the first preset proportion is, and the smaller the second preset proportion is.

Optionally, the step of determining the dimension to be analyzed includes: determining the process steps of the wafer to be analyzed; determining the current dimension to be analyzed of the wafer based on the process step to be analyzed; wherein each process step to be analyzed can comprise a plurality of said dimensions to be analyzed.

Optionally, each dimension to be analyzed has a predetermined abnormality degree predetermined value, and the dimensions to be analyzed of the same category among different process steps have the same abnormality degree predetermined value; the greater the anomaly degree pre-judging value is, the greater the first numerical value of the dimension to be analyzed of the category is.

Optionally, each process step to be analyzed comprises a class of dimensions to be analyzed selected from: program formula, execution machine and execution chamber; wherein the dimension to be analyzed is classified into a program formula, and the object to be analyzed under the program formula is the program formula of each process step; the dimension to be analyzed is classified into an execution machine, and the object to be analyzed under the execution machine is the execution machine of each process step; the dimension to be analyzed is classified into an execution chamber, and the object to be analyzed under the execution chamber is the execution chamber of each process step.

Optionally, the determining the difference value of each dimension to be analyzed includes: for a target analysis dimension, determining an inter-group square sum and an intra-group square sum based on test values of wafers under a preset target test item, wherein the inter-group square sum is used for representing an error square sum of a test value average value of wafers of each object to be analyzed and a test value total average value of all wafers in the dimension to be analyzed, and the intra-group square sum is used for representing an error square sum of a test value average value of each wafer of each object to be analyzed and a test value average value of wafers of the object to be analyzed in the dimension to be analyzed; and for each dimension to be analyzed, taking the sum of squares between groups and the quotient of the sum of squares in the groups and the quotient of the adjustment coefficient as the difference value of the dimension to be analyzed, wherein the adjustment coefficient is the quotient of the difference value of subtracting 1 from the number of objects to be analyzed of the dimension to be analyzed and the difference value of the number of wafers of the dimension to be analyzed and the number of objects to be analyzed.

Optionally, one or more of the following is satisfied: the sum of squares between groups for each dimension to be analyzed is determined using the following formula:

；

wherein i is used for representing the ith object to be analyzed of the dimension to be analyzed, Mean value of test values for individual wafers representing the ith object to be analyzed, +.>Mean value of test values for all wafers representing the dimension to be analyzed, n _i The number of wafers used for representing the ith object to be analyzed, and k is used for representing the number of objects to be analyzed of the dimension to be analyzed; the sum of squares within the group for each dimension to be analyzed is determined using the following formula:

；

wherein i is the ith object to be analyzed representing the dimension to be analyzed, j is the jth wafer representing the ith object to be analyzed, x _ij A test value for a j-th wafer representing an i-th object to be analyzed,mean value of test values of each wafer for representing the ith object to be analyzed, n _i The number of wafers used for representing the ith object to be analyzed, and k is used for representing the number of objects to be analyzed of the dimension to be analyzed; the difference value of each dimension to be analyzed is determined using the following formula:

；

wherein SSA is used to represent the sum of squares between groups of the dimension to be analyzed, SSE is used to represent the sum of squares within groups of the dimension to be analyzed, n is used to represent the number of wafers of the dimension to be analyzed, and k is used to represent the number of objects to be analyzed of the dimension to be analyzed.

In order to solve the above technical problems, an embodiment of the present invention provides a commonality analysis device for wafer anomalies, including: the evaluation module is used for traversing each dimension to be analyzed, under any dimension to be analyzed, if a single object to be analyzed produces abnormal wafers exceeding a first preset proportion and the number of the wafers produced by the object to be analyzed does not exceed a second preset proportion of the total number of the wafers, assigning the classification common modulation coefficient of the dimension to be analyzed as a first value, otherwise assigning the classification common modulation coefficient of the dimension to be analyzed as a second value, wherein the first value is larger than the second value, and the abnormal wafers are part of the wafers with the largest degree of abnormality in a plurality of wafers; the difference value determining module is used for determining the difference value of each dimension to be analyzed; and the result determining module is used for determining the commonality analysis coefficient according to the classified commonality modulation coefficient and the difference value of each dimension to be analyzed so as to determine the commonality analysis result.

To solve the above-mentioned technical problem, an embodiment of the present invention provides a readable storage medium having a computer program stored thereon, where the computer program when executed by a processor performs the steps of the above-mentioned method for analyzing commonality of wafer anomalies.

In order to solve the above technical problems, an embodiment of the present invention provides a terminal, including a memory and a processor, where the memory stores a computer program capable of running on the processor, and the processor executes the steps of the above method for analyzing commonality of wafer anomalies when running the computer program.

Compared with the prior art, the technical scheme of the embodiment of the invention has the following beneficial effects:

in the embodiment of the invention, a part of the wafer with the largest degree of abnormality is extracted from a plurality of wafers to serve as the abnormal wafer, so that the wafer can be focused on the abnormal wafer to a greater degree in the process of commonality analysis, and the data interference of the normal wafer is reduced; by analyzing the situation that each object to be analyzed produces an abnormal wafer in each dimension to be analyzed, determining that a single object to be analyzed produces an abnormal wafer exceeding a first preset proportion, compared with the situation that only a small number of wafers are produced but the difference index is high, the abnormal wafer is mistakenly identified as a root factor, the dimension (such as a machine, a chamber, a program and the like for truly producing the abnormal wafer) of the abnormal wafer can be selected by selecting the ratio exceeding the first preset proportion; the number of the wafers manufactured by the object to be analyzed does not exceed the second preset proportion of the total number of the wafers, so that the situation that the abnormal proportion is high when most of the wafers are manufactured in a single dimension can be eliminated, and misjudgment caused by the fact that most of the wafers are manufactured in the current process step is avoided; the importance of the dimension to be analyzed which simultaneously satisfies the two conditions can be effectively improved by assigning a larger first value to the dimension to be analyzed which simultaneously satisfies the two conditions, or assigning a smaller second value to the dimension to be analyzed, so that the ranking of the dimension to be analyzed is higher and is easier to be found in a detailed investigation stage in the process of subsequently determining the commonality analysis result; compared with the prior art that the commonality analysis result is determined according to a single parameter, the method has the advantages that the classified commonality modulation coefficient obtained after assignment and the difference value obtained through a difference analysis algorithm can be combined to obtain a more comprehensive commonality analysis result, the sequencing accuracy is effectively improved, and the follow-up investigation efficiency is improved.

Further, the normalized difference value of each dimension to be analyzed is obtained by carrying out normalization processing on the difference value of each dimension to be analyzed, the commonality analysis coefficient is determined according to the classified commonality modulation coefficient and the normalized difference value of each dimension to be analyzed, and the normalized difference value can be adjusted to be a value between 0 and 1 through normalization processing, so that the importance of the two parameters can be adjusted, and the comprehensiveness and the accuracy of analysis are further improved.

Further, the different dimensions to be analyzed have respective first and second preset proportions; the larger the number of the objects to be analyzed contained in the dimension to be analyzed is, the larger the first preset proportion is, and the smaller the second preset proportion is, so that under the condition that the objects to be analyzed are more, the more needs to be avoided that each object to be analyzed is normal (namely, the current dimension to be analyzed is not a root factor at all) but misjudges that one of the objects to be analyzed is a sub-root factor, at the moment, the first preset proportion is set to be larger in the existing range, so that the dimension with fewer abnormal wafers manufactured can be eliminated, and only the dimension with the abnormal wafers actually manufactured is reserved; by setting the second preset proportion to be smaller in the existing range, under the condition that the dimension to be analyzed currently has more objects to be analyzed and the dispersibility is larger, the dimension of most wafers is eliminated to further reduce misjudgment, so that the dimension which possibly has abnormality is more effectively screened to be assigned to a larger first value, and the accuracy of analysis is further improved. Further, determining a process step of the wafer to be analyzed; determining the current dimension to be analyzed of the wafer based on the process step to be analyzed; each process step to be analyzed can include a plurality of dimensions to be analyzed, for example, the category of the dimensions to be analyzed can be selected from a program formula, an execution machine, an execution chamber and the like, so that the dimensions to be analyzed with more pertinence can be obtained by determining part or all of the process steps.

Further, each dimension to be analyzed has a predetermined abnormality degree predetermined value, and the dimensions to be analyzed of the same category among different process steps have the same abnormality degree predetermined value; the greater the anomaly degree pre-judging value is, the greater the first numerical value of the dimension to be analyzed of the category is. By adopting the scheme, a part of the multiple dimensions to be analyzed can be subjected to emphasis analysis, and the importance of the dimension which is predicted to be more abnormal is increased, so that the ranking of the dimension to be analyzed is higher in front in the subsequent process of determining the commonality analysis result, and the subsequent investigation efficiency is further improved.

Further, for the target analysis dimensions, based on the test value of the wafer, the inter-group square sum and the intra-group square sum are determined, and for each dimension to be analyzed, the inter-group square sum, the quotient of the intra-group square sum and the quotient of the adjustment coefficient are adopted as the difference value of the dimension to be analyzed, so that the inter-group operation and the intra-group operation of each object to be analyzed in each dimension to be analyzed can be utilized, the analysis granularity of the difference between each object to be analyzed in each dimension to be analyzed is reduced, and the accuracy and the comprehensiveness of determining the difference value are further improved.

Drawings

FIG. 1 is a schematic diagram of a machine commonality analysis result in the prior art;

FIG. 2 is a flow chart of a method for commonality analysis of wafer anomalies in accordance with an embodiment of the present invention;

FIG. 3 is a flow chart of one embodiment of step S22 of FIG. 2;

fig. 4 is a schematic structural diagram of a commonality analysis apparatus for wafer anomalies in an embodiment of the present invention.

Detailed Description

In the prior art, when performing failure analysis, it is required to find out whether there is commonality among lots or wafers with low yield, high defects or abnormal test parameters by various classification commonality analysis methods, for example, manufactured by a common execution machine, a common execution chamber, a common program recipe, etc., so as to adjust and improve the execution machine, the execution chamber or the program recipe which is determined to be problematic. However, the existing commonality analysis method is poor in accuracy.

Referring to fig. 1, fig. 1 is a schematic diagram of a machine commonality analysis result in the prior art.

As shown in fig. 1, a box diagram (Box and Whisker Chart) is used to list the analysis results of commonalities of the machines 1 to 4, where the analysis results of commonalities may include the number n of manufactured wafers and an average avg of the numerical values of the difference indexes of each machine, and may also intuitively display the distribution situation of the difference indexes of each wafer.

The value of the difference index may be determined according to suitable parameters, such as wafer yield, defect parameters, or test parameters.

Further, the value of the difference index may be calculated by using a suitable classification commonality method.

However, it is found through researches that the commonality analysis result shown in fig. 1 only considers the difference index and the distribution thereof, and the misjudgment is high because of the too single parameters, and especially when each machine is normal (i.e. no root cause machine) in a certain process step, one of the machines is easy to misjudge as the root cause machine.

For example, the wafer manufactured by the machine 4 has a higher overall index of difference than the machine 1 to the machine 3, and is very easy to be determined as the root machine.

However, the stage 4 produces only 44 wafers, which is far less than the wafers produced by the stages 1 to 3, and the stage 4 produces only a part of the abnormal wafers.

In addition, since the tools 2 and 3 also produce a large number of abnormal wafers, considering that three tools are less likely to be problematic at the same time (i.e., three tools are root tools), it can be determined that the current process step has no root tools in fact. In other words, with the classification commonality method in the prior art, erroneous judgment is liable to occur.

In order to make the above objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.

Referring to fig. 2, fig. 2 is a flowchart of a method for analyzing commonality of wafer anomalies in accordance with an embodiment of the present invention. The steps of the wafer abnormality commonality analysis method may include steps S21 to S23:

step S21: traversing each dimension to be analyzed, under any dimension to be analyzed, if a single object to be analyzed produces abnormal wafers exceeding a first preset proportion and the number of the wafers produced by the object to be analyzed does not exceed a second preset proportion of the total number of the wafers, assigning a first value to the classification common modulation coefficient of the dimension to be analyzed, otherwise assigning a second value to the classification common modulation coefficient of the dimension to be analyzed, wherein the first value is larger than the second value, and the abnormal wafers are part of the wafers with the largest degree of abnormality extracted from a plurality of wafers;

step S22: determining the difference value of each dimension to be analyzed;

step S23: and determining a commonality analysis coefficient according to the classified commonality modulation coefficient and the difference value of each dimension to be analyzed so as to determine a commonality analysis result.

In step S21, the method for analyzing the commonality of wafer anomalies may be applied to a chip failure analysis scenario. The commonality analysis method may be performed by a device performing or assisting in the testing, such as may be performed by an automated testing device (Automatic Test Equipment, ATE) or a computing device coupled locally or remotely to the ATE.

Wherein, the dimension to be analyzed can be used for representing suspected abnormal factors, and each dimension to be analyzed can comprise one or more objects to be analyzed. One or more root factors may be present in the plurality of dimensions to be analyzed, and one or more child root factors may also be present under each root factor.

Taking the box diagram shown in fig. 1 as an example, the dimension to be analyzed is a certain execution machine, and the box diagram includes 4 objects to be analyzed: the machine 1 to the machine 4 may be the root cause, one or more sub-root cause may exist in the machine 1 to the machine 4, or the machine may not be the root cause.

Further, the step of determining the dimension to be analyzed may comprise: determining the process steps of the wafer to be analyzed; determining the current dimension to be analyzed of the wafer based on the process step to be analyzed; wherein each process step to be analyzed can comprise a plurality of said dimensions to be analyzed.

In the embodiment of the invention, the wafer is manufactured by adopting a plurality of process steps, each process step to be analyzed can comprise a plurality of dimensions to be analyzed, for example, the category of the dimensions to be analyzed can be selected from a program formula, an execution machine, an execution chamber and the like, so that the more targeted dimensions to be analyzed can be obtained by determining part or all of the process steps.

Further, each process step to be analyzed comprises a class of dimensions to be analyzed selected from: program formula, execution machine and execution chamber; wherein the dimension to be analyzed is classified into a program formula, and the object to be analyzed under the program formula is the program formula of each process step; the dimension to be analyzed is classified into an execution machine, and the object to be analyzed under the execution machine is the execution machine of each process step; the dimension to be analyzed is classified into an execution chamber, and the object to be analyzed under the execution chamber is the execution chamber of each process step.

In a specific implementation manner of the embodiment of the present invention, the type of the dimension to be analyzed may be an execution machine, the process step to be analyzed may be a selected part or all of the process steps, and in the selected part or all of the process steps, the object to be analyzed may be an execution machine for executing each process step, and accordingly, whether most of the wafers passing through a certain wafer manufacturing machine have anomalies may be analyzed by adopting a commonality analysis method, so as to adjust and improve the machine. It is understood that the respective dependencies of different wafer fabrication chambers/recipes for the same process step may not be considered at this time.

In another specific implementation manner of the embodiment of the present invention, the type of the dimension to be analyzed may be an execution chamber, the process step to be analyzed may be a selected part or all of the process steps, and in the selected part or all of the process steps, the object to be analyzed may be an execution chamber for executing each process step, and accordingly, whether a majority of wafers passing through a certain chamber of a certain wafer manufacturing machine have an abnormality may be analyzed by adopting a common analysis method, so as to adjust and improve the chamber. It is understood that the respective dependencies of different wafer fabrication chambers/recipes for the same process step may not be considered at this time.

In another specific implementation of the embodiment of the present invention, the type of the dimension to be analyzed may be a recipe, the process step to be analyzed may be a selected part or all of the process steps, and in the selected part or all of the process steps, the object to be analyzed may be a recipe for executing each process step, and accordingly, whether a majority of wafers adopting a certain recipe have anomalies may be analyzed by adopting a commonality analysis method, so as to adjust and improve the recipe. It is understood that the respective correlations of different wafer fabrication tools/chambers of the same process step may not be considered at this time.

Further, by extracting a part of the wafers with the largest degree of abnormality from the plurality of wafers as the abnormal wafers, the abnormal wafers can be focused to a greater degree in the process of the commonality analysis, and the data interference of the normal wafers is reduced.

The part of wafers with the largest degree of abnormality is used for indicating the part of wafers which are arranged from large to small and are arranged at the front, for example, the wafers with preset proportion or the wafers with preset quantity or the wafers with the uncertain quantity or proportion which meet the preset condition.

Further, the step of determining the abnormal wafer includes: sequencing the test values in a plurality of wafers, and extracting the wafers with preset proportions, which are most forward in sequence, as abnormal wafers; or, in a plurality of wafers, acquiring the wafer with the test value exceeding the preset threshold range as an abnormal wafer; the test value is a numerical value of a preset target test item of the wafer.

Specifically, the abnormal wafers may be wafers with preset proportions, in which the test values of preset target test items of each wafer are ordered among the wafers, and the wafer with the forefront order is extracted.

In a specific implementation, the worst wafer list among all the wafers to be analyzed may be calculated:

If the higher the value of the anomaly index is, the worse the wafer is represented, the quantile value of the case index of all wafers to be analyzed can be calculated, and all wafer lists with the index higher than the preset quantile value are listed.

In one embodiment, a 90-minute number of case indexes of all wafers to be analyzed may be calculated and a list of all wafers with case indexes higher than the 90-minute number may be listed

Specifically, taking the problem that 600 wafers have higher test parameters as an example, 60 wafers with 10% higher test parameter values can be calculated as abnormal wafers.

If the lower the value of the abnormal index is, the worse the wafer is represented, the quantile value of the case index of all the wafers to be analyzed can be calculated, and all the wafer lists with indexes lower than the preset quantile value are listed.

In one embodiment, a 10-digit value of case indices for all wafers to be analyzed may be calculated and a list of all wafers having case indices below the 10-digit value may be listed

The preset ratio (e.g., 90 minutes, 10 minutes, etc.) may be a configurable parameter, which is used to represent the portion of the wafer with the greatest degree of abnormality.

It should be noted that, by extracting the wafers with the preset proportion and the forefront of the sequence, fairness among the dimensions to be analyzed can be improved, and especially under the condition that abnormal factors are difficult to predict in advance, accuracy of finding root factors is improved through fairness analysis.

Specifically, the abnormal wafer is a wafer with a test value of a target test item preset in a plurality of wafers exceeding a preset threshold range.

In the above embodiment, all wafer lists exceeding the parameter value range of the preset index in the case indexes of all wafers to be analyzed may be calculated

Specifically, taking a problem of 600 wafers having high test parameters as an example, a wafer exceeding a preset test parameter threshold range, for example, 75 wafers can be calculated as an abnormal wafer.

It should be noted that, by extracting a wafer exceeding the preset threshold range, the emphasis on a certain dimension to be analyzed can be improved by adjusting the preset threshold range, and especially in the case that an abnormal factor can be predicted in advance, the efficiency of finding the root cause factor can be improved by analyzing the emphasis.

Further, by analyzing the situation that each object to be analyzed produces an abnormal wafer in each dimension to be analyzed and determining that a single object to be analyzed produces an abnormal wafer exceeding a first preset proportion, the dimension (such as an execution machine, an execution chamber, a program recipe, etc. for actually producing the abnormal wafer) for actually producing the abnormal wafer can be selected, so that data interference is reduced.

Specifically, the machine 4 shown in fig. 1 only produces a small number of wafers, but is erroneously determined as a cause due to the high value of the difference index, but produces fewer abnormal wafers, which cannot exceed the first predetermined ratio.

Therefore, by determining that a single object to be analyzed produces an abnormal wafer exceeding the first preset ratio, there is an opportunity to exclude the case of the above-described machine 4.

Furthermore, the first preset proportion should not be too small, otherwise, it is difficult to embody that the current object to be analyzed produces a large number of abnormal wafers; the first preset proportion should not be too large, otherwise the conditions are too severe, so that the object to be analyzed cannot be selected, and the subsequent investigation is affected.

Still further, the first predetermined ratio may be selected from values greater than 1/2, such as 80% to 95%, such as 90%.

Further, under the condition that the number of the wafers manufactured by the object to be analyzed does not exceed the second preset proportion of the total number of the wafers, the situation that most of the wafers manufactured in a single dimension have higher abnormal proportion can be eliminated, and data interference is reduced.

For example, the process steps may be performed in a machine that includes a machine a that produces 98% of the wafers, the process steps producing 98% of the abnormal wafers, and a machine B that produces 2% of the wafers, the process steps producing 2% of the abnormal wafers.

The ratio of the wafer manufactured by the machine a to the abnormal wafer is consistent and is not the root cause machine, however, the machine a is easily misjudged as the root cause machine because most of the wafers are manufactured in the current process steps.

Therefore, by determining that the number of wafers manufactured by the object to be analyzed does not exceed the second preset ratio of the total number of wafers, there is an opportunity to exclude the case of the above-mentioned machine a.

Further, the second preset ratio should not be too large, otherwise the elimination operation is hardly performed; the second preset proportion should not be too small, otherwise the conditions are too severe, so that most objects to be analyzed with a quantity difference can be erroneously excluded, and the subsequent investigation is influenced.

Still further, the second predetermined proportion may be selected from values which may be selected from greater than 1/2, such as 70% to 80%, such as 75%.

In a specific implementation of the embodiment of the present invention, different dimensions to be analyzed may have respective first preset proportions and second preset proportions; the larger the number of the objects to be analyzed contained in the dimension to be analyzed is, the larger the first preset proportion is, and the smaller the second preset proportion is.

Specifically, considering that under the condition that more objects to be analyzed are needed, the situation that each dimension to be analyzed is normal (that is, the dimension to be analyzed is not the root factor at all) but misjudges that one of the objects to be analyzed is the sub-root factor is more needed, at this time, the dimension with fewer abnormal wafers manufactured can be eliminated by setting the first preset proportion to be further larger in the existing range, and only the dimension with the abnormal wafers actually manufactured is reserved; by setting the second preset proportion to be smaller in the existing range, under the condition that the dimension to be analyzed currently has more objects to be analyzed and the dispersibility is larger, the dimension of most wafers is eliminated to further reduce misjudgment, so that the dimension which possibly has abnormality is more effectively screened to be assigned to a larger first value, and the accuracy of analysis is further improved.

Further, in the case where the number of objects to be analyzed is large, the first preset ratio is in the range of [80%,95% ], and a large 90% or 92% may be employed.

In the case where the number of objects to be analyzed is large, the first preset ratio is in the range of [70%,80% ], and a smaller 72% or 74% may be employed.

In the implementation of step S21, the classification common modulation factor of the dimension to be analyzed is further assigned to a first value, otherwise, the classification common modulation factor of the dimension to be analyzed is assigned to a second value, and the first value is greater than the second value.

Specifically, the importance of the dimension to be analyzed which simultaneously satisfies the two conditions can be effectively improved by assigning a larger first value to the dimension to be analyzed which simultaneously satisfies the two conditions, and assigning a smaller second value to the dimension to be analyzed, so that the ranking of the dimension to be analyzed is higher in front and is easier to be found in a detailed investigation stage in the process of determining the commonality analysis result.

In the embodiment of the invention, the process steps to be analyzed of the wafer are determined; determining the current dimension to be analyzed of the wafer based on the process step to be analyzed; each process step to be analyzed can include a plurality of dimensions to be analyzed, for example, the category of the dimensions to be analyzed can be selected from a program formula, an execution machine, an execution chamber and the like, so that the dimensions to be analyzed with more pertinence can be obtained by determining part or all of the process steps.

Furthermore, each dimension to be analyzed has a predetermined abnormality degree predetermined value, and the dimensions to be analyzed of the same category among different process steps have the same abnormality degree predetermined value; the greater the anomaly degree pre-judging value is, the greater the first numerical value of the dimension to be analyzed of the category is.

In the embodiment of the invention, each dimension to be analyzed has a pre-determined abnormality pre-determination value, and the dimensions to be analyzed in the same category among different process steps have the same abnormality pre-determination value; the greater the anomaly degree pre-judging value is, the greater the first numerical value of the dimension to be analyzed of the category is. By adopting the scheme, a part of the multiple dimensions to be analyzed can be subjected to emphasis analysis, and the importance of the dimension which is predicted to be more abnormal is increased, so that the ranking of the dimension to be analyzed is higher in front in the subsequent process of determining the commonality analysis result, and the subsequent investigation efficiency is further improved.

Still further, the second value may be set to 0, thereby significantly reducing the complexity of subsequent operations.

Furthermore, in a specific embodiment, the first value can be set to be 0.5, so that the part related to the first value is subjected to halving operation in subsequent operation, and the complexity is effectively reduced; meanwhile, considering that two items of the classified common modulation coefficient and the differential value are combined in the embodiment of the invention, the first numerical value is set to be 0.5 for halving operation, so that the fairness between the two items can be improved.

In a specific implementation of step S22, a variance value for each dimension to be analyzed may be determined. Wherein the variance value for each dimension to be analyzed may be a single value.

Specifically, a preset variance analysis algorithm may be used to determine variance values of the dimensions to be analyzed.

Wherein the variance value may be used to represent a magnitude of variance between individual objects to be analyzed of the dimension to be analyzed.

In the embodiment of the invention, the difference value can be additionally calculated on the basis of determining the classified commonality modulation coefficient obtained after being assigned, and a more comprehensive commonality analysis result can be obtained by combining the two.

In addition to the difference analysis algorithm disclosed in the embodiment of the present invention, in another specific implementation manner, the preset difference analysis algorithm may also use a T-test method, for example, according to the size of the wafer test value, assign a value to the difference value of each dimension to be analyzed, for example, through equal-scale assignment, so as to obtain the difference value.

Referring to fig. 3, fig. 3 is a flowchart of one embodiment of step S22 in fig. 2. The step of determining the difference value of each dimension to be analyzed may include steps S31 to S32, and each step will be described below.

In step S31, for the target analysis dimension, under a preset target test item, based on the test value of the wafer, an inter-group sum of squares and an intra-group sum of squares are determined.

And the sum of squares among the groups is used for representing the sum of squares of errors of the average value of the test values of the wafers of each object to be analyzed and the total average value of the test values of all the wafers in the dimension to be analyzed.

Still further, the following formula may be employed to determine the sum of squares between each dimension to be analyzed:

；

wherein i is used for representing the ith object to be analyzed of the dimension to be analyzed,mean value of test values for individual wafers representing the ith object to be analyzed, +.>Representing the dimension to be analyzedWith mean value of test values of wafer, n _i The number of wafers used to represent the ith object to be analyzed, and k is used to represent the number of objects to be analyzed for that dimension to be analyzed.

And the intra-group square sum is used for representing the error square sum of the test value of each wafer of each object to be analyzed and the average value of the test values of the wafers of the object to be analyzed in the analysis dimension.

Still further, the sum of squares within the group for each dimension to be analyzed can be determined using the following formula:

；

wherein i is the ith object to be analyzed representing the dimension to be analyzed, j is the jth wafer representing the ith object to be analyzed, x _ij A test value for a j-th wafer representing an i-th object to be analyzed,mean value of test values of each wafer for representing the ith object to be analyzed, n _i The number of wafers used to represent the ith object to be analyzed, and k is used to represent the number of objects to be analyzed for that dimension to be analyzed.

In step S32, for each dimension to be analyzed, the quotient of the sum of squares between groups and the sum of squares within groups and the quotient of the adjustment coefficient may be used as the difference value of the dimension to be analyzed, where the adjustment coefficient is the quotient of the difference value of subtracting 1 from the number of objects to be analyzed in the dimension to be analyzed and the difference value of the number of wafers in the dimension to be analyzed and the number of objects to be analyzed.

Wherein, the following formula can be adopted to determine the difference value of each dimension to be analyzed:

；

In the embodiment of the invention, the difference value of each dimension to be analyzed is determined by adopting a preset difference analysis algorithm, and the difference value with finer granularity and stronger quantification can be obtained by adopting a proper algorithm as the basis of subsequent sequencing.

Further, in the above formula for determining the difference value of each dimension to be analyzed, the difference value of k and 1 is adopted, and the quotient value is directly calculated by adopting the difference value of n and k, so that the calculation complexity is reduced, and the calculation efficiency is improved.

In the embodiment of the invention, another formula can be adopted to determine the difference value of each dimension to be analyzed:

；

for the meaning of each parameter in the above formula, reference may be made to the foregoing, and details are not repeated here.

It should be noted that in the above-mentioned alternative formula, the quotient value is calculated by using the square of the difference between k and 1 and the square of the difference between n and k, which is helpful for preferentially obtaining the analysis latitude with less classification by using the quadratic term, further by the F value.

In the embodiment of the invention, for the target analysis dimension, based on the test value of the wafer, the inter-group square sum and the intra-group square sum are determined, and for each dimension to be analyzed, the inter-group square sum, the quotient of the intra-group square sum and the quotient of the adjustment coefficient are adopted as the difference value of the dimension to be analyzed, so that the inter-group operation and the intra-group operation of each object to be analyzed in each dimension to be analyzed can be utilized, the analysis granularity of the difference size between each object to be analyzed in each dimension to be analyzed is reduced, and the accuracy and the comprehensiveness of the determination of the difference value are further improved.

In one embodiment, each process step (also referred to as a site) may calculate a difference value for each dimension to be analyzed, such as a difference value for an execution tool, a difference value for an execution chamber, a difference value for a recipe, and the like. Taking 1000 sites, each site has the above 3 dimensions to be analyzed as an example, a maximum of 3000 difference values can be obtained.

With continued reference to fig. 2, in a specific implementation of step S23, a commonality analysis coefficient may be determined according to the classification commonality modulation coefficient and the variance value for each dimension to be analyzed. The commonality analysis result may then be determined from the commonality analysis coefficients.

Wherein the commonality analysis coefficient may also be referred to as a correlation importance coefficient.

Further, the step of determining the commonality analysis coefficient according to the classified commonality modulation coefficient and the difference value of each dimension to be analyzed may include: normalizing the difference values of all the dimensions to be analyzed to obtain normalized difference values of all the dimensions to be analyzed; and determining a commonality analysis coefficient according to the classified commonality modulation coefficient and the normalized difference value of each dimension to be analyzed.

In the embodiment of the invention, the normalized difference value of each dimension to be analyzed is obtained by carrying out normalization processing on the difference value of each dimension to be analyzed, the commonality analysis coefficient is determined according to the classified commonality modulation coefficient and the normalized difference value of each dimension to be analyzed, and the normalized difference value can be adjusted to be a value between 0 and 1 through normalization processing, thereby being beneficial to adjusting the importance of the two parameters and further increasing the comprehensiveness and the accuracy of analysis.

Further, the step of normalizing the difference value of each dimension to be analyzed to obtain a normalized difference value of each dimension to be analyzed may include: determining the maximum difference value in all dimensions to be analyzed; and taking the quotient of the difference value of each dimension to be analyzed and the maximum difference value as the normalized difference value of the dimension to be analyzed.

Specifically, the following formula may be used to determine the normalized difference value for each dimension to be analyzed:

；

wherein f _i Normalized difference value for representing the ith dimension to be analyzed, FScore _i FScore for representing the difference value of the ith dimension to be analyzed _max For representing the maximum of the difference values of all dimensions to be analyzed.

Further, the wafer is manufactured by adopting a plurality of process steps, each process step to be analyzed comprises a plurality of dimensions to be analyzed, and the maximum value of the difference values of all the dimensions to be analyzed is the maximum value of the difference values of all the dimensions to be analyzed, which are contained in all the process steps.

Taking the above embodiment as an example, each of 1000 sites has the above 3 dimensions to be analyzed, and up to 3000 difference values can be obtained, then FScore _max May be used to represent the maximum of 3000 difference values.

By adopting the scheme of the embodiment of the invention, the fairness among the dimensions to be analyzed can be improved, and especially under the condition that the abnormal factors are difficult to predict in advance, the accuracy of finding the root cause factors is improved through the fairness analysis.

Further, the step of determining the commonality analysis coefficient according to the classified commonality modulation coefficient and the normalized difference value of each dimension to be analyzed may include: respectively determining the sum and the product of the classification commonality modulation coefficient and the normalized difference value of each dimension to be analyzed; and adopting a difference value obtained by subtracting the product from the sum value as a commonality analysis coefficient of the dimension to be analyzed.

Specifically, the following formula may be used to determine the commonality analysis coefficient for each dimension to be analyzed:

；

wherein k is _i Commonality analysis coefficient Am for representing the ith dimension to be analyzed _i Classification-commonality modulation factor for representing the ith dimension to be analyzed, f _i The normalized difference value is used for representing the ith dimension to be analyzed.

In the embodiment of the invention, the commonality analysis coefficient of each dimension to be analyzed is determined according to the classified commonality modulation coefficient and the difference value, and compared with the determination of the commonality analysis result according to a single parameter in the prior art, the method can combine the classified commonality modulation coefficient obtained after assignment and the difference value obtained through a difference analysis algorithm to obtain a more comprehensive commonality analysis result.

It will be appreciated that the following formula may also be used to determine the commonality analysis coefficients for each dimension to be analyzed:

；

wherein k is _i Commonality analysis coefficient Am for representing the ith dimension to be analyzed _i Classification common modulation factor for representing the ith dimension to be analyzed, FScore _i FScore for representing the difference value of the ith dimension to be analyzed _max For representing the maximum of the difference values of all dimensions to be analyzed.

Further, the step of determining the result of the commonality analysis may include: sequencing the commonality analysis coefficients of all the dimensions to be analyzed from large to small to serve as the commonality analysis result; the larger the commonality analysis coefficient is, the larger the commonality degree of the corresponding dimension to be analyzed is.

It may be appreciated that, in the embodiment of the present invention, the step of determining the result of the commonality analysis may further be: and carrying out weighted operation on the commonality analysis coefficients of each dimension to be analyzed, and sequencing according to the size of the operated result to serve as the commonality analysis result.

Referring to table 1, table 1 is a schematic diagram of a commonality analysis result in the examples of the present invention.

In the commonality analysis results shown in table 1, after the commonality analysis coefficients are calculated, the first rank is obtained by sorting based on the commonality analysis coefficients.

However, in the prior art, such as the commonality analysis result determined by an existing variance analysis algorithm, the ranking order is very different from the embodiment of the present invention because the determination is based on a single parameter and does not consider the manufactured abnormal wafer proportion and the manufactured wafer proportion.

The suspected root factors of the first 5 are respectively located at positions 13, 34, 45 and 78 in the ranking determined based on the prior art, and it is expected that the suspected root factors may not be analyzed in the subsequent investigation due to the fact that the ranking is too far back, so that a correct investigation result cannot be obtained.

In the embodiment of the invention, a part of the wafer with the largest degree of abnormality is extracted from a plurality of wafers to serve as the abnormal wafer, so that the wafer can be focused on the abnormal wafer to a greater degree in the process of commonality analysis, and the data interference of the normal wafer is reduced; by analyzing the situation that each object to be analyzed produces an abnormal wafer in each dimension to be analyzed, determining that a single object to be analyzed produces an abnormal wafer exceeding a first preset proportion, compared with the situation that only a small number of wafers are produced but the difference index is high, the abnormal wafer is mistakenly identified as a root factor, the dimension (such as a machine, a chamber, a program and the like for truly producing the abnormal wafer) of the abnormal wafer can be selected by selecting the ratio exceeding the first preset proportion; the number of the wafers manufactured by the object to be analyzed does not exceed the second preset proportion of the total number of the wafers, so that the situation that the abnormal proportion is high when most of the wafers are manufactured in a single dimension can be eliminated, and misjudgment caused by the fact that most of the wafers are manufactured in the current process step is avoided; the importance of the dimension to be analyzed which simultaneously satisfies the two conditions can be effectively improved by assigning a larger first value to the dimension to be analyzed which simultaneously satisfies the two conditions, or assigning a smaller second value to the dimension to be analyzed, so that the ranking of the dimension to be analyzed is higher and is easier to be found in a detailed investigation stage in the process of subsequently determining the commonality analysis result; by adopting a preset difference analysis algorithm to determine the difference value of each dimension to be analyzed and determining the commonality analysis coefficient of each dimension to be analyzed according to the classified commonality modulation coefficient and the difference value, compared with the prior art that the commonality analysis result is determined according to a single parameter, the method can combine the classified commonality modulation coefficient obtained after being assigned and the difference value obtained through the difference analysis algorithm to obtain a more comprehensive commonality analysis result, effectively improve the sorting accuracy and improve the follow-up investigation efficiency.

Referring to fig. 4, fig. 4 is a schematic structural diagram of a commonality analysis apparatus for wafer anomalies according to an embodiment of the present invention. The commonality analysis device of wafer abnormality may include:

the assignment module 41 is configured to traverse each dimension to be analyzed, and if an abnormal wafer exceeding a first preset proportion is manufactured by a single object to be analyzed in any dimension to be analyzed, and the number of wafers manufactured by the object to be analyzed does not exceed a second preset proportion of the total number of wafers, assign a first value to a classification common modulation coefficient of the dimension to be analyzed, and otherwise assign a second value to a classification common modulation coefficient of the dimension to be analyzed, where the first value is greater than the second value, and the abnormal wafer is a part of wafers with the largest degree of abnormality extracted from a plurality of wafers;

a variance value determining module 42, configured to determine a variance value of each dimension to be analyzed;

the result determining module 43 is configured to determine a commonality analysis coefficient according to the classified commonality modulation coefficient and the difference value of each dimension to be analyzed, so as to determine a commonality analysis result.

Regarding the principle, specific implementation and beneficial effects of the device for analyzing commonality of wafer anomalies, please refer to the description related to the method for analyzing commonality of wafer anomalies, which is not described herein.

The embodiment of the invention also provides a readable storage medium, on which a computer program is stored, which when being executed by a processor performs the steps of the above method. The readable storage medium may be a computer readable storage medium, and may include a non-volatile memory (non-volatile) or a non-transitory memory (non-transitory) and may further include an optical disc, a mechanical hard disc, a solid state hard disc, and the like.

The embodiment of the invention also provides a configuration terminal, which comprises a memory and a processor, wherein the memory stores a computer program capable of running on the processor, and the processor executes the steps of the method when running the computer program. The terminal comprises, but is not limited to, a server, a mobile phone, a computer, a tablet personal computer and other terminal equipment.

Specifically, in the embodiment of the present invention, the processor may be a central processing unit (central processing unit, abbreviated as CPU), and the processor may also be other general purpose processors, digital signal processors (digital signal processor, abbreviated as DSP), application specific integrated circuits (application specific integrated circuit, abbreviated as ASIC), off-the-shelf programmable gate arrays (field programmable gate array, abbreviated as FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, and so on. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

It should also be appreciated that the memory in embodiments of the present application may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The nonvolatile memory may be a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an electrically erasable ROM (electrically EPROM, EEPROM), or a flash memory. The volatile memory may be a random access memory (random access memory, RAM for short) which acts as an external cache. By way of example but not limitation, many forms of random access memory (random access memory, abbreviated as RAM) are available, such as static random access memory (static RAM), dynamic Random Access Memory (DRAM), synchronous Dynamic Random Access Memory (SDRAM), double data rate synchronous dynamic random access memory (double data rate SDRAM, abbreviated as DDR SDRAM), enhanced Synchronous Dynamic Random Access Memory (ESDRAM), synchronous Link DRAM (SLDRAM), and direct memory bus random access memory (direct rambus RAM, abbreviated as DR RAM).

It should be understood that the term "and/or" is merely an association relationship describing the associated object, and means that three relationships may exist, for example, a and/or B may mean: a exists alone, A and B exist together, and B exists alone. In this context, the character "/" indicates that the front and rear associated objects are an "or" relationship.

The term "plurality" as used in the embodiments herein refers to two or more.

The first, second, etc. descriptions in the embodiments of the present application are only used for illustrating and distinguishing the description objects, and no order division is used, nor does it indicate that the number of the devices in the embodiments of the present application is particularly limited, and no limitation on the embodiments of the present application should be construed.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims

1. The commonality analysis method of wafer abnormality is characterized by comprising the following steps:

traversing each dimension to be analyzed, under any dimension to be analyzed, if a single object to be analyzed produces abnormal wafers exceeding a first preset proportion and the number of the wafers produced by the object to be analyzed does not exceed a second preset proportion of the total number of the wafers, assigning a first value to the classification common modulation coefficient of the dimension to be analyzed, otherwise assigning a second value to the classification common modulation coefficient of the dimension to be analyzed, wherein the first value is larger than the second value, and the abnormal wafers are part of the wafers with the largest degree of abnormality extracted from a plurality of wafers;

Determining the difference value of each dimension to be analyzed;

and determining a commonality analysis coefficient according to the classified commonality modulation coefficient and the difference value of each dimension to be analyzed so as to determine a commonality analysis result.

2. The method of claim 1, wherein determining the commonality analysis coefficients from the categorized commonality modulation coefficients and the variance values for each dimension to be analyzed comprises:

normalizing the difference values of all the dimensions to be analyzed to obtain normalized difference values of all the dimensions to be analyzed;

and determining a commonality analysis coefficient according to the classified commonality modulation coefficient and the normalized difference value of each dimension to be analyzed.

3. The method of claim 2, wherein normalizing the difference values for each dimension to be analyzed to obtain normalized difference values for each dimension to be analyzed, comprises:

determining the maximum difference value in all dimensions to be analyzed;

and taking the quotient of the difference value of each dimension to be analyzed and the maximum difference value as the normalized difference value of the dimension to be analyzed.

4. A method according to claim 2 or 3, wherein determining the commonality analysis factor from the classified commonality modulation factor and the normalized difference value for each dimension to be analyzed comprises:

For each dimension to be analyzed, determining the sum and the product of the classification commonality modulation coefficient and the normalized difference value of the dimension to be analyzed;

and adopting a difference value obtained by subtracting the product from the sum value as a commonality analysis coefficient of the dimension to be analyzed.

5. The method of claim 1, wherein the step of determining the abnormal wafer comprises:

sequencing the test values in a plurality of wafers, and extracting the wafers with preset proportions, which are most forward in sequence, as abnormal wafers;

or,

acquiring a wafer with a test value exceeding a preset threshold range from a plurality of wafers to serve as an abnormal wafer;

the test value is a numerical value of a preset target test item of the wafer.

6. The method of claim 1, wherein the step of determining the position of the substrate comprises,

the first preset ratio is selected from: 80% to 95%,

and/or, the second preset ratio is selected from: 70% to 80%.

7. The method according to claim 1 or 6, wherein the different dimensions to be analyzed have respective first and second preset proportions;

the larger the number of the objects to be analyzed contained in the dimension to be analyzed is, the larger the first preset proportion is, and the smaller the second preset proportion is.

8. The method of claim 1, wherein the step of determining the dimension to be analyzed comprises:

determining the process steps of the wafer to be analyzed;

determining the current dimension to be analyzed of the wafer based on the process step to be analyzed;

wherein each process step to be analyzed can comprise a plurality of said dimensions to be analyzed.

9. The method of claim 8, wherein each dimension to be analyzed has a predetermined anomaly degree threshold value, and wherein the dimensions to be analyzed of the same category have the same anomaly degree threshold value between different process steps;

the greater the anomaly degree pre-judging value is, the greater the first numerical value of the dimension to be analyzed of the category is.

10. The method of any one of claims 1, 8 or 9, wherein each process step to be analyzed comprises a class of dimensions to be analyzed selected from the group consisting of: program formula, execution machine and execution chamber;

wherein the dimension to be analyzed is classified into a program formula, and the object to be analyzed under the program formula is the program formula of each process step;

the dimension to be analyzed is classified into an execution machine, and the object to be analyzed under the execution machine is the execution machine of each process step;

The dimension to be analyzed is classified into an execution chamber, and the object to be analyzed under the execution chamber is the execution chamber of each process step.

11. The method of claim 1, wherein determining the variance value for each dimension to be analyzed comprises:

for a target analysis dimension, determining an inter-group square sum and an intra-group square sum based on test values of wafers under a preset target test item, wherein the inter-group square sum is used for representing an error square sum of a test value average value of wafers of each object to be analyzed and a test value total average value of all wafers in the dimension to be analyzed, and the intra-group square sum is used for representing an error square sum of a test value average value of each wafer of each object to be analyzed and a test value average value of wafers of the object to be analyzed in the dimension to be analyzed;

and for each dimension to be analyzed, taking the sum of squares between groups and the quotient of the sum of squares in the groups and the quotient of the adjustment coefficient as the difference value of the dimension to be analyzed, wherein the adjustment coefficient is the quotient of the difference value of subtracting 1 from the number of objects to be analyzed of the dimension to be analyzed and the difference value of the number of wafers of the dimension to be analyzed and the number of objects to be analyzed.

12. The method of claim 11, wherein one or more of the following is satisfied:

the sum of squares between groups for each dimension to be analyzed is determined using the following formula:

；

wherein i is used for representing the ith object to be analyzed of the dimension to be analyzed,mean value of test values for individual wafers representing the ith object to be analyzed, +.>Mean value of test values for all wafers representing the dimension to be analyzed, n _i The number of wafers used for representing the ith object to be analyzed, and k is used for representing the number of objects to be analyzed of the dimension to be analyzed;

the sum of squares within the group for each dimension to be analyzed is determined using the following formula:

；

wherein i is the ith object to be analyzed representing the dimension to be analyzed, j is the jth wafer representing the ith object to be analyzed, x _ij A test value for a j-th wafer representing an i-th object to be analyzed,mean value of test values of each wafer for representing the ith object to be analyzed, n _i The number of wafers used for representing the ith object to be analyzed, and k is used for representing the number of objects to be analyzed of the dimension to be analyzed;

the difference value of each dimension to be analyzed is determined using the following formula:

；

13. A commonality analysis apparatus for wafer abnormality, comprising:

the evaluation module is used for traversing each dimension to be analyzed, under any dimension to be analyzed, if a single object to be analyzed produces abnormal wafers exceeding a first preset proportion and the number of the wafers produced by the object to be analyzed does not exceed a second preset proportion of the total number of the wafers, assigning the classification common modulation coefficient of the dimension to be analyzed as a first value, otherwise assigning the classification common modulation coefficient of the dimension to be analyzed as a second value, wherein the first value is larger than the second value, and the abnormal wafers are part of the wafers with the largest degree of abnormality in a plurality of wafers;

the difference value determining module is used for determining the difference value of each dimension to be analyzed;

and the result determining module is used for determining the commonality analysis coefficient according to the classified commonality modulation coefficient and the difference value of each dimension to be analyzed so as to determine the commonality analysis result.

14. A readable storage medium having stored thereon a computer program, characterized in that the computer program, when being executed by a processor, performs the steps of the method for commonality analysis of wafer anomalies according to any one of claims 1 to 12.

15. A terminal comprising a memory and a processor, the memory having stored thereon a computer program executable on the processor, characterized in that the processor, when executing the computer program, performs the steps of the method for commonality analysis of wafer anomalies according to any one of claims 1 to 12.