CN117069054B - MEMS chip packaging structure and manufacturing method thereof - Google Patents
MEMS chip packaging structure and manufacturing method thereof Download PDFInfo
- Publication number
- CN117069054B CN117069054B CN202311324623.XA CN202311324623A CN117069054B CN 117069054 B CN117069054 B CN 117069054B CN 202311324623 A CN202311324623 A CN 202311324623A CN 117069054 B CN117069054 B CN 117069054B
- Authority
- CN
- China
- Prior art keywords
- layer
- device structure
- mems device
- substrate
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 53
- 238000004806 packaging method and process Methods 0.000 title abstract description 30
- 229910052751 metal Inorganic materials 0.000 claims abstract description 94
- 239000002184 metal Substances 0.000 claims abstract description 94
- 238000007789 sealing Methods 0.000 claims abstract description 83
- 239000000758 substrate Substances 0.000 claims abstract description 68
- 238000001259 photo etching Methods 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 claims description 58
- 238000005530 etching Methods 0.000 claims description 23
- 230000008569 process Effects 0.000 claims description 19
- 230000000149 penetrating effect Effects 0.000 claims description 13
- 239000000463 material Substances 0.000 claims description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 10
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 8
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 7
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 5
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 5
- 238000000059 patterning Methods 0.000 claims description 5
- 239000002861 polymer material Substances 0.000 claims description 5
- 238000005498 polishing Methods 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- 238000010030 laminating Methods 0.000 claims description 2
- 239000004020 conductor Substances 0.000 claims 1
- 238000005336 cracking Methods 0.000 abstract description 4
- 238000000151 deposition Methods 0.000 abstract description 4
- 238000005516 engineering process Methods 0.000 abstract description 4
- 238000012536 packaging technology Methods 0.000 abstract description 3
- 230000000694 effects Effects 0.000 abstract 2
- 235000012431 wafers Nutrition 0.000 description 9
- 238000000206 photolithography Methods 0.000 description 5
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 206010041662 Splinter Diseases 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00269—Bonding of solid lids or wafers to the substrate
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Micromachines (AREA)
Abstract
The invention provides an MEMS chip packaging structure and a manufacturing method thereof, comprising the following steps: through depositing first oxide layer on MEMS device structure earlier, make MEMS device structure be located the substrate base plate with between the first oxide layer, then form the metal supporting layer in first oxide layer one side that deviates from MEMS device structure, carry out the photoetching to the metal supporting layer to obtain and run through the release hole of metal supporting layer, form the cavity structure that can supply MEMS device structure activity with the mode of release again, realize final seal through first sealing layer at last, simplified the technology degree of difficulty, realized the effective protection of activity structure. Therefore, the problems of poor connection compactness, edge breakage, cracking and the like caused by the traditional sealing packaging technology are perfectly solved.
Description
Technical Field
The invention relates to the technical field of chip packaging, in particular to an MEMS chip packaging structure and a manufacturing method thereof.
Background
In the conventional technology, a MEMS (Micro-Electro-Mechanical System ) chip is sealed and packaged by 2 wafers to protect internal movable components, and the packaging mode has high requirements on flatness and cleanliness of the 2 wafers, and if the processing is poor, the 2 wafers have local areas which are not tightly connected, so that the problems of edge breakage, cracking and the like can be caused. In addition, the conventional bonding and sealing method of 2 wafers cannot reduce the thickness of the wafers to be very thin, and the thickness of each wafer is generally 150-250 μm, so that the whole volume of the MEMS chip packaging structure is larger.
Disclosure of Invention
The invention aims to at least solve the problems of loose connection, edge breakage and splitting caused by sealing and packaging of 2 wafers in the prior art, and provides a MEMS chip packaging structure and a manufacturing method thereof.
The invention adopts the following technical scheme:
according to an aspect of the present invention, there is provided a method for manufacturing a MEMS chip package structure, the method comprising:
providing a substrate, manufacturing a MEMS device structure layer on one side of the substrate, and etching the MEMS device structure layer to form an MEMS device structure;
manufacturing a first oxide layer so that the MEMS device structure is positioned between the substrate base plate and the first oxide layer;
forming a metal supporting layer on one side of the first oxide layer, which is away from the MEMS device structure, and performing photoetching treatment on the metal supporting layer to obtain a release hole penetrating through the metal supporting layer;
etching away a first oxide layer between the metal supporting layer and the substrate base plate through the release hole to release at least part of the MEMS device structure, so as to form a cavity for the MEMS device structure to move;
and manufacturing a first sealing layer which covers the metal supporting layer on the side, away from the MEMS device structure, of the metal supporting layer with the release hole.
Further, the material of the first oxide layer includes silicon oxide, and the material of the first sealing layer includes any one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride or polymer material.
Further, after completing the fabrication of the first oxide layer and before forming the metal support layer on a side of the first oxide layer facing away from the device structure, the method further includes: etching the first oxide layer from one side of the first oxide layer away from the MEMS device structure to form a plurality of first concave parts; and manufacturing a first insulating layer, wherein the first insulating layer covers the first oxide layer and fills the first concave parts to form an insulating support body with a stop structure.
Further, the material of the first insulating layer comprises silicon nitride.
Further, the method further comprises:
and carrying out photoetching treatment on the metal supporting layer and the first insulating layer to obtain release holes penetrating through the metal supporting layer and the first insulating layer.
Further, the method further comprises:
and manufacturing a conductive bonding pad on the surface of one side of the device structure layer, which is away from the substrate.
Further, after performing a photolithography process on the metal support layer to obtain a release hole penetrating the metal support layer, the method further includes:
and carrying out opening treatment on the first oxide layer to expose the conductive bonding pad.
Further, after completing the fabrication of the first sealing layer, the method further includes:
and carrying out opening treatment on the first sealing layer to expose the conductive bonding pad.
Further, the method further comprises:
and manufacturing a second sealing layer covering the first sealing layer on one side of the first sealing layer, which is away from the MEMS device structure, wherein the second sealing layer comprises su8 or a dry film.
Optionally, the method for manufacturing the MEMS device structure layer on one side of the substrate board and etching the MEMS device structure layer to form the MEMS device structure includes:
sequentially laminating a zeroth oxide layer and a first conductive layer on one side surface of the substrate base plate;
patterning the first conductive layer to form a plurality of first fixed electrodes;
forming a zeroth insulating layer covering the first fixed electrodes and the zeroth oxide layer on the zeroth oxide layer, and performing patterning treatment on the zeroth insulating layer to form a plurality of first opening structures;
and etching part of the zeroth oxide layer through the first opening structure to expose the surface of the substrate.
Further, the method for manufacturing the MEMS device structure layer on one side of the substrate base plate and etching the MEMS device structure layer to form the MEMS device structure further comprises the following steps:
etching the zeroth insulating layer from one side of the zeroth insulating layer away from the substrate base plate to form a second concave part;
manufacturing a seed layer covering the zeroth insulating layer on one side of the zeroth insulating layer, which is away from the substrate, wherein the seed layer fills the first opening structure and the second concave part;
manufacturing the MEMS device structure layer covering the seed layer on one side of the seed layer, which is away from the substrate, and filling part of the MEMS device structure layer into the first opening structure; wherein, part of the MEMS device structure layer is in contact connection with the substrate base plate through the seed layer in the first opening structure;
flattening the surface of one side of the MEMS device structure layer, which is far away from the substrate, by adopting a CMP (chemical mechanical polishing) process;
and etching the MEMS device structure layer to form the MEMS device structure.
Optionally, before the first sealing layer covering the metal support layer is formed on the side, facing away from the device structure, of the metal support layer, the method further includes:
and manufacturing a metal layer covering the metal supporting layer on one side of the metal supporting layer, which is away from the MEMS device structure, so as to seal the release hole and form a plurality of second fixed electrodes.
Further, the MEMS chip is an inertial sensor chip.
In another aspect, there is provided a MEMS chip package structure, comprising:
a substrate base plate is provided with a plurality of base plates,
the structure of the device is that,
a metal support layer and a first sealing layer;
the device structure, the metal supporting layer and the first sealing layer are obtained through the manufacturing method of the MEMS chip packaging structure.
By adopting the MEMS chip packaging structure and the manufacturing method thereof provided by the embodiment of the application, in order to solve the problems of poor connection compactness caused by the traditional sealing packaging technology, edge breakage, splinter and the like caused by the poor connection compactness, compared with the prior art, the MEMS chip packaging structure is characterized in that the MEMS device structure is positioned between the substrate and the first oxide layer by depositing the first oxide layer on the MEMS device structure, then a metal supporting layer is formed on one side of the first oxide layer, which is away from the MEMS device structure, and the metal supporting layer is subjected to photoetching treatment so as to obtain a release hole penetrating through the metal supporting layer, a cavity structure capable of allowing the MEMS device structure to move is formed in a release mode, and finally final sealing is realized through the first sealing layer, so that the process difficulty is simplified and the effective protection of a movable structure is realized.
In the embodiment of the invention, the metal supporting layer and the first sealing layer are used together as the sealing layer, and the overall thickness of the sealing layer can be lower than 10 mu m, so that the overall thickness of the MEMS chip packaging structure can be concentrated at the bottom of the MEMS device structure, and the influence of packaging stress on the MEMS device structure can be effectively reduced. And the arc height of the subsequent MEMS device structure wire bonding to the substrate base plate is reduced, so that the volume of the whole MEMS chip packaging structure is reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other embodiments may be obtained according to these drawings without inventive effort to a person skilled in the art.
Fig. 1 is a schematic diagram of a manufacturing flow of a manufacturing method of a MEMS chip package structure according to an embodiment of the present invention.
Fig. 2A-2R are schematic views illustrating a manufacturing process of a MEMS chip package structure according to an embodiment of the invention.
Fig. 3A-3G are schematic views illustrating a manufacturing process of a MEMS chip package structure according to another embodiment of the present invention.
Detailed Description
The foregoing description is only an overview of the present invention, and is intended to be implemented in accordance with the teachings of the present invention, as well as the preferred embodiments thereof, together with the following detailed description of the invention, given by way of illustration only, together with the accompanying drawings.
In the description of the present invention, it should be noted that, unless explicitly specified and defined otherwise, the term "depth" will be used to indicate the direction along which each constituent element of the pressure sensor in the embodiment of the present invention extends along the first axis Z of the cartesian reference system XYZ, and the terms "length" and "width" respectively indicate the direction along which each constituent element of the pressure sensor in the embodiment of the present invention extends along the second axis X and the third axis Y of the cartesian coordinate system XYZ. The terms "mounted," "connected," "coupled," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically connected, electrically connected or can be communicated with each other; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The order illustrated herein represents one exemplary scenario when referring to method steps, but does not represent a limitation on the order. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
The invention will be further described in detail with reference to the drawings and detailed description below in order to make the objects, features and advantages of the invention more comprehensible.
Fig. 1 is a schematic diagram of a manufacturing flow of a manufacturing method of a MEMS chip package structure according to an embodiment of the present invention.
Referring to fig. 1, the method for manufacturing the MEMS chip package structure includes the following steps:
step S11, providing a substrate, manufacturing a MEMS device structure layer on one side of the substrate, and etching the MEMS device structure layer to form an MEMS device structure;
step S12, manufacturing a first oxide layer so that the MEMS device structure is positioned between the substrate base plate and the first oxide layer;
step S13, forming a metal supporting layer on one side of the first oxide layer, which is away from the MEMS device structure, and performing photoetching treatment on the metal supporting layer to obtain a release hole penetrating through the metal supporting layer;
step S14, etching the first oxide layer between the metal supporting layer and the substrate base plate through the release hole to release at least part of the MEMS device structure, so as to form a cavity for the MEMS device structure to move;
and S15, manufacturing a first sealing layer which covers the metal supporting layer on the side, away from the MEMS device structure, of the metal supporting layer with the release hole.
Illustratively, in an embodiment of the present invention, the substrate base is a silicon wafer substrate. The MEMS chip is an inertial sensor chip.
The material of the first sealing layer comprises any one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride or polymer material.
Compared with the prior art, the manufacturing method of the MEMS chip packaging structure has the advantages that the MEMS device structure is located between the substrate base plate and the first oxide layer by depositing the first oxide layer on the MEMS device structure, then the metal supporting layer is formed on one side, away from the MEMS device structure, of the first oxide layer, photoetching is conducted on the metal supporting layer to obtain a release hole penetrating through the metal supporting layer, a cavity structure allowing the MEMS device structure to move is formed in a release mode, final sealing is achieved through the first sealing layer, process difficulty is simplified, and effective protection of a moving structure is achieved.
In the embodiment of the invention, the metal supporting layer and the first sealing layer are used together as the sealing layer, and the overall thickness of the sealing layer can be lower than 10 mu m, so that the overall thickness of the MEMS chip packaging structure can be concentrated at the bottom of the MEMS device structure, and the influence of packaging stress on the MEMS device structure can be effectively reduced. And the arc height of the subsequent MEMS device structure wire bonding to the substrate base plate is reduced, so that the volume of the whole MEMS chip packaging structure is reduced.
It should be noted that, generally considering the influence of the arc height, a 50-150 um area is left, and in fig. 2Q, the distance between the conductive pad 200 and the sealing periphery is indicated, if the sealing method of the embodiment of the application is adopted, the influence of the wire bonding radian can be completely avoided, the distance can be controlled within 10um, and the overall size of the MEMS chip packaging structure is effectively reduced.
Fig. 2A-2R are schematic views illustrating a manufacturing process of a MEMS chip package structure according to an embodiment of the invention. Steps S11 to S15 will be specifically described below in conjunction with fig. 2A to 2R.
In step S11, a substrate is provided, and a MEMS device structure layer is fabricated on one side of the substrate, and the MEMS device structure layer is etched to form a MEMS device structure.
Illustratively, as shown in fig. 2H, a MEMS device structure layer 150 is fabricated on one side of the substrate base 100.
In some embodiments, as shown in fig. 2I, a chemical mechanical polishing (Chemical Mechanical Polishing, CMP) process is employed to planarize a surface of the MEMS device structure layer 150 on a side facing away from the substrate 100. Specifically, CMP is used to planarize a side of the MEMS device structure layer 150 facing away from the substrate 100, so as to planarize the MEMS device structure layer 150.
Further, the method further comprises: a conductive pad 200 is fabricated on a surface of the device structure layer 150 on a side facing away from the substrate 100.
Illustratively, as shown in fig. 2J, a conductive pad 200 is fabricated on a surface of the device structure layer 150, which is subjected to the planarization process, on a side facing away from the substrate base plate 100.
As shown in fig. 2K, the etching the MEMS device structure layer to form a MEMS device structure includes: the MEMS device structure layer 150 is etched using a PR Mask or using a SiO2 Hard Mask to form the MEMS device structure 151.
In step S12, a first oxide layer is fabricated such that the MEMS device structure is located between the substrate base plate and the first oxide layer.
Illustratively, as shown in fig. 2L, a first oxide layer 160 is fabricated on a side of the MEMS device structure 151 facing away from the substrate 100 such that the MEMS device structure 151 is located between the substrate 100 and the first oxide layer 160. Specifically, the material of the first oxide layer 160 includes silicon oxide, which may be manufactured by a plasma chemical vapor deposition process, so as to seal the opening structure on the MEMS device structure 151.
In step S13, a metal supporting layer is formed on a side of the first oxide layer, which is away from the MEMS device structure, and the metal supporting layer is subjected to photolithography processing, so as to obtain a release hole penetrating through the metal supporting layer.
Illustratively, as shown in fig. 2M-2N, a metal support layer 170 is formed on a side of the first oxide layer 160 facing away from the MEMS device structure 151, and the metal support layer 170 is subjected to a photolithography process to obtain a release hole 171 penetrating the metal support layer 170.
In step S14, the first oxide layer between the metal supporting layer and the substrate is etched away through the release hole, so as to release at least part of the MEMS device structure, thereby forming a cavity for the MEMS device structure to move.
Illustratively, as shown in fig. 2O, a cavity 400 is formed in which the MEMS device structure 151 is movable by etching away the first oxide layer 160 between the metal support layer 170 and the substrate 100 through the release hole 171, and etching away other insulating layers and/or oxide layers between the metal support layer 170 and the substrate 100 to release at least a portion of the MEMS device structure 151.
Continuing with fig. 2O, after completing the photolithography process on the metal support layer 170 to obtain the release hole 171 penetrating the metal support layer 170, the method further includes: the first oxide layer 160 is subjected to an opening process to expose the conductive pad 200.
In step S15, a first sealing layer is produced on the side of the metal support layer having the release holes facing away from the device structure, said first sealing layer covering the metal support layer.
Illustratively, as shown in fig. 2P, a first sealing layer 310 is fabricated overlying the metal support layer 170 on a side of the metal support layer 170 having the release holes 171 that faces away from the MEMS device structure 151. The material of the first sealing layer 310 includes any one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride or polymer material, and the first sealing layer 310 is used for sealing the release hole 171 on the metal supporting layer, so as to play a role in sealing and packaging, and in addition, the first sealing layer 310 can also protect the metal supporting layer from being invaded by external water vapor and play a role in scratch resistance.
Further, as shown in fig. 2Q, after the fabrication of the first sealing layer 310 is completed, the method further includes: the first sealing layer 310 is subjected to an opening process to expose the conductive pad 200.
In the implementation of the invention, the MEMS device structure is packaged between the first oxide layer and the substrate base plate by manufacturing the first oxide layer, then the metal supporting layer and the first sealing layer are adopted together as the sealing cover layer, and the whole thickness of the sealing cover layer can be lower than 10 mu m, so that the whole thickness of the MEMS chip packaging structure can be concentrated at the bottom of the MEMS device structure, and the influence of packaging stress on the MEMS device structure can be effectively reduced. And is beneficial to reducing the arc height of the subsequent MEMS device structure wire bonding to the substrate.
Optionally, the method further comprises: and manufacturing a second sealing layer covering the first sealing layer on one side of the first sealing layer, which is away from the device structure, wherein the second sealing layer comprises su8 or a dry film. The risk of hidden cracking of the sealing layer under the stress action in the chip packaging process is further reduced.
Illustratively, as shown in fig. 2R, a second sealing layer 320 is formed on a side of the first sealing layer 310 facing away from the MEMS device structure 151, where the second sealing layer 320 includes su8 or a dry film. Specifically, the second sealing layer 320 may be deposited to form a layer su8 above the first sealing layer 310, or a layer of dry film may be applied to absorb wafer deformation caused by the post-plastic package.
Referring to fig. 2A-2G, in some embodiments, the method for fabricating a MEMS device structure layer on one side of the substrate and etching the MEMS device structure layer to form a MEMS device structure includes:
as shown in fig. 2A, a zeroth oxide layer 110 and a first conductive layer 120 are sequentially stacked on one side surface of the substrate 100.
As shown in fig. 2B, the first conductive layer 120 is patterned to form a plurality of first fixed electrodes 121.
As shown in fig. 2C to 2D, a zeroth insulating layer 130 covering the plurality of first fixed electrodes 121 and the zeroth oxide layer 110 is formed on the zeroth oxide layer 110, and the zeroth insulating layer 130 is subjected to patterning process to form a plurality of first opening structures 131.
As shown in fig. 2E, a portion of the zeroth oxide layer 110 is etched through the first opening structure 131 to expose the surface of the substrate 100. So that the subsequently deposited MEMS device structure layer 150 can be filled into the first opening structure 131 and be in contact connection with the substrate 100, and since the substrate 100 is grounded, the MEMS device structure layer is connected with the ground, thereby being capable of shielding various types of signal interference, including high-frequency interference signals, electromagnetic wave interference signals, electrostatic interference signals, radiation interference signals, and the like.
Further, as shown in fig. 2F, the zeroth insulating layer 130 is etched from a side of the zeroth insulating layer 130 facing away from the substrate 100 to form a second recess 132.
Further, as shown in fig. 2G, a seed layer 140 is formed on a side of the zeroth insulating layer 130 facing away from the substrate 100, where the seed layer 140 fills the first opening structure 131 and the second recess 132.
Specifically, in the embodiment of the present invention, the seed layer 140 is a thin polysilicon film obtained by low-pressure chemical vapor deposition, and the MEMS device structure layer 150 is a polysilicon film with a preset thickness obtained by an epitaxial growth process on the seed layer 140.
Fig. 3A-3G are schematic views illustrating a manufacturing process of a MEMS chip package structure according to another embodiment of the present invention.
In some embodiments, after completing the fabrication of the first oxide layer and before forming the metal support layer on a side of the first oxide layer facing away from the device structure, the method further comprises:
as shown in fig. 3A, the first oxide layer 160 is etched from a side of the first oxide layer 160 facing away from the MEMS device structure to form a plurality of first recesses 161.
As shown in fig. 3B, a first insulating layer 180 is fabricated, the first insulating layer 180 covering the first oxide layer 160 and filling the plurality of first recesses 161 to form an insulating support having a stopper structure.
In this embodiment, by performing patterned etching on the first oxide layer 160 to form a stop bump (anti-sticking bump) for subsequently limiting the movement of the MEMS device structure, illustratively, the material of the first insulating layer 180 is SiN, which is used as a balanced stress layer, and can be used to counteract the stress of the first oxide layer 160, and an anti-collision structure for preventing the side of the MEMS device structure 151 with larger mass from being stuck can be formed to prevent the side of the MEMS device structure 151 with larger mass from being stuck.
As shown in fig. 3C-3D, a metal supporting layer 170 is formed on a side of the first insulating layer 180 facing away from the MEMS device structure 151, and the metal supporting layer 170 is subjected to a photolithography process to obtain a release hole 171 penetrating the metal supporting layer.
As shown in fig. 3E, the first oxide layer 160 between the metal support layer 170 and the substrate base plate 100 is etched away through the release hole 171 to release at least part of the MEMS device structure, thereby forming a cavity 400 for the MEMS device structure 151 to move; after completing the photolithographic process on the metal support layer 170 to obtain release holes 171 through the metal support layer 170, the method further comprises: the first oxide layer 160 is subjected to an opening process to expose the conductive pad 200.
As shown in fig. 3F, a first sealing layer 310 is fabricated on a side of the metal support layer 170 having the release hole 171 facing away from the MEMS device structure 151, covering the metal support layer 170. The material of the first sealing layer 310 includes any one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride or polymer material, and the first sealing layer 310 is used for sealing the release hole 171 on the metal supporting layer, so as to play a role in sealing and packaging, and in addition, the first sealing layer 310 can also protect the metal supporting layer from being invaded by external water vapor and play a role in scratch resistance.
Further, as shown in fig. 3G, after the fabrication of the first sealing layer 310 is completed, the method further includes: the first sealing layer 310 is subjected to an opening process to expose the conductive pad 200.
Optionally, in other embodiments, before the first sealing layer 310 covering the metal support layer 170 is fabricated on a side of the metal support layer 170 facing away from the device structure, the method further includes: an additional metal layer is formed on the side of the metal support layer 170 facing away from the MEMS device structure 151, covering the metal support layer 170, to close the release hole 171 and form a plurality of second fixed electrodes. That is, the metal supporting layer 170 may be multiplexed into a plurality of second fixed electrodes, and the plurality of second fixed electrodes and the MEMS device structure 151 form a see-saw capacitance structure in the thickness direction of the substrate, so as to detect the capacitance change in the sensing axis direction.
According to another aspect of the present application, there is also provided a MEMS chip package structure, including:
a substrate base plate is provided with a plurality of base plates,
the structure of the device is that,
a metal support layer and a first sealing layer;
the device structure, the metal supporting layer and the first sealing layer are obtained through the manufacturing method of the MEMS chip packaging structure in the previous embodiment.
Illustratively, the MEMS chip is an inertial sensor chip.
Therefore, in order to solve the problems of poor connection compactness, edge breakage, cracking and the like caused by the traditional sealing packaging technology, compared with the conventional technology, the MEMS chip packaging structure and the manufacturing method thereof are adopted, compared with the conventional technology, the MEMS chip packaging structure is formed by depositing the first oxide layer on the MEMS device structure, so that the MEMS device structure is positioned between the substrate and the first oxide layer, then a metal supporting layer is formed on one side of the first oxide layer, which is away from the MEMS device structure, and the metal supporting layer is subjected to photoetching treatment to obtain a release hole penetrating through the metal supporting layer, a cavity for the movement of the MEMS device structure is formed in a release mode, and finally final sealing is realized through the first sealing layer, so that the process difficulty is simplified, and the effective protection of the movable structure is realized.
In the embodiment of the invention, the metal supporting layer and the first sealing layer are used together as the sealing layer, and the overall thickness of the sealing layer can be lower than 10 mu m, so that the overall thickness of the MEMS chip packaging structure can be concentrated at the bottom of the MEMS device structure, and the influence of packaging stress on the MEMS device structure can be effectively reduced. And is beneficial to reducing the arc height of the subsequent MEMS device structure wire bonding to the substrate. Because the whole thickness of the MEMS chip packaging structure of the embodiment is lower, the volume of the chip can be effectively reduced.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the claims. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.
Claims (11)
1. A method for manufacturing a MEMS chip package structure, the method comprising:
providing a substrate, manufacturing an MEMS device structure layer on one side of the substrate, manufacturing a conductive pad on the surface of one side of the device structure layer, which is away from the substrate, and etching the MEMS device structure layer to form an MEMS device structure; manufacturing a first oxide layer so that the MEMS device structure and the conductive pad are positioned between the substrate base plate and the first oxide layer;
forming a metal supporting layer on one side of the first oxide layer, which is away from the MEMS device structure, performing photoetching treatment on the metal supporting layer, removing part of the metal supporting layer covering the area where the conductive pad is located, and obtaining a release hole penetrating through the metal supporting layer;
opening the first oxide layer to expose the conductive bonding pad, and etching the first oxide layer between the metal supporting layer and the substrate base plate through the release hole to release at least part of the MEMS device structure, so as to form a cavity for the MEMS device structure to move;
manufacturing a first sealing layer covering the metal supporting layer on one side, away from the MEMS device structure, of the metal supporting layer with the release hole, and carrying out opening treatment on the first sealing layer to expose the conductive bonding pad;
wherein the metal support layer and the first sealing layer together serve as a sealing cover layer, and the overall thickness of the sealing cover layer is less than 10 μm.
2. The method of claim 1, wherein,
the material of the first oxide layer comprises silicon oxide, and the material of the first sealing layer comprises any one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride or polymer material.
3. The method of claim 1, wherein after completing fabrication of a first oxide layer and before forming a metal support layer on a side of the first oxide layer facing away from the device structure, the method further comprises:
etching the first oxide layer from one side of the first oxide layer away from the MEMS device structure to form a plurality of first concave parts;
and manufacturing a first insulating layer, wherein the first insulating layer covers the first oxide layer and fills the first concave parts to form an insulating support body with a stop structure.
4. The method of claim 3, wherein,
the material of the first insulating layer comprises silicon nitride.
5. The method of claim 4, wherein the method further comprises:
and carrying out photoetching treatment on the metal supporting layer and the first insulating layer to obtain release holes penetrating through the metal supporting layer and the first insulating layer.
6. The method of claim 2, wherein the method further comprises:
and manufacturing a second sealing layer covering the first sealing layer on one side of the first sealing layer, which is away from the MEMS device structure, wherein the second sealing layer comprises su8 or a dry film.
7. The method of claim 1, wherein the fabricating a MEMS device structure layer on one side of the substrate and etching the MEMS device structure layer to form a MEMS device structure comprises:
sequentially laminating a zeroth oxide layer and a first conductive layer on one side surface of the substrate base plate;
patterning the first conductive layer to form a plurality of first fixed electrodes;
forming a zeroth insulating layer covering the first fixed electrodes and the zeroth oxide layer on the zeroth oxide layer, and performing patterning treatment on the zeroth insulating layer to form a plurality of first opening structures;
and etching part of the zeroth oxide layer through the first opening structure to expose the surface of the substrate.
8. The method of claim 7, wherein the fabricating a MEMS device structure layer on one side of the substrate and etching the MEMS device structure layer to form a MEMS device structure further comprises:
etching the zeroth insulating layer from one side of the zeroth insulating layer away from the substrate base plate to form a second concave part;
manufacturing a seed layer covering the zeroth insulating layer on one side of the zeroth insulating layer, which is away from the substrate, wherein the seed layer fills the first opening structure and the second concave part;
manufacturing the MEMS device structure layer covering the seed layer on one side of the seed layer, which is away from the substrate, and filling part of the MEMS device structure layer into the first opening structure; wherein, part of the MEMS device structure layer is in contact connection with the substrate base plate through the seed layer in the first opening structure;
flattening the surface of one side of the MEMS device structure layer, which is far away from the substrate, by adopting a CMP (chemical mechanical polishing) process;
and etching the MEMS device structure layer to form the MEMS device structure.
9. The method of claim 8, wherein the method further comprises, prior to fabricating a first sealing layer covering the metal support layer on a side of the metal support layer facing away from the device structure:
and manufacturing a metal layer covering the metal supporting layer on one side of the metal supporting layer, which is away from the MEMS device structure, so as to seal the release hole and form a plurality of second fixed electrodes.
10. The method of claim 1, wherein,
the MEMS chip is an inertial sensor chip.
11. A MEMS chip package structure, comprising:
a substrate base plate is provided with a plurality of base plates,
the structure of the device is that,
the conductive pads are formed of a conductive material,
a metal support layer and a first sealing layer; wherein the device structure, the conductive pad, the metal support layer and the first sealing layer are obtained by the manufacturing method of the MEMS chip package structure according to any one of claims 1 to 10.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202311324623.XA CN117069054B (en) | 2023-10-13 | 2023-10-13 | MEMS chip packaging structure and manufacturing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202311324623.XA CN117069054B (en) | 2023-10-13 | 2023-10-13 | MEMS chip packaging structure and manufacturing method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
CN117069054A CN117069054A (en) | 2023-11-17 |
CN117069054B true CN117069054B (en) | 2024-01-23 |
Family
ID=88717359
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202311324623.XA Active CN117069054B (en) | 2023-10-13 | 2023-10-13 | MEMS chip packaging structure and manufacturing method thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN117069054B (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103523745A (en) * | 2013-10-21 | 2014-01-22 | 安徽北方芯动联科微系统技术有限公司 | Si conductive post based wafer-level packaging method and monolithic integrated MEMS (Micro Electro Mechanical System) chip for same |
JP2014065099A (en) * | 2012-09-25 | 2014-04-17 | Toshiba Corp | Semiconductor device, and manufacturing method therefor |
CN114789987A (en) * | 2022-06-23 | 2022-07-26 | 苏州敏芯微电子技术股份有限公司 | Packaging structure for sensing and manufacturing method thereof |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7075160B2 (en) * | 2003-06-04 | 2006-07-11 | Robert Bosch Gmbh | Microelectromechanical systems and devices having thin film encapsulated mechanical structures |
-
2023
- 2023-10-13 CN CN202311324623.XA patent/CN117069054B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014065099A (en) * | 2012-09-25 | 2014-04-17 | Toshiba Corp | Semiconductor device, and manufacturing method therefor |
CN103523745A (en) * | 2013-10-21 | 2014-01-22 | 安徽北方芯动联科微系统技术有限公司 | Si conductive post based wafer-level packaging method and monolithic integrated MEMS (Micro Electro Mechanical System) chip for same |
CN114789987A (en) * | 2022-06-23 | 2022-07-26 | 苏州敏芯微电子技术股份有限公司 | Packaging structure for sensing and manufacturing method thereof |
Also Published As
Publication number | Publication date |
---|---|
CN117069054A (en) | 2023-11-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7772026B2 (en) | MEMS device package and method for manufacturing the same | |
EP2810915B1 (en) | Capacitive sensing structure with embedded acoustic channels | |
US7449366B2 (en) | Wafer level packaging cap and fabrication method thereof | |
KR100620810B1 (en) | Mems device package using multi sealing pad and manufacturing metho thereof | |
US11329098B2 (en) | Piezoelectric micromachined ultrasonic transducers and methods for fabricating thereof | |
US20130161702A1 (en) | Integrated mems device | |
EP1734001B1 (en) | Method of packaging MEMS at wafer level | |
US9889472B2 (en) | CMUT device and manufacturing method | |
US8252695B2 (en) | Method for manufacturing a micro-electromechanical structure | |
US12043538B2 (en) | Semiconductor device structure with movable membrane | |
US20220144625A1 (en) | Mems devices and methods of forming thereof | |
EP3614372B1 (en) | Method for manufacturing an air pulse generating element | |
US7537952B2 (en) | Method of manufacturing MEMS device package | |
TWI652728B (en) | Epi-poly etch stop for out of plane spacer defined electrode | |
CN117069054B (en) | MEMS chip packaging structure and manufacturing method thereof | |
US10882737B2 (en) | Through silicon interposer wafer and method of manufacturing the same | |
US11292715B2 (en) | Conductive bond structure to increase membrane sensitivity in MEMS device | |
EP3682210B1 (en) | Capacitive pressure sensors and other devices having a suspended membrane and having rounded corners at an anchor edge | |
US12139399B2 (en) | Conductive bond structure to increase membrane sensitivity in MEMS device | |
US20240367965A1 (en) | Conductive bond structure to increase membrane sensitivty in mems device | |
JP7233984B2 (en) | Package and package manufacturing method | |
US20210061652A1 (en) | Fabrication method for a mems device | |
US20230126725A1 (en) | Method of preparing radio frequency filter |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |