CN116414467A - Low-power-consumption rapid wake-up method - Google Patents

Low-power-consumption rapid wake-up method Download PDF

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Publication number
CN116414467A
CN116414467A CN202111650261.4A CN202111650261A CN116414467A CN 116414467 A CN116414467 A CN 116414467A CN 202111650261 A CN202111650261 A CN 202111650261A CN 116414467 A CN116414467 A CN 116414467A
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ddr
wake
cpu
program
dormancy
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刘思慧
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Beijing Ingenic Semiconductor Co Ltd
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Beijing Ingenic Semiconductor Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4418—Suspend and resume; Hibernate and awake
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/263—Arrangements for using multiple switchable power supplies, e.g. battery and AC
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Power Engineering (AREA)
  • Power Sources (AREA)
  • Microcomputers (AREA)

Abstract

The invention provides a low-power-consumption rapid wake-up method, which designs sleep of a hibernate grade, combines the advantages of sleep and hibernate, and realizes the ultra-low power consumption and the rapid wake-up function of the sleep. The method comprises the following steps: by utilizing the dormancy flow provided by the Linux system, only the RTC domain and the DDR domain keep supplying power during dormancy, the DDR enters a low-power self-refresh state, and other power domains are all powered off; before dormancy, the configuration of the PLL and the DDR is stored, when the system is powered on and started, the system directly jumps to the RTC RAM to realize the wake-up function, the configuration of the PLL and the DDR is restored, and the wake-up speed is increased; because DDR enters the self-refresh mode, the data in the DDR can be saved and not lost, the program is awakened back to continue to run at the position before dormancy, and the system does not need to be restarted.

Description

Low-power-consumption rapid wake-up method
Technical Field
The invention relates to the technical field of power management of systems, in particular to a low-power-consumption rapid wake-up method.
Background
With the development of technology, sleep and wake-up technologies related to systems are increasingly paid attention to. Sleep wakeup of existing Linux systems: and when the Linux kernel is used for dormancy awakening, the external clock is closed, the DDR enters a self-refresh mode, and the electricity of the CPU kernel is closed, and other electricity is not closed. The program continues execution where it was then dormant after waking up. And in the hibernate dormancy of the Linux system, the development board only keeps the power of the RTC domain when the hibernate dormancy is performed, and other parts are completely powered off. And after waking up, the power-up procedure is restarted to execute. The development board is a circuit board for developing an embedded system.
Where the program then sleeps after waking up, execution continues: save site- > wake- > resume site, as nothing happens, the program continues to execute down at a location prior to next rest.
After waking up, the power is turned on again, and the program is restarted to execute: the normal start flow starts from Bootrom.
However, in the prior art, the sleep depth of sleep awakening is related to the awakening speed, and the shallower the sleep depth is, the faster the awakening is, and the higher the power consumption is; the deeper the sleep depth, the slower the wake-up speed and the lower the power consumption. Correspondingly, sleep wakeup of the Linux system: only a portion of the power is turned off and the power consumption of sleep is relatively high. Hibernate dormancy of Linux system: the wake-up is equivalent to restarting the system, the wake-up speed is slower, and the system cannot continue to run at the position before dormancy.
Furthermore, the common terminology in the prior art is as follows:
1. dormancy awakening, namely a power management mode provided by a Linux system.
Idle, sleep: sleep mode provided by linux power management.
Hibernate linux power management provides sleep mode.
4.RTC:real time clock, real time clock.
RTC RAM a piece of RAM space in the RTC domain for saving code and data at the time of deep sleep.
DDR: double Rate dynamic random Access memory.
Pll (Phase Locked Loop): is a phase-locked loop or phase-locked loop for unifying and integrating clock signals to make high-frequency devices work normally, such as accessing data of memory.
DDR self-refresh: and the DDR internally sends out a refresh command every 64ms, so that the participation of a controller is not needed, and the data is ensured not to be lost.
Tcsm a piece of SRAM space, used in the present invention to save and run code while dormant. The code during sleep is placed inside the TCSM and the DDR is inaccessible after entering self-refresh. After DDR enters self-refresh and before sleep, there is code to execute, so the sleep code after DDR enters self-refresh and enters self-refresh is put into TCSM. All sleep codes may also be placed into the TCSM, which is now done.
Bootrom, a boot code cured inside the chip.
Disclosure of Invention
In order to solve the above problems, the present method aims at: the invention provides a deep sleep process, which utilizes the sleep process provided by a Linux system to design software and hardware for sleep of a hibernate level, combines the advantages of sleep and hibernate, and realizes the ultra-low power consumption and the rapid wake-up function of sleep.
Specifically, the invention provides a low-power-consumption rapid wake-up method, which comprises the following steps: the sleep wake-up framework provided by the application system is utilized, so that when the application system is in sleep, only the RTC domain and the DDR domain keep supplying power, the DDR enters a low-power self-refresh state, and other power domains are all powered off; before dormancy, the configuration of the PLL and the DDR is stored, when the system is powered on and started, the system directly jumps into the RTC RAM to realize the wake-up function, namely, when the CPU is powered on and started, the CPU enters a Bootrom, a register is read in the Bootrom, the register is a read-only register and is used for indicating why the reset is generated, including the reset of deep sleep, power-on reset, watchdog reset and the like, so that whether the last power-off is deep dormancy or not is judged; if the CPU is in deep sleep, the CPU executes a jump instruction, jumps to the address of the recovery code in the RTC RAM, executes the wake-up code, resumes the configuration of the PLL and the DDR, and accelerates the wake-up speed; if the sleep mode is not deep sleep mode, the normal starting process is carried out; because DDR enters the self-refresh mode, the data in the DDR can be saved and not lost, the program is awakened back to continue to run at the position before dormancy, and the system does not need to be restarted.
The method further comprises the steps of:
preparing to start to enter deep sleep;
preserving DDR, PLL configuration: wherein, DATA comprising PLL and DDR configuration, recovery Code Resume Code comprising recovery PLL and DDR are stored in RTC RAM; when a wake-up source is received, starting to execute Bootrom, calling a recovery code, and returning to a recovery site;
saving the CPU site;
DDR self-refresh is performed;
entering a Hibernate state and powering off;
restoring the site;
the program continues to execute.
The method further comprises:
s1, before entering a deep sleep, loading a section of code for sleep into a TCSM, and jumping to the TCSM to execute a program before sleep power-off;
the code for dormancy and the program before dormancy power off are both codes for executing dormancy flow and configuring the system to enter a deep dormancy mode, and the code comprises a code for configuring DDR to enter self-refresh and a code for configuring RTC to enter a deep dormancy mode;
the jump to the TCSM means that a PC pointer of the program jumps to an address of the TCSM, and codes in the TCSM are executed;
s2, saving codes and data into the RTC RAM, wherein the codes and the data comprise codes for waking up, register configuration of a PLL and a DDR, and PC addresses for program execution after the RTC RAM is woken up and exited; resume Code information for resuming PLL and DDR;
s3, saving the most basic controller configuration required by the system operation into the DDR, wherein the configuration comprises clock, serial port information and register configuration of a clock and serial port module;
s4, saving the site of the CPU; the field of the CPU refers to the current values of a general register and a cp0 register in the CPU, and cp0 refers to a coprocessor 0;
s5, configuring the DDR to enter a self-refresh mode, so that low-power-consumption operation can be ensured, and data are not lost;
s6, configuring registers of the RTC, closing all circuits except the RTC and the DDR, and entering a deep sleep state;
s7, when the RTC detects that the wake-up key WKUP is pressed, recovering power supply to each path;
the detection is realized through the internal logic of the RTC, and the level of the wkup_n pin is waken up when the level is changed from high to low and then high;
s8, the system is powered on, bootrom execution is carried out, the deep sleep mode is judged, and the system jumps to the RTC RAM to execute a wake-up program; namely, reading a value of a register in Bootrom, wherein the value represents a reset state, and if the reset sleep is performed, the pc pointer jumps to an address of the RTC RAM to execute a wake-up program; if the state is other reset, the normal starting flow is carried out; s9, in the RTC RAM, the configuration of the PLL and the DDR is recovered, and the DDR exits from the self-refreshing state; s10, jumping to a program execution PC address stored before dormancy, executing the program, and restoring the CPU site: the function of the program executing on this PC address is to resume the CPU's site; the recovery method is as follows: reading the values of the CPU general register and the cp0 register stored before dormancy, and writing back into the CPU general register and the cp0 register;
s11, recovering a system clock and a serial port, wherein the configuration comprises clock and serial port configuration;
s12, the system continues to execute the program at the program position before dormancy.
And step S2, the program stored corresponding to the PC address is used for recovering the CPU field.
The other reset states in step S8 include a power-on reset and a watchdog reset.
The application system comprises Linux.
The main flow of the dormancy wakeup framework is as follows: freezing a user state process and a kernel state task, calling a callback function of suspend of the registered device, sleeping the kernel device and enabling the CPU to enter a sleep state, wherein the awakening is the reverse process of sleeping.
The method for saving the PLL and DDR configuration comprises the following steps: the registers of the PLL and DDR are read and the read values are written to an address in the RTC RAM.
The method capable of continuing to continue operation at the position before dormancy is as follows: before dormancy, the register value of the CPU is stored, and the data in the DDR is kept unchanged; and waking up, rewriting the saved value of the CPU register back, and continuing the running of the program.
Thus, the present application has the advantages that: the method combines the low power consumption of hibernate dormancy and the wake-up speed of sleep, and designs software and hardware, so that the method is simple and the design is ingenious.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate and together with the description serve to explain the invention.
Fig. 1 is a block diagram schematic of a method according to the present application.
FIG. 2 is a schematic flow chart of the method of the present invention.
Detailed Description
In order that the technical content and advantages of the present invention may be more clearly understood, a further detailed description of the present invention will now be made with reference to the accompanying drawings.
The embodiment is a low-power-consumption rapid wake-up method, combines the low power consumption of hibernate and the wake-up speed of sleep, and designs software and hardware. When the power supply is dormant, only the RTC domain and the DDR domain are powered, the DDR enters a low-power self-refresh state, and other power domains are powered off completely, so that the power consumption is reduced. The configuration of the PLL and the DDR is stored before dormancy, and when the system is powered on and started, the system directly jumps to the RTC RAM to realize the wake-up function, so that the configuration of the PLL and the DDR is restored, and the wake-up speed is increased. Because DDR enters the self-refresh mode, the data in the DDR can be saved and not lost, the program is awakened back to continue to run at the position before dormancy, and the system does not need to be restarted. The method comprises the following steps:
the main process of dormancy is that using dormancy awakening frame provided by linux system: freezing a user state process and a kernel state task, calling a callback function of suspend of the registered device, sleeping the kernel device and enabling the CPU to enter a sleep state; waking up is the reverse of dormancy; when the power supply is dormant, only the RTC domain and the DDR domain keep supplying power, the DDR enters a low-power self-refreshing state, and other power domains are all powered off; before dormancy, the configuration of the PLL and the DDR is saved, and the method for saving the configuration of the PLL and the DDR comprises the following steps: reading registers of the PLL and the DDR, and writing the read value to a certain address in the RTC RAM;
when the system is powered on and started, the system directly jumps to the RTC RAM to realize the wake-up function, resumes the configuration of the PLL and the DDR, and accelerates the wake-up speed; the jump to RTC RAM means: when the CPU is powered on and started, the CPU enters a Bootrom, a register in the RTC is read in the Bootrom, and whether the last power-off is deep sleep or not is judged: if the wake sleep is the deep sleep, the CPU executes a jump instruction, jumps to the address of the RTC RAM and executes a wake-up code; if the current is not deep sleep, the normal starting flow is carried out; because DDR enters the self-refresh mode, the data in the DDR can be stored and not lost, the program is awakened back to continue to run at the position before dormancy, and the system does not need to be restarted; the method for continuing running the program at the position before dormancy is as follows: the register value of cpu is saved before sleep, and the data in ddr remains unchanged. The wake-up is resumed by rewriting the saved cpu register value back, and the program continues to run as if nothing had happened.
As shown in fig. 1, the steps of the method include:
preparing to start to enter deep sleep;
preserving DDR, PLL configuration: wherein, DATA comprising PLL and DDR configuration, recovery Code Resume Code comprising recovery PLL and DDR are stored in RTC RAM; when a wake-up source is received, starting to execute Bootrom, calling a recovery code, and returning to a recovery site;
saving the CPU site;
DDR self-refresh is performed;
entering a Hibernate state and powering off;
restoring the site;
the program continues to execute.
The specific flow is as follows, and the method further includes, as shown in fig. 2:
s1, before entering into dormancy, loading a section of code for dormancy into a TCSM, and jumping to a TCSM to execute a program before dormancy and power off;
the code for dormancy and the program before dormancy power off are both executed dormancy processes, the code for configuring the system to enter the deep sleep mode comprises the code for configuring DDR to enter self-refresh, the code for configuring RTC to enter the deep sleep mode and the like;
the jump to the TCSM means that a PC pointer of the program jumps to an address of the TCSM, and codes in the TCSM are executed;
s2, saving codes and data into the RTC RAM, wherein the codes and the data comprise codes for waking up, register configuration of a PLL and a DDR, and PC addresses for program execution after the RTC RAM is woken up and exited; resume Code information for resuming PLL and DDR;
s3, saving the most basic controller configuration required by the system operation into the DDR, wherein the configuration comprises clock and serial port information; register configuration of modules such as a clock, a serial port and the like;
s4, saving the site of the CPU; the field of the CPU refers to the current values of a general register and a cp0 register in the CPU; cp0 refers to coprocessor 0;
s5, configuring the DDR to enter a self-refresh mode, so that low-power-consumption operation can be ensured, and data are not lost;
s6, configuring registers of the RTC, closing all circuits except the RTC and the DDR, and entering a deep sleep state;
s7, when the RTC detects that the wake-up key WKUP is pressed down, power supply to each path is restored;
the RTC detection is implemented by the internal logic of the RTC and is not an operation of the software. The level of wkup_n wakes up from high to low and then goes high again;
s8, the system is powered on, bootrom execution is carried out, the deep sleep mode is judged, and the system jumps to the RTC RAM for execution; the specific judging method comprises the following steps: the value of a register is read inside Bootrom. This value indicates what reset is in particular. If the wake sleep is the sleep, the pc pointer jumps to the address of the RTC RAM to execute the wake-up program. If other reset is included, such as power-on reset, watchdog reset and the like, the normal starting flow is carried out.
S9, in the RTC RAM, the configuration of the PLL and the DDR is recovered, and the DDR exits from the self-refreshing state; s10, jumping to a program execution PC address stored before dormancy, executing the program, and restoring the CPU site: the main function of the program executing on this PC address is to resume the CPU's site; the recovery method is as follows: reading the values of the CPU general register and the cp0 register stored before dormancy, and writing back into the CPU general register and the cp0 register;
s11, recovering a system clock and a serial port, wherein the configuration comprises clock and serial port configuration;
s12, the system continues to execute the program at the program position before dormancy.
The PC address in step S2 corresponds to the stored program for restoring the CPU field, i.e. the resume PC value is an address on which the program is placed, and the function of the program is to restore the CPU field.
The application system is not necessarily a Linux system, and other systems may also be used, but the embodiment only operates on Linux.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, and various modifications and variations can be made to the embodiments of the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (9)

1. A method for low power consumption fast wakeup, the method comprising: the sleep wake-up framework provided by the application system is utilized, so that when the application system is in sleep, only the RTC domain and the DDR domain keep supplying power, the DDR enters a low-power self-refresh state, and other power domains are all powered off; before dormancy, the configuration of the PLL and the DDR is stored, when the system is powered on and started, the system directly jumps to the RTC RAM to realize the wake-up function, namely, when the CPU is powered on and started, bootrom is entered, a read-only register used for representing the generation reason of the reset is read in the Bootrom, and therefore whether the last power-off is deep dormancy or not is judged; if the CPU is in deep sleep, the CPU executes a jump instruction, jumps to the address of the recovery code in the RTC RAM, executes the wake-up code, resumes the configuration of the PLL and the DDR, and accelerates the wake-up speed; if the sleep mode is not deep sleep mode, the normal starting process is carried out; because DDR enters the self-refresh mode, the data in the DDR can be saved and not lost, the program is awakened back to continue to run at the position before dormancy, and the system does not need to be restarted.
2. The method for low power consumption fast wakeup according to claim 1, wherein the steps of the method further include:
preparing to start to enter deep sleep;
preserving DDR, PLL configuration: wherein, DATA comprising PLL and DDR configuration, recovery Code Resume Code comprising recovery PLL and DDR are stored in RTC RAM; when a wake-up source is received, starting to execute Bootrom, calling a recovery code, and returning to a recovery site;
saving the CPU site;
DDR self-refresh is performed;
entering a Hibernate state and powering off;
restoring the site;
the program continues to execute.
3. A method of low power fast wakeup according to claim 2, the method further comprising:
s1, before entering a deep sleep, loading a section of code for sleep into a TCSM, and jumping to the TCSM to execute a program before sleep power-off;
the code for dormancy and the program before dormancy power off are both codes for executing dormancy flow and configuring the system to enter a deep dormancy mode, and the code comprises a code for configuring DDR to enter self-refresh and a code for configuring RTC to enter a deep dormancy mode;
the jump to the TCSM means that a PC pointer of the program jumps to an address of the TCSM, and codes in the TCSM are executed;
s2, saving codes and data into the RTC RAM, wherein the codes and the data comprise codes for waking up, register configuration of a PLL and a DDR, and PC addresses for program execution after the RTC RAM is woken up and exited; resume Code information for resuming PLL and DDR;
s3, saving the most basic controller configuration required by the system operation into the DDR, wherein the configuration comprises clock, serial port information and register configuration of a clock and serial port module;
s4, saving the site of the CPU; the field of the CPU refers to the current values of a general register and a cp0 register in the CPU, and cp0 refers to a coprocessor 0;
s5, configuring the DDR to enter a self-refresh mode, so that low-power-consumption operation can be ensured, and data are not lost;
s6, configuring registers of the RTC, closing all circuits except the RTC and the DDR, and entering a deepsep state;
s7, when the RTC detects that the wake-up key WKUP is pressed, recovering power supply to each path;
the detection is realized through the internal logic of the RTC, and the level of the wkup_n pin is waken up when the level is changed from high to low and then high;
s8, the system is powered on, bootrom execution is carried out, the deep sleep mode is judged, and the system jumps to the RTC RAM to execute a wake-up program; namely, reading a value of a register in Bootrom, wherein the value represents a reset state, and if the reset sleep is performed, the pc pointer jumps to an address of RTCRAM to execute a wake-up program; if the state is other reset, the normal starting flow is carried out;
s9, in the RTC RAM, the configuration of the PLL and the DDR is recovered, and the DDR exits from the self-refreshing state;
s10, jumping to a program execution PC address stored before dormancy, executing the program, and restoring the CPU site: the function of the program executing on this PC address is to resume the CPU's site; the recovery method is as follows: reading the values of the CPU general register and the cp0 register stored before dormancy, and writing back into the CPU general register and the cp0 register;
s11, recovering a system clock and a serial port, wherein the configuration comprises clock and serial port configuration;
s12, the system continues to execute the program at the program position before dormancy.
4. The method for low power consumption fast wake-up as claimed in claim 3, wherein the program stored in the PC address in step S2 is used for restoring the CPU to the site.
5. A method of low power fast wake-up according to claim 3, wherein the other reset states in step S8 include a power-on reset and a watchdog reset.
6. The method for low power consumption fast wakeup according to claim 1, wherein the application includes Linux.
7. The method for low power consumption fast wake-up according to claim 1, wherein the main flow of the sleep wake-up framework is: freezing a user state process and a kernel state task, calling a callback function of suspend of the registered device, sleeping the kernel device and enabling the CPU to enter a sleep state, wherein the awakening is the reverse process of sleeping.
8. The method of low power fast wakeup according to claim 1, wherein the method of saving PLL and DDR configurations: the registers of the PLL and DDR are read and the read values are written to an address in the RTC RAM.
9. The method for low power consumption fast wake-up according to claim 1, wherein the method capable of continuing to continue operation at a pre-dormancy location is as follows: before dormancy, the register value of the CPU is stored, and the data in the DDR is kept unchanged; and waking up, rewriting the saved value of the CPU register back, and continuing the running of the program.
CN202111650261.4A 2021-12-30 2021-12-30 Low-power-consumption rapid wake-up method Pending CN116414467A (en)

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